From: Rob Herring <robh@kernel.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: Daire McNamara <daire.mcnamara@microchip.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Palmer Dabbelt <palmer@rivosinc.com>,
devicetree@vger.kernel.org,
Paul Walmsley <paul.walmsley@sifive.com>,
heiko@sntech.de, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Arnd Bergmann <arnd@arndb.de>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Cyril Jean <Cyril.Jean@microchip.com>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v5 04/10] dt-bindings: riscv: microchip: document icicle reference design
Date: Wed, 11 May 2022 08:33:32 -0500 [thread overview]
Message-ID: <20220511133332.GA177299-robh@kernel.org> (raw)
In-Reply-To: <20220509142610.128590-5-conor.dooley@microchip.com>
On Mon, 09 May 2022 15:26:05 +0100, Conor Dooley wrote:
> Add a compatible for the icicle kit's reference design. This represents
> the FPGA fabric's contents & is versioned to denote which release of the
> reference design it applies to.
>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> Documentation/devicetree/bindings/riscv/microchip.yaml | 1 +
> 1 file changed, 1 insertion(+)
>
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2022-05-11 13:33 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-09 14:26 [PATCH v5 00/10] PolarFire SoC dt for 5.19 Conor Dooley
2022-05-09 14:26 ` [PATCH v5 01/10] riscv: dts: microchip: remove icicle memory clocks Conor Dooley
2022-05-09 14:26 ` [PATCH v5 02/10] riscv: dts: microchip: move sysctrlr out of soc bus Conor Dooley
2022-05-09 14:26 ` [PATCH v5 03/10] riscv: dts: microchip: remove soc vendor from filenames Conor Dooley
2022-05-09 14:26 ` [PATCH v5 04/10] dt-bindings: riscv: microchip: document icicle reference design Conor Dooley
2022-05-11 13:33 ` Rob Herring [this message]
2022-05-09 14:26 ` [PATCH v5 05/10] riscv: dts: microchip: make the fabric dtsi board specific Conor Dooley
2022-05-09 14:26 ` [PATCH v5 06/10] dt-bindings: vendor-prefixes: add Sundance DSP Conor Dooley
2022-05-09 14:26 ` [PATCH v5 07/10] dt-bindings: riscv: microchip: add polarberry compatible string Conor Dooley
2022-05-09 14:26 ` [PATCH v5 08/10] riscv: dts: microchip: add the sundance polarberry Conor Dooley
2022-05-09 14:26 ` [PATCH v5 09/10] riscv: microchip: icicle: readability fixes Conor Dooley
2022-05-15 19:51 ` Heiko Stübner
2022-05-09 14:26 ` [PATCH v5 10/10] riscv: dts: icicle: sort nodes alphabetically Conor Dooley
2022-05-15 19:51 ` Heiko Stübner
2022-05-23 11:47 ` [PATCH v5 00/10] PolarFire SoC dt for 5.19 Conor.Dooley
2022-06-02 2:07 ` Palmer Dabbelt
2022-06-02 4:39 ` Conor.Dooley
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