[PATCH 00/10] dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml

[PATCH 00/10] dt-bindings: arm: freescale: Switch fsl,scu from txt to yaml

[Abel Vesa]

This patchset splits the fsl,scu txt into multiple yaml files.
There is one yaml for the main SCU node and then each possible child
nodes has its own yaml file. Last patch of the series removes the txt
file.

Abel Vesa (10):
  dt-bindings: arm: freescale: Switch fsl,scu to yaml
  dt-bindings: arm: freescale: Add fsl,scu-clk yaml file
  dt-bindings: arm: freescale: Add fsl,scu-iomux yaml file
  dt-bindings: arm: freescale: Add fsl,scu-key yaml file
  dt-bindings: arm: freescale: Add fsl,scu-ocotp yaml file
  dt-bindings: arm: freescale: Add fsl,scu-pd yaml file
  dt-bindings: arm: freescale: Add fsl,scu-rtc yaml file
  dt-bindings: arm: freescale: Add fsl,scu-thermal yaml file
  dt-bindings: arm: freescale: Add fsl,scu-wdt yaml file
  dt-bindings: arm: freescale: Remove fsl,scu txt file

 .../bindings/arm/freescale/fsl,scu-clk.yaml   |  45 +++
 .../bindings/arm/freescale/fsl,scu-iomux.yaml |  32 +++
 .../bindings/arm/freescale/fsl,scu-key.yaml   |  27 ++
 .../bindings/arm/freescale/fsl,scu-ocotp.yaml |  40 +++
 .../bindings/arm/freescale/fsl,scu-pd.yaml    |  32 +++
 .../bindings/arm/freescale/fsl,scu-rtc.yaml   |  23 ++
 .../arm/freescale/fsl,scu-thermal.yaml        |  31 ++
 .../bindings/arm/freescale/fsl,scu-wdt.yaml   |  29 ++
 .../bindings/arm/freescale/fsl,scu.txt        | 271 ------------------
 .../bindings/arm/freescale/fsl,scu.yaml       | 185 ++++++++++++
 10 files changed, 444 insertions(+), 271 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-iomux.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-ocotp.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
 delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml

--
2.34.3

[PATCH 01/10] dt-bindings: arm: freescale: Switch fsl,scu to yaml

[Abel Vesa]

This patch actually addds the fsl,scu.yaml which is only for the
main SCU node. The child nodes schemas will be split in different
yaml files. The old txt file will be removed only after all the
child nodes have been properly switch to yaml.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu.yaml       | 185 ++++++++++++++++++
 1 file changed, 185 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
new file mode 100644
index 000000000000..56728cfaa2e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
@@ -0,0 +1,185 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX System Controller Firmware (SCFW)
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+
+description: System Controller Device Node
+  The System Controller Firmware (SCFW) is a low-level system function
+  which runs on a dedicated Cortex-M core to provide power, clock, and
+  resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
+  (QM, QP), and i.MX8QX (QXP, DX).
+  The AP communicates with the SC using a multi-ported MU module found
+  in the LSIO subsystem. The current definition of this MU module provides
+  5 remote AP connections to the SC to support up to 5 execution environments
+  (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
+  with the LSIO DSC IP bus. The SC firmware will communicate with this MU
+  using the MSI bus.
+  Each mu which supports general interrupt should have an alias correctly
+  numbered in "aliases" node.
+  e.g.
+  aliases {
+         mu1 = &lsio_mu1;
+  };
+
+properties:
+  $nodename:
+    const: 'scu'
+  compatible:
+    const: fsl,imx-scu
+  clock-controller:
+    description: |
+      Clock controller node that provides the clocks controlled by the SCU
+  imx8qx-pd:
+    description: |
+      Power domains controller node that provides the power domains
+      controlled by the SCU
+  imx8qx-ocotp:
+    description: |
+      OCOTP controller node provided by the SCU
+  iomuxc:
+    description: |
+      IOMUX controller provided by the SCU
+  pinctrl:
+    description: |
+      Pin controller provided by the SCU
+  scu-key:
+    description: |
+      Keys provided by the SCU
+  thermal-sensor:
+    description: |
+      Thermal sensor provided by the SCU
+  rtc:
+    description: |
+      RTC controller provided by the SCU
+  watchdog:
+    description: |
+      Watchdog controller provided by the SCU
+  mbox-names:
+    description:
+      include "gip3" if want to support general MU interrupt.
+    minItems: 1
+    maxItems: 10
+  mboxes:
+    description: |
+      List of phandle of 4 MU channels for tx, 4 MU channels for
+      rx, and 1 optional MU channel for general interrupt.
+      All MU channels must be in the same MU instance.
+      Cross instances are not allowed. The MU instance can only
+      be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
+      to make sure use the one which is not conflict with other
+      execution environments. e.g. ATF.
+      Note:
+      Channel 0 must be "tx0" or "rx0".
+      Channel 1 must be "tx1" or "rx1".
+      Channel 2 must be "tx2" or "rx2".
+      Channel 3 must be "tx3" or "rx3".
+      General interrupt rx channel must be "gip3".
+      e.g.
+      mboxes = <&lsio_mu1 0 0
+              &lsio_mu1 0 1
+              &lsio_mu1 0 2
+              &lsio_mu1 0 3
+              &lsio_mu1 1 0
+              &lsio_mu1 1 1
+              &lsio_mu1 1 2
+              &lsio_mu1 1 3
+              &lsio_mu1 3 3>;
+      See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
+      for detailed mailbox binding.
+    minItems: 1
+    maxItems: 10
+
+additionalProperties: false
+
+required:
+  - compatible
+  - mbox-names
+  - mboxes
+
+examples:
+  - |
+    #include <dt-bindings/firmware/imx/rsrc.h>
+    #include <dt-bindings/input/input.h>
+    #include <dt-bindings/pinctrl/pads-imx8qxp.h>
+
+    aliases {
+           mu1 = &lsio_mu1;
+    };
+    lsio_mu1: mailbox@5d1c0000 {
+           reg = <0x5d1c0000 0x10000>;
+           #mbox-cells = <2>;
+    };
+    firmware {
+           scu {
+                   compatible = "fsl,imx-scu";
+                   mbox-names = "tx0", "tx1", "tx2", "tx3",
+                                "rx0", "rx1", "rx2", "rx3",
+                                "gip3";
+                   mboxes = <&lsio_mu1 0 0
+                            &lsio_mu1 0 1
+                            &lsio_mu1 0 2
+                            &lsio_mu1 0 3
+                            &lsio_mu1 1 0
+                            &lsio_mu1 1 1
+                            &lsio_mu1 1 2
+                            &lsio_mu1 1 3
+                            &lsio_mu1 3 3>;
+                   clock-controller {
+                            compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
+                            #clock-cells = <2>;
+                   };
+                   iomuxc {
+                            compatible = "fsl,imx8qxp-iomuxc";
+
+                            pinctrl_lpuart0: lpuart0grp {
+                                   fsl,pins = <
+                                           IMX8QXP_UART0_RX_ADMA_UART0_RX   0x06000020
+                                           IMX8QXP_UART0_TX_ADMA_UART0_TX   0x06000020
+                                   >;
+                            };
+                   };
+                   imx8qx-ocotp {
+                            compatible = "fsl,imx8qxp-scu-ocotp";
+                            #address-cells = <1>;
+                            #size-cells = <1>;
+
+                            fec_mac0: mac@2c4 {
+                                   reg = <0x2c4 6>;
+                            };
+                   };
+                   pd: imx8qx-pd {
+                            compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
+                            #power-domain-cells = <1>;
+                   };
+                   rtc {
+                            compatible = "fsl,imx8qxp-sc-rtc";
+                   };
+                   scu-key {
+                            compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
+                            linux,keycodes = <KEY_POWER>;
+                   };
+                   watchdog {
+                            compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
+                            timeout-sec = <60>;
+                   };
+                   thermal-sensor {
+                            compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
+                            #thermal-sensor-cells = <1>;
+                   };
+            };
+    };
+    serial@5a060000 {
+            reg = <0x5a060000 0x1000>;
+            pinctrl-names = "default";
+            pinctrl-0 = <&pinctrl_lpuart0>;
+            clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
+            clock-names = "ipg";
+            power-domains = <&pd IMX_SC_R_UART_0>;
+    };
-- 
2.34.3

[PATCH 02/10] dt-bindings: arm: freescale: Add fsl,scu-clk yaml file

[Abel Vesa]

This documents separately the clock child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-clk.yaml   | 45 +++++++++++++++++++
 1 file changed, 45 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
new file mode 100644
index 000000000000..f6b97439ce38
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
@@ -0,0 +1,45 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-clk.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+  This binding uses the common clock binding.
+  (Documentation/devicetree/bindings/clock/clock-bindings.txt)
+  The clock consumer should specify the desired clock by having the clock
+  ID in its "clocks" phandle cell.
+  See the full list of clock IDs from
+  include/dt-bindings/clock/imx8qxp-clock.h
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - fsl,imx8dxl-clk
+              - fsl,imx8qm-clk
+              - fsl,imx8qxp-clk
+          - const: fsl,scu-clk
+      - items:
+          - const: fsl,imx8qxp-clk
+  '#clock-cells':
+    const: 2
+  clocks:
+    minItems: 1
+    maxItems: 3
+  clock-names:
+    minItems: 1
+    maxItems: 3
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#clock-cells'
-- 
2.34.3

[PATCH 03/10] dt-bindings: arm: freescale: Add fsl,scu-iomux yaml file

[Abel Vesa]

This documents separately the iomux child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-iomux.yaml | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-iomux.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-iomux.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-iomux.yaml
new file mode 100644
index 000000000000..ae13c68331ae
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-iomux.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-iomux.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Pinctrl bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+  This binding uses the i.MX common pinctrl binding.
+  (Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt)
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8qm-iomuxc
+          - fsl,imx8qxp-iomuxc
+          - fsl,imx8dxl-iomuxc
+
+patternProperties:
+  "grp$":
+    type: object
+
+additionalProperties: false
+
+required:
+  - compatible
-- 
2.34.3

[PATCH 04/10] dt-bindings: arm: freescale: Add fsl,scu-key yaml file

[Abel Vesa]

This documents separately the key child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-key.yaml   | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
new file mode 100644
index 000000000000..0b52f2f33bd6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-key.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - SCU key bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+
+properties:
+  compatible:
+    items:
+      - const: fsl,imx8qxp-sc-key
+      - const: fsl,imx-sc-key
+  linux,keycodes:
+    description: See Documentation/devicetree/bindings/input/input.yaml
+
+additionalProperties: false
+
+required:
+  - compatible
+  - linux,keycodes
-- 
2.34.3

[PATCH 05/10] dt-bindings: arm: freescale: Add fsl,scu-ocotp yaml file

[Abel Vesa]

This documents separately the ocotp child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-ocotp.yaml | 40 +++++++++++++++++++
 1 file changed, 40 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-ocotp.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-ocotp.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-ocotp.yaml
new file mode 100644
index 000000000000..1c2d2486f366
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-ocotp.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-ocotp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - OCOTP bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+  Detailed bindings are described in bindings/nvmem/nvmem.txt
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - fsl,imx8qm-scu-ocotp
+              - fsl,imx8qxp-scu-ocotp
+      - items:
+          - const: fsl,imx8qxp-scu-ocotp
+
+  '#address-cells':
+    const: 1
+  '#size-cells':
+    const: 1
+
+patternProperties:
+  "^mac@[0-9[a-f]*$":
+    type: object
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#address-cells'
+  - '#size-cells'
-- 
2.34.3

[PATCH 06/10] dt-bindings: arm: freescale: Add fsl,scu-pd yaml file

[Abel Vesa]

This documents separately the PD child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-pd.yaml    | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
new file mode 100644
index 000000000000..154a63495436
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-pd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Power domain bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+  Power domain bindings based on SCU Message Protocol
+  This binding for the SCU power domain providers uses the generic power
+  domain binding (Documentation/devicetree/bindings/power/power-domain.yaml)
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx8qm-scu-pd
+          - fsl,imx8qxp-scu-pd
+      - const: fsl,scu-pd
+  '#power-domain-cells':
+    const: 1
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#power-domain-cells'
-- 
2.34.3

[PATCH 07/10] dt-bindings: arm: freescale: Add fsl,scu-rtc yaml file

[Abel Vesa]

This documents separately the rtc child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-rtc.yaml   | 23 +++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
new file mode 100644
index 000000000000..199617be4565
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-rtc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - RTC bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+
+properties:
+  compatible:
+    items:
+      - const: fsl,imx8qxp-sc-rtc
+
+additionalProperties: false
+
+required:
+  - compatible
-- 
2.34.3

[PATCH 08/10] dt-bindings: arm: freescale: Add fsl,scu-thermal yaml file

[Abel Vesa]

This documents separately the thermal child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../arm/freescale/fsl,scu-thermal.yaml        | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
new file mode 100644
index 000000000000..d94d378443a1
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
@@ -0,0 +1,31 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-thermal.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Thermal bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: fsl,imx8qxp-sc-thermal
+          - const: fsl,imx-sc-thermal
+      - items:
+          - const: fsl,imx-sc-thermal
+
+  '#thermal-sensor-cells':
+    description: See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml
+
+additionalProperties: false
+
+required:
+  - compatible
+  - '#thermal-sensor-cells'
-- 
2.34.3

[PATCH 09/10] dt-bindings: arm: freescale: Add fsl,scu-wdt yaml file

[Abel Vesa]

This documents separately the watchdog child node of the SCU main node.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu-wdt.yaml   | 29 +++++++++++++++++++
 1 file changed, 29 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
new file mode 100644
index 000000000000..c5d71ca83963
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-wdt.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: i.MX SCU Client Device Node - Watchdog bindings based on SCU Message Protocol
+
+maintainers:
+  - Shawn Guo <shawnguo@kernel.org>
+
+description: i.MX SCU Client Device Node
+  Client nodes are maintained as children of the relevant IMX-SCU device node.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: fsl,imx8qxp-sc-wdt
+          - const: fsl,imx-sc-wdt
+      - items:
+          - const: fsl,imx-sc-wdt
+
+  timeout-sec: true
+
+additionalProperties: false
+
+required:
+  - compatible
-- 
2.34.3

[PATCH 10/10] dt-bindings: arm: freescale: Remove fsl,scu txt file

[Abel Vesa]

Now that all the nodes have been properly documented in the
yaml files, we can drop the fsl,scu.txt.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
---
 .../bindings/arm/freescale/fsl,scu.txt        | 271 ------------------
 1 file changed, 271 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
deleted file mode 100644
index a87ec15e28d2..000000000000
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ /dev/null
@@ -1,271 +0,0 @@
-NXP i.MX System Controller Firmware (SCFW)
---------------------------------------------------------------------
-
-The System Controller Firmware (SCFW) is a low-level system function
-which runs on a dedicated Cortex-M core to provide power, clock, and
-resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
-(QM, QP), and i.MX8QX (QXP, DX).
-
-The AP communicates with the SC using a multi-ported MU module found
-in the LSIO subsystem. The current definition of this MU module provides
-5 remote AP connections to the SC to support up to 5 execution environments
-(TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
-with the LSIO DSC IP bus. The SC firmware will communicate with this MU
-using the MSI bus.
-
-System Controller Device Node:
-============================================================
-
-The scu node with the following properties shall be under the /firmware/ node.
-
-Required properties:
--------------------
-- compatible:	should be "fsl,imx-scu".
-- mbox-names:	should include "tx0", "tx1", "tx2", "tx3",
-			       "rx0", "rx1", "rx2", "rx3";
-		include "gip3" if want to support general MU interrupt.
-- mboxes:	List of phandle of 4 MU channels for tx, 4 MU channels for
-		rx, and 1 optional MU channel for general interrupt.
-		All MU channels must be in the same MU instance.
-		Cross instances are not allowed. The MU instance can only
-		be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
-		to make sure use the one which is not conflict with other
-		execution environments. e.g. ATF.
-		Note:
-		Channel 0 must be "tx0" or "rx0".
-		Channel 1 must be "tx1" or "rx1".
-		Channel 2 must be "tx2" or "rx2".
-		Channel 3 must be "tx3" or "rx3".
-		General interrupt rx channel must be "gip3".
-		e.g.
-		mboxes = <&lsio_mu1 0 0
-			  &lsio_mu1 0 1
-			  &lsio_mu1 0 2
-			  &lsio_mu1 0 3
-			  &lsio_mu1 1 0
-			  &lsio_mu1 1 1
-			  &lsio_mu1 1 2
-			  &lsio_mu1 1 3
-			  &lsio_mu1 3 3>;
-		See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
-		for detailed mailbox binding.
-
-Note: Each mu which supports general interrupt should have an alias correctly
-numbered in "aliases" node.
-e.g.
-aliases {
-	mu1 = &lsio_mu1;
-};
-
-i.MX SCU Client Device Node:
-============================================================
-
-Client nodes are maintained as children of the relevant IMX-SCU device node.
-
-Power domain bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-This binding for the SCU power domain providers uses the generic power
-domain binding[2].
-
-Required properties:
-- compatible:		Should be one of:
-			  "fsl,imx8qm-scu-pd",
-			  "fsl,imx8qxp-scu-pd"
-			followed by "fsl,scu-pd"
-
-- #power-domain-cells:	Must be 1. Contains the Resource ID used by
-			SCU commands.
-			See detailed Resource ID list from:
-			include/dt-bindings/firmware/imx/rsrc.h
-
-Clock bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-This binding uses the common clock binding[1].
-
-Required properties:
-- compatible:		Should be one of:
-			  "fsl,imx8dxl-clk"
-			  "fsl,imx8qm-clk"
-			  "fsl,imx8qxp-clk"
-			followed by "fsl,scu-clk"
-- #clock-cells:		Should be 2.
-			Contains the Resource and Clock ID value.
-- clocks:		List of clock specifiers, must contain an entry for
-			each required entry in clock-names
-- clock-names:		Should include entries "xtal_32KHz", "xtal_24MHz"
-
-The clock consumer should specify the desired clock by having the clock
-ID in its "clocks" phandle cell.
-
-See the full list of clock IDs from:
-include/dt-bindings/clock/imx8qxp-clock.h
-
-Pinctrl bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-This binding uses the i.MX common pinctrl binding[3].
-
-Required properties:
-- compatible:		Should be one of:
-			"fsl,imx8qm-iomuxc",
-			"fsl,imx8qxp-iomuxc",
-			"fsl,imx8dxl-iomuxc".
-
-Required properties for Pinctrl sub nodes:
-- fsl,pins:		Each entry consists of 3 integers which represents
-			the mux and config setting for one pin. The first 2
-			integers <pin_id mux_mode> are specified using a
-			PIN_FUNC_ID macro, which can be found in
-			<dt-bindings/pinctrl/pads-imx8qm.h>,
-			<dt-bindings/pinctrl/pads-imx8qxp.h>,
-			<dt-bindings/pinctrl/pads-imx8dxl.h>.
-			The last integer CONFIG is the pad setting value like
-			pull-up on this pin.
-
-			Please refer to i.MX8QXP Reference Manual for detailed
-			CONFIG settings.
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-[2] Documentation/devicetree/bindings/power/power-domain.yaml
-[3] Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
-
-RTC bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-Required properties:
-- compatible: should be "fsl,imx8qxp-sc-rtc";
-
-OCOTP bindings based on SCU Message Protocol
-------------------------------------------------------------
-Required properties:
-- compatible:		Should be one of:
-			"fsl,imx8qm-scu-ocotp",
-			"fsl,imx8qxp-scu-ocotp".
-- #address-cells:	Must be 1. Contains byte index
-- #size-cells:		Must be 1. Contains byte length
-
-Optional Child nodes:
-
-- Data cells of ocotp:
-  Detailed bindings are described in bindings/nvmem/nvmem.txt
-
-Watchdog bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-Required properties:
-- compatible: should be:
-              "fsl,imx8qxp-sc-wdt"
-              followed by "fsl,imx-sc-wdt";
-Optional properties:
-- timeout-sec: contains the watchdog timeout in seconds.
-
-SCU key bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-Required properties:
-- compatible: should be:
-              "fsl,imx8qxp-sc-key"
-              followed by "fsl,imx-sc-key";
-- linux,keycodes: See Documentation/devicetree/bindings/input/input.yaml
-
-Thermal bindings based on SCU Message Protocol
-------------------------------------------------------------
-
-Required properties:
-- compatible:			Should be :
-				  "fsl,imx8qxp-sc-thermal"
-				followed by "fsl,imx-sc-thermal";
-
-- #thermal-sensor-cells:	See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml
-				for a description.
-
-Example (imx8qxp):
--------------
-aliases {
-	mu1 = &lsio_mu1;
-};
-
-lsio_mu1: mailbox@5d1c0000 {
-	...
-	#mbox-cells = <2>;
-};
-
-firmware {
-	scu {
-		compatible = "fsl,imx-scu";
-		mbox-names = "tx0", "tx1", "tx2", "tx3",
-			     "rx0", "rx1", "rx2", "rx3",
-			     "gip3";
-		mboxes = <&lsio_mu1 0 0
-			  &lsio_mu1 0 1
-			  &lsio_mu1 0 2
-			  &lsio_mu1 0 3
-			  &lsio_mu1 1 0
-			  &lsio_mu1 1 1
-			  &lsio_mu1 1 2
-			  &lsio_mu1 1 3
-			  &lsio_mu1 3 3>;
-
-		clk: clk {
-			compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
-			#clock-cells = <2>;
-		};
-
-		iomuxc {
-			compatible = "fsl,imx8qxp-iomuxc";
-
-			pinctrl_lpuart0: lpuart0grp {
-				fsl,pins = <
-					SC_P_UART0_RX_ADMA_UART0_RX	0x06000020
-					SC_P_UART0_TX_ADMA_UART0_TX	0x06000020
-				>;
-			};
-			...
-		};
-
-		ocotp: imx8qx-ocotp {
-			compatible = "fsl,imx8qxp-scu-ocotp";
-			#address-cells = <1>;
-			#size-cells = <1>;
-
-			fec_mac0: mac@2c4 {
-				reg = <0x2c4 8>;
-			};
-		};
-
-		pd: imx8qx-pd {
-			compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
-			#power-domain-cells = <1>;
-		};
-
-		rtc: rtc {
-			compatible = "fsl,imx8qxp-sc-rtc";
-		};
-
-		scu_key: scu-key {
-			compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
-			linux,keycodes = <KEY_POWER>;
-		};
-
-		watchdog {
-			compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
-			timeout-sec = <60>;
-		};
-
-		tsens: thermal-sensor {
-			compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
-			#thermal-sensor-cells = <1>;
-		};
-	};
-};
-
-serial@5a060000 {
-	...
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_lpuart0>;
-	clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
-	clock-names = "ipg";
-	power-domains = <&pd IMX_SC_R_UART_0>;
-};
-- 
2.34.3

Re: [PATCH 01/10] dt-bindings: arm: freescale: Switch fsl,scu to yaml

[Rob Herring]

On Tue, 07 Jun 2022 13:59:42 +0300, Abel Vesa wrote:
> This patch actually addds the fsl,scu.yaml which is only for the
> main SCU node. The child nodes schemas will be split in different
> yaml files. The old txt file will be removed only after all the
> child nodes have been properly switch to yaml.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu.yaml       | 185 ++++++++++++++++++
>  1 file changed, 185 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
> 

My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):

yamllint warnings/errors:

dtschema/dtc warnings/errors:
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/clock-controller: failed to match any schema with compatible: ['fsl,imx8qxp-clk', 'fsl,scu-clk']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/clock-controller: failed to match any schema with compatible: ['fsl,imx8qxp-clk', 'fsl,scu-clk']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/iomuxc: failed to match any schema with compatible: ['fsl,imx8qxp-iomuxc']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/imx8qx-ocotp: failed to match any schema with compatible: ['fsl,imx8qxp-scu-ocotp']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/imx8qx-pd: failed to match any schema with compatible: ['fsl,imx8qxp-scu-pd', 'fsl,scu-pd']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/imx8qx-pd: failed to match any schema with compatible: ['fsl,imx8qxp-scu-pd', 'fsl,scu-pd']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/rtc: failed to match any schema with compatible: ['fsl,imx8qxp-sc-rtc']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/scu-key: failed to match any schema with compatible: ['fsl,imx8qxp-sc-key', 'fsl,imx-sc-key']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/scu-key: failed to match any schema with compatible: ['fsl,imx8qxp-sc-key', 'fsl,imx-sc-key']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/watchdog: failed to match any schema with compatible: ['fsl,imx8qxp-sc-wdt', 'fsl,imx-sc-wdt']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/watchdog: failed to match any schema with compatible: ['fsl,imx8qxp-sc-wdt', 'fsl,imx-sc-wdt']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/thermal-sensor: failed to match any schema with compatible: ['fsl,imx8qxp-sc-thermal', 'fsl,imx-sc-thermal']
Documentation/devicetree/bindings/arm/freescale/fsl,scu.example.dtb:0:0: /example-0/firmware/scu/thermal-sensor: failed to match any schema with compatible: ['fsl,imx8qxp-sc-thermal', 'fsl,imx-sc-thermal']

doc reference errors (make refcheckdocs):

See https://patchwork.ozlabs.org/patch/

This check can fail if there are any dependencies. The base for a patch
series is generally the most recent rc1.

If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:

pip3 install dtschema --upgrade

Please check and re-submit.

Re: [PATCH 01/10] dt-bindings: arm: freescale: Switch fsl,scu to yaml

[Rob Herring]

On Tue, Jun 07, 2022 at 01:59:42PM +0300, Abel Vesa wrote:
> This patch actually addds the fsl,scu.yaml which is only for the
> main SCU node. The child nodes schemas will be split in different
> yaml files. The old txt file will be removed only after all the
> child nodes have been properly switch to yaml.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu.yaml       | 185 ++++++++++++++++++
>  1 file changed, 185 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml

Looks like an MFD, move to bindings/mfd/. Likewise for all the child 
nodes, move them to appropriate provider directories.

> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
> new file mode 100644
> index 000000000000..56728cfaa2e4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
> @@ -0,0 +1,185 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: NXP i.MX System Controller Firmware (SCFW)
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +
> +description: System Controller Device Node
> +  The System Controller Firmware (SCFW) is a low-level system function
> +  which runs on a dedicated Cortex-M core to provide power, clock, and
> +  resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
> +  (QM, QP), and i.MX8QX (QXP, DX).
> +  The AP communicates with the SC using a multi-ported MU module found
> +  in the LSIO subsystem. The current definition of this MU module provides
> +  5 remote AP connections to the SC to support up to 5 execution environments
> +  (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
> +  with the LSIO DSC IP bus. The SC firmware will communicate with this MU
> +  using the MSI bus.
> +  Each mu which supports general interrupt should have an alias correctly
> +  numbered in "aliases" node.
> +  e.g.
> +  aliases {
> +         mu1 = &lsio_mu1;
> +  };
> +
> +properties:
> +  $nodename:
> +    const: 'scu'

blank line between each DT property. Here and throughout the series.

> +  compatible:
> +    const: fsl,imx-scu
> +  clock-controller:
> +    description: |
> +      Clock controller node that provides the clocks controlled by the SCU
> +  imx8qx-pd:

power-controller:

> +    description: |
> +      Power domains controller node that provides the power domains
> +      controlled by the SCU
> +  imx8qx-ocotp:
> +    description: |
> +      OCOTP controller node provided by the SCU
> +  iomuxc:

pinctrl:

> +    description: |
> +      IOMUX controller provided by the SCU
> +  pinctrl:
> +    description: |
> +      Pin controller provided by the SCU
> +  scu-key:

keys:

> +    description: |
> +      Keys provided by the SCU
> +  thermal-sensor:
> +    description: |
> +      Thermal sensor provided by the SCU
> +  rtc:
> +    description: |
> +      RTC controller provided by the SCU
> +  watchdog:
> +    description: |
> +      Watchdog controller provided by the SCU
> +  mbox-names:

Sort properties before child nodes.

> +    description:
> +      include "gip3" if want to support general MU interrupt.
> +    minItems: 1
> +    maxItems: 10
> +  mboxes:
> +    description: |
> +      List of phandle of 4 MU channels for tx, 4 MU channels for
> +      rx, and 1 optional MU channel for general interrupt.
> +      All MU channels must be in the same MU instance.
> +      Cross instances are not allowed. The MU instance can only
> +      be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
> +      to make sure use the one which is not conflict with other
> +      execution environments. e.g. ATF.
> +      Note:
> +      Channel 0 must be "tx0" or "rx0".
> +      Channel 1 must be "tx1" or "rx1".
> +      Channel 2 must be "tx2" or "rx2".
> +      Channel 3 must be "tx3" or "rx3".
> +      General interrupt rx channel must be "gip3".
> +      e.g.
> +      mboxes = <&lsio_mu1 0 0
> +              &lsio_mu1 0 1
> +              &lsio_mu1 0 2
> +              &lsio_mu1 0 3
> +              &lsio_mu1 1 0
> +              &lsio_mu1 1 1
> +              &lsio_mu1 1 2
> +              &lsio_mu1 1 3
> +              &lsio_mu1 3 3>;
> +      See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
> +      for detailed mailbox binding.

The specific mailbox provider is technically outside the scope of this 
binding.

> +    minItems: 1
> +    maxItems: 10
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - mbox-names
> +  - mboxes
> +
> +examples:
> +  - |
> +    #include <dt-bindings/firmware/imx/rsrc.h>
> +    #include <dt-bindings/input/input.h>
> +    #include <dt-bindings/pinctrl/pads-imx8qxp.h>
> +
> +    aliases {
> +           mu1 = &lsio_mu1;

Not a standard alias. Drop.

> +    };
> +    lsio_mu1: mailbox@5d1c0000 {
> +           reg = <0x5d1c0000 0x10000>;
> +           #mbox-cells = <2>;
> +    };

No need to show providers in examples.

> +    firmware {
> +           scu {
> +                   compatible = "fsl,imx-scu";
> +                   mbox-names = "tx0", "tx1", "tx2", "tx3",
> +                                "rx0", "rx1", "rx2", "rx3",
> +                                "gip3";
> +                   mboxes = <&lsio_mu1 0 0
> +                            &lsio_mu1 0 1
> +                            &lsio_mu1 0 2
> +                            &lsio_mu1 0 3
> +                            &lsio_mu1 1 0
> +                            &lsio_mu1 1 1
> +                            &lsio_mu1 1 2
> +                            &lsio_mu1 1 3
> +                            &lsio_mu1 3 3>;
> +                   clock-controller {
> +                            compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> +                            #clock-cells = <2>;
> +                   };
> +                   iomuxc {
> +                            compatible = "fsl,imx8qxp-iomuxc";
> +
> +                            pinctrl_lpuart0: lpuart0grp {
> +                                   fsl,pins = <
> +                                           IMX8QXP_UART0_RX_ADMA_UART0_RX   0x06000020
> +                                           IMX8QXP_UART0_TX_ADMA_UART0_TX   0x06000020
> +                                   >;
> +                            };
> +                   };
> +                   imx8qx-ocotp {
> +                            compatible = "fsl,imx8qxp-scu-ocotp";
> +                            #address-cells = <1>;
> +                            #size-cells = <1>;
> +
> +                            fec_mac0: mac@2c4 {
> +                                   reg = <0x2c4 6>;
> +                            };
> +                   };
> +                   pd: imx8qx-pd {
> +                            compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
> +                            #power-domain-cells = <1>;
> +                   };
> +                   rtc {
> +                            compatible = "fsl,imx8qxp-sc-rtc";
> +                   };
> +                   scu-key {
> +                            compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
> +                            linux,keycodes = <KEY_POWER>;
> +                   };
> +                   watchdog {
> +                            compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
> +                            timeout-sec = <60>;
> +                   };
> +                   thermal-sensor {
> +                            compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
> +                            #thermal-sensor-cells = <1>;
> +                   };
> +            };
> +    };

> +    serial@5a060000 {
> +            reg = <0x5a060000 0x1000>;
> +            pinctrl-names = "default";
> +            pinctrl-0 = <&pinctrl_lpuart0>;
> +            clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
> +            clock-names = "ipg";
> +            power-domains = <&pd IMX_SC_R_UART_0>;
> +    };

Drop this too.

> -- 
> 2.34.3
> 
> 

Re: [PATCH 02/10] dt-bindings: arm: freescale: Add fsl,scu-clk yaml file

[Rob Herring]

On Tue, Jun 07, 2022 at 01:59:43PM +0300, Abel Vesa wrote:
> This documents separately the clock child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-clk.yaml   | 45 +++++++++++++++++++
>  1 file changed, 45 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
> new file mode 100644
> index 000000000000..f6b97439ce38
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-clk.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-clk.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Clock bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +  This binding uses the common clock binding.
> +  (Documentation/devicetree/bindings/clock/clock-bindings.txt)
> +  The clock consumer should specify the desired clock by having the clock
> +  ID in its "clocks" phandle cell.
> +  See the full list of clock IDs from
> +  include/dt-bindings/clock/imx8qxp-clock.h
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - enum:
> +              - fsl,imx8dxl-clk
> +              - fsl,imx8qm-clk
> +              - fsl,imx8qxp-clk
> +          - const: fsl,scu-clk
> +      - items:
> +          - const: fsl,imx8qxp-clk

Why do you need to support with and without a fallback?

> +  '#clock-cells':
> +    const: 2
> +  clocks:
> +    minItems: 1
> +    maxItems: 3

Need to define what are the clock entries.

> +  clock-names:
> +    minItems: 1
> +    maxItems: 3

Need to define the names.

> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - '#clock-cells'
> -- 
> 2.34.3
> 
> 

Re: [PATCH 04/10] dt-bindings: arm: freescale: Add fsl,scu-key yaml file

[Rob Herring]

On Tue, Jun 07, 2022 at 01:59:45PM +0300, Abel Vesa wrote:
> This documents separately the key child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-key.yaml   | 27 +++++++++++++++++++
>  1 file changed, 27 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
> new file mode 100644
> index 000000000000..0b52f2f33bd6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-key.yaml
> @@ -0,0 +1,27 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-key.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - SCU key bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: fsl,imx8qxp-sc-key
> +      - const: fsl,imx-sc-key
> +  linux,keycodes:
> +    description: See Documentation/devicetree/bindings/input/input.yaml

No free form references. Need to add:

allOf:
  - $ref: schemas/input/input.yaml#

And here just:

     linux,keycodes: true


> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - linux,keycodes
> -- 
> 2.34.3
> 
> 

Re: [PATCH 09/10] dt-bindings: arm: freescale: Add fsl,scu-wdt yaml file

[Rob Herring]

On Tue, Jun 07, 2022 at 01:59:50PM +0300, Abel Vesa wrote:
> This documents separately the watchdog child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-wdt.yaml   | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> new file mode 100644
> index 000000000000..c5d71ca83963
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-wdt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Watchdog bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +

Need a ref to watchdog.yaml

> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: fsl,imx8qxp-sc-wdt
> +          - const: fsl,imx-sc-wdt
> +      - items:
> +          - const: fsl,imx-sc-wdt
> +
> +  timeout-sec: true
> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> -- 
> 2.34.3
> 
> 

Re: [PATCH 08/10] dt-bindings: arm: freescale: Add fsl,scu-thermal yaml file

[Rob Herring]

On Tue, Jun 07, 2022 at 01:59:49PM +0300, Abel Vesa wrote:
> This documents separately the thermal child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../arm/freescale/fsl,scu-thermal.yaml        | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
> new file mode 100644
> index 000000000000..d94d378443a1
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-thermal.yaml
> @@ -0,0 +1,31 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-thermal.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Thermal bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: fsl,imx8qxp-sc-thermal
> +          - const: fsl,imx-sc-thermal
> +      - items:
> +          - const: fsl,imx-sc-thermal
> +
> +  '#thermal-sensor-cells':
> +    description: See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml

No.

Need to define how many cells and what they represent.

> +
> +additionalProperties: false
> +
> +required:
> +  - compatible
> +  - '#thermal-sensor-cells'
> -- 
> 2.34.3
> 
> 

Re: [PATCH 06/10] dt-bindings: arm: freescale: Add fsl,scu-pd yaml file

[Krzysztof Kozlowski]

On 07/06/2022 12:59, Abel Vesa wrote:
> This documents separately the PD child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-pd.yaml    | 32 +++++++++++++++++++
>  1 file changed, 32 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
> new file mode 100644
> index 000000000000..154a63495436
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-pd.yaml
> @@ -0,0 +1,32 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-pd.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Power domain bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +  Power domain bindings based on SCU Message Protocol
> +  This binding for the SCU power domain providers uses the generic power
> +  domain binding (Documentation/devicetree/bindings/power/power-domain.yaml)

Using of other bindings is reflected by '$ref'. Mentioning it in
description means nothing and it is not helpful. Reference the proper
schema instead.

> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - fsl,imx8qm-scu-pd
> +          - fsl,imx8qxp-scu-pd
> +      - const: fsl,scu-pd
> +  '#power-domain-cells':
> +    const: 1
> +
> +additionalProperties: false

Use the same order as in example-schema.yaml, so for regular case:
properties+required+additionalProperties

when referencing other schema, without any if-then-else:
allOf:properties+required+additionalProperties

When having if-then-else:
properties+required+allOf+additionalProperties

> +
> +required:
> +  - compatible
> +  - '#power-domain-cells'


Best regards,
Krzysztof

Re: [PATCH 07/10] dt-bindings: arm: freescale: Add fsl,scu-rtc yaml file

[Krzysztof Kozlowski]

On 07/06/2022 12:59, Abel Vesa wrote:
> This documents separately the rtc child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-rtc.yaml   | 23 +++++++++++++++++++
>  1 file changed, 23 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
> new file mode 100644
> index 000000000000..199617be4565
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-rtc.yaml
> @@ -0,0 +1,23 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-rtc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - RTC bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: fsl,imx8qxp-sc-rtc

No need for items.


Best regards,
Krzysztof

Re: [PATCH 09/10] dt-bindings: arm: freescale: Add fsl,scu-wdt yaml file

[Krzysztof Kozlowski]

On 07/06/2022 12:59, Abel Vesa wrote:
> This documents separately the watchdog child node of the SCU main node.
> 
> Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> ---
>  .../bindings/arm/freescale/fsl,scu-wdt.yaml   | 29 +++++++++++++++++++
>  1 file changed, 29 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> new file mode 100644
> index 000000000000..c5d71ca83963
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu-wdt.yaml
> @@ -0,0 +1,29 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu-wdt.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: i.MX SCU Client Device Node - Watchdog bindings based on SCU Message Protocol
> +
> +maintainers:
> +  - Shawn Guo <shawnguo@kernel.org>
> +
> +description: i.MX SCU Client Device Node
> +  Client nodes are maintained as children of the relevant IMX-SCU device node.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: fsl,imx8qxp-sc-wdt
> +          - const: fsl,imx-sc-wdt
> +      - items:
> +          - const: fsl,imx-sc-wdt

No need for second items, it is just one item with const (same issue in
few other patches).


Best regards,
Krzysztof

Re: [PATCH 01/10] dt-bindings: arm: freescale: Switch fsl,scu to yaml

[Abel Vesa]

On 22-06-07 10:28:01, Rob Herring wrote:
> On Tue, Jun 07, 2022 at 01:59:42PM +0300, Abel Vesa wrote:
> > This patch actually addds the fsl,scu.yaml which is only for the
> > main SCU node. The child nodes schemas will be split in different
> > yaml files. The old txt file will be removed only after all the
> > child nodes have been properly switch to yaml.
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > ---
> >  .../bindings/arm/freescale/fsl,scu.yaml       | 185 ++++++++++++++++++
> >  1 file changed, 185 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
>
> Looks like an MFD, move to bindings/mfd/. Likewise for all the child
> nodes, move them to appropriate provider directories.
>

Actually, I think the fsl,scu.yaml makes more sense to be moved to
bindings/firmware.

As for the rest, I'll move them in their appropriate provider directories.

> >
> > diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
> > new file mode 100644
> > index 000000000000..56728cfaa2e4
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.yaml
> > @@ -0,0 +1,185 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/arm/freescale/fsl,scu.yaml
> > +$schema: http://devicetree.org/meta-schemas/core.yaml
> > +
> > +title: NXP i.MX System Controller Firmware (SCFW)
> > +
> > +maintainers:
> > +  - Shawn Guo <shawnguo@kernel.org>
> > +
> > +
> > +description: System Controller Device Node
> > +  The System Controller Firmware (SCFW) is a low-level system function
> > +  which runs on a dedicated Cortex-M core to provide power, clock, and
> > +  resource management. It exists on some i.MX8 processors. e.g. i.MX8QM
> > +  (QM, QP), and i.MX8QX (QXP, DX).
> > +  The AP communicates with the SC using a multi-ported MU module found
> > +  in the LSIO subsystem. The current definition of this MU module provides
> > +  5 remote AP connections to the SC to support up to 5 execution environments
> > +  (TZ, HV, standard Linux, etc.). The SC side of this MU module interfaces
> > +  with the LSIO DSC IP bus. The SC firmware will communicate with this MU
> > +  using the MSI bus.
> > +  Each mu which supports general interrupt should have an alias correctly
> > +  numbered in "aliases" node.
> > +  e.g.
> > +  aliases {
> > +         mu1 = &lsio_mu1;
> > +  };
> > +
> > +properties:
> > +  $nodename:
> > +    const: 'scu'
>
> blank line between each DT property. Here and throughout the series.
>
> > +  compatible:
> > +    const: fsl,imx-scu
> > +  clock-controller:
> > +    description: |
> > +      Clock controller node that provides the clocks controlled by the SCU
> > +  imx8qx-pd:
>
> power-controller:
>
> > +    description: |
> > +      Power domains controller node that provides the power domains
> > +      controlled by the SCU
> > +  imx8qx-ocotp:
> > +    description: |
> > +      OCOTP controller node provided by the SCU
> > +  iomuxc:
>
> pinctrl:
>
> > +    description: |
> > +      IOMUX controller provided by the SCU
> > +  pinctrl:
> > +    description: |
> > +      Pin controller provided by the SCU
> > +  scu-key:
>
> keys:
>
> > +    description: |
> > +      Keys provided by the SCU
> > +  thermal-sensor:
> > +    description: |
> > +      Thermal sensor provided by the SCU
> > +  rtc:
> > +    description: |
> > +      RTC controller provided by the SCU
> > +  watchdog:
> > +    description: |
> > +      Watchdog controller provided by the SCU
> > +  mbox-names:
>
> Sort properties before child nodes.
>
> > +    description:
> > +      include "gip3" if want to support general MU interrupt.
> > +    minItems: 1
> > +    maxItems: 10
> > +  mboxes:
> > +    description: |
> > +      List of phandle of 4 MU channels for tx, 4 MU channels for
> > +      rx, and 1 optional MU channel for general interrupt.
> > +      All MU channels must be in the same MU instance.
> > +      Cross instances are not allowed. The MU instance can only
> > +      be one of LSIO MU0~M4 for imx8qxp and imx8qm. Users need
> > +      to make sure use the one which is not conflict with other
> > +      execution environments. e.g. ATF.
> > +      Note:
> > +      Channel 0 must be "tx0" or "rx0".
> > +      Channel 1 must be "tx1" or "rx1".
> > +      Channel 2 must be "tx2" or "rx2".
> > +      Channel 3 must be "tx3" or "rx3".
> > +      General interrupt rx channel must be "gip3".
> > +      e.g.
> > +      mboxes = <&lsio_mu1 0 0
> > +              &lsio_mu1 0 1
> > +              &lsio_mu1 0 2
> > +              &lsio_mu1 0 3
> > +              &lsio_mu1 1 0
> > +              &lsio_mu1 1 1
> > +              &lsio_mu1 1 2
> > +              &lsio_mu1 1 3
> > +              &lsio_mu1 3 3>;
> > +      See Documentation/devicetree/bindings/mailbox/fsl,mu.yaml
> > +      for detailed mailbox binding.
>
> The specific mailbox provider is technically outside the scope of this
> binding.
>
> > +    minItems: 1
> > +    maxItems: 10
> > +
> > +additionalProperties: false
> > +
> > +required:
> > +  - compatible
> > +  - mbox-names
> > +  - mboxes
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/firmware/imx/rsrc.h>
> > +    #include <dt-bindings/input/input.h>
> > +    #include <dt-bindings/pinctrl/pads-imx8qxp.h>
> > +
> > +    aliases {
> > +           mu1 = &lsio_mu1;
>
> Not a standard alias. Drop.
>
> > +    };
> > +    lsio_mu1: mailbox@5d1c0000 {
> > +           reg = <0x5d1c0000 0x10000>;
> > +           #mbox-cells = <2>;
> > +    };
>
> No need to show providers in examples.
>
> > +    firmware {
> > +           scu {
> > +                   compatible = "fsl,imx-scu";
> > +                   mbox-names = "tx0", "tx1", "tx2", "tx3",
> > +                                "rx0", "rx1", "rx2", "rx3",
> > +                                "gip3";
> > +                   mboxes = <&lsio_mu1 0 0
> > +                            &lsio_mu1 0 1
> > +                            &lsio_mu1 0 2
> > +                            &lsio_mu1 0 3
> > +                            &lsio_mu1 1 0
> > +                            &lsio_mu1 1 1
> > +                            &lsio_mu1 1 2
> > +                            &lsio_mu1 1 3
> > +                            &lsio_mu1 3 3>;
> > +                   clock-controller {
> > +                            compatible = "fsl,imx8qxp-clk", "fsl,scu-clk";
> > +                            #clock-cells = <2>;
> > +                   };
> > +                   iomuxc {
> > +                            compatible = "fsl,imx8qxp-iomuxc";
> > +
> > +                            pinctrl_lpuart0: lpuart0grp {
> > +                                   fsl,pins = <
> > +                                           IMX8QXP_UART0_RX_ADMA_UART0_RX   0x06000020
> > +                                           IMX8QXP_UART0_TX_ADMA_UART0_TX   0x06000020
> > +                                   >;
> > +                            };
> > +                   };
> > +                   imx8qx-ocotp {
> > +                            compatible = "fsl,imx8qxp-scu-ocotp";
> > +                            #address-cells = <1>;
> > +                            #size-cells = <1>;
> > +
> > +                            fec_mac0: mac@2c4 {
> > +                                   reg = <0x2c4 6>;
> > +                            };
> > +                   };
> > +                   pd: imx8qx-pd {
> > +                            compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
> > +                            #power-domain-cells = <1>;
> > +                   };
> > +                   rtc {
> > +                            compatible = "fsl,imx8qxp-sc-rtc";
> > +                   };
> > +                   scu-key {
> > +                            compatible = "fsl,imx8qxp-sc-key", "fsl,imx-sc-key";
> > +                            linux,keycodes = <KEY_POWER>;
> > +                   };
> > +                   watchdog {
> > +                            compatible = "fsl,imx8qxp-sc-wdt", "fsl,imx-sc-wdt";
> > +                            timeout-sec = <60>;
> > +                   };
> > +                   thermal-sensor {
> > +                            compatible = "fsl,imx8qxp-sc-thermal", "fsl,imx-sc-thermal";
> > +                            #thermal-sensor-cells = <1>;
> > +                   };
> > +            };
> > +    };
>
> > +    serial@5a060000 {
> > +            reg = <0x5a060000 0x1000>;
> > +            pinctrl-names = "default";
> > +            pinctrl-0 = <&pinctrl_lpuart0>;
> > +            clocks = <&uart0_clk IMX_SC_R_UART_0 IMX_SC_PM_CLK_PER>;
> > +            clock-names = "ipg";
> > +            power-domains = <&pd IMX_SC_R_UART_0>;
> > +    };
>
> Drop this too.
>
> > --
> > 2.34.3
> >
> >