* [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb
@ 2022-06-02 20:11 Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
` (5 more replies)
0 siblings, 6 replies; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch
Cc: linux-hwmon, Guenter Roeck, babu.moger, yazen.ghannam,
linux-kernel, x86, Mario Limonciello
This series started as what looked like a correction to previous
commits, but I missed that the previous commits were for a different
family with the same chip models. So while fixing up the series I also
noticed that a few upcoming chips have new PCIe IDs and CCD offsets not
yet supported, so add them to amd_nb/k10temp.
v1->v2:
* Correct commit messages
* Add more missing chips and offsets
* since so much changed, do not include Bjorn's Ack.
Mario Limonciello (6):
x86/amd_nb: Add AMD Family 17h A0-AF IDs
x86/amd_nb: Add Family 19h model 70h-7Fh IDs
x86/amd_nb: Add Family 19h model 60h-6Fh IDs
hwmon: (k10temp): Add support for family 17h models A0h-AFh
hwmon: (k10temp): Add support for family 19h models 70h-7Fh
hwmon: (k10temp): Add support for family 19h models 60h-6Fh
arch/x86/kernel/amd_nb.c | 13 +++++++++++++
drivers/hwmon/k10temp.c | 12 ++++++++++++
include/linux/pci_ids.h | 3 +++
3 files changed, 28 insertions(+)
--
2.34.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-07 13:00 ` Guenter Roeck
` (2 more replies)
2022-06-02 20:11 ` [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs Mario Limonciello
` (4 subsequent siblings)
5 siblings, 3 replies; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck, Yazen Ghannam,
Krzysztof Wilczyński, Mario Limonciello,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM
Cc: linux-hwmon, babu.moger, linux-kernel, x86
Add support for SMN communication on Family 17h Model A0h.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v1->v2:
* Drop fixes tag
* Fix commit message and definitions for s/17/19/
---
arch/x86/kernel/amd_nb.c | 5 +++++
include/linux/pci_ids.h | 1 +
2 files changed, 6 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 190e0f763375..60c7bd525237 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -19,12 +19,14 @@
#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
+#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
+#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4 0x1728
#define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
@@ -41,6 +43,7 @@ static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
{}
@@ -61,6 +64,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
@@ -81,6 +85,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 0178823ce8c2..ec1c226d13e6 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -556,6 +556,7 @@
#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b
#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
+#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3 0x1727
#define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-02 21:05 ` Guenter Roeck
2022-06-10 16:46 ` Yazen Ghannam
2022-06-02 20:11 ` [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs Mario Limonciello
` (3 subsequent siblings)
5 siblings, 2 replies; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck, Yazen Ghannam,
Babu Moger, Mario Limonciello,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM
Cc: linux-hwmon, linux-kernel, x86
Add support for SMN communication on Family 19h Model 70h.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/kernel/amd_nb.c | 4 ++++
include/linux/pci_ids.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 60c7bd525237..15295f5d9aca 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -32,6 +32,8 @@
#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
+#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
+#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
/* Protect the PCI config register pairs used for SMN. */
static DEFINE_MUTEX(smn_mutex);
@@ -46,6 +48,7 @@ static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
{}
};
@@ -71,6 +74,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{}
};
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index ec1c226d13e6..32a1f85ff0de 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -561,6 +561,7 @@
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d
+#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-10 16:49 ` Yazen Ghannam
2022-06-02 20:11 ` [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh Mario Limonciello
` (2 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck, Yazen Ghannam,
Krzysztof Wilczyński, Mario Limonciello,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM
Cc: linux-hwmon, babu.moger, linux-kernel, x86
Add support for SMN communication on Family 19h Model 60h.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
arch/x86/kernel/amd_nb.c | 4 ++++
include/linux/pci_ids.h | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 15295f5d9aca..491669c24ffd 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -32,6 +32,8 @@
#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
+#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
+#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
@@ -48,6 +50,7 @@ static const struct pci_device_id amd_root_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_ROOT) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
{}
};
@@ -74,6 +77,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
+ { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{}
};
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 32a1f85ff0de..7fa460ccf7fa 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -561,6 +561,7 @@
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d
+#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 0x14e3
#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
#define PCI_DEVICE_ID_AMD_LANCE 0x2000
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
` (2 preceding siblings ...)
2022-06-02 20:11 ` [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
2022-06-02 20:11 ` [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh Mario Limonciello
5 siblings, 1 reply; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Jean Delvare, Guenter Roeck,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: linux-hwmon, babu.moger, yazen.ghannam, linux-kernel, x86,
Mario Limonciello
Add the support for CCD offsets used on family 17h models A0h-AFh.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/hwmon/k10temp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 4e239bd75b1d..5f831e74bc51 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -428,6 +428,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
data->ccd_offset = 0x154;
k10temp_get_ccd_support(pdev, data, 8);
break;
+ case 0xa0 ... 0xaf:
+ data->ccd_offset = 0x300;
+ k10temp_get_ccd_support(pdev, data, 8);
+ break;
}
} else if (boot_cpu_data.x86 == 0x19) {
data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
@@ -489,6 +493,7 @@ static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
` (3 preceding siblings ...)
2022-06-02 20:11 ` [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
2022-06-02 20:11 ` [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh Mario Limonciello
5 siblings, 1 reply; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Jean Delvare, Guenter Roeck,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: linux-hwmon, babu.moger, yazen.ghannam, linux-kernel, x86,
Mario Limonciello
Add the support for CCD offsets used on family 19h models 70h-7Fh.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/hwmon/k10temp.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 5f831e74bc51..5f37e2e7833e 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -449,6 +449,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
data->ccd_offset = 0x300;
k10temp_get_ccd_support(pdev, data, 8);
break;
+ case 0x70 ... 0x7f:
+ data->ccd_offset = 0x308;
+ k10temp_get_ccd_support(pdev, data, 8);
+ break;
case 0x10 ... 0x1f:
case 0xa0 ... 0xaf:
data->ccd_offset = 0x300;
@@ -498,6 +502,7 @@ static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{ PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
{}
};
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
` (4 preceding siblings ...)
2022-06-02 20:11 ` [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh Mario Limonciello
@ 2022-06-02 20:11 ` Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
5 siblings, 1 reply; 16+ messages in thread
From: Mario Limonciello @ 2022-06-02 20:11 UTC (permalink / raw)
To: Clemens Ladisch, Jean Delvare, Guenter Roeck,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: linux-hwmon, babu.moger, yazen.ghannam, linux-kernel, x86,
Mario Limonciello
Add the support for CCD offsets used on family 19h models 60h-6Fh.
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
drivers/hwmon/k10temp.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index 5f37e2e7833e..5a9d47a229e4 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -449,6 +449,7 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
data->ccd_offset = 0x300;
k10temp_get_ccd_support(pdev, data, 8);
break;
+ case 0x60 ... 0x6f:
case 0x70 ... 0x7f:
data->ccd_offset = 0x308;
k10temp_get_ccd_support(pdev, data, 8);
@@ -502,6 +503,7 @@ static const struct pci_device_id k10temp_id_table[] = {
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
+ { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
{ PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
{}
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* Re: [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs
2022-06-02 20:11 ` [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs Mario Limonciello
@ 2022-06-02 21:05 ` Guenter Roeck
2022-06-10 16:46 ` Yazen Ghannam
1 sibling, 0 replies; 16+ messages in thread
From: Guenter Roeck @ 2022-06-02 21:05 UTC (permalink / raw)
To: Mario Limonciello, Clemens Ladisch, Thomas Gleixner, Ingo Molnar,
Borislav Petkov, Dave Hansen,
maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Yazen Ghannam, Babu Moger,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM
Cc: linux-hwmon
On 6/2/22 13:11, Mario Limonciello wrote:
> Add support for SMN communication on Family 19h Model 70h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
I can not apply this series without the context patches (which I wasn't
copied on), so I assume the idea is to push this through the x86 tree.
This is ok with me.
I can not apply this patch without the context patch (which I wasn't
copied on), so I assume the idea is to push this through the x86
tree. This is ok with me.
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> arch/x86/kernel/amd_nb.c | 4 ++++
> include/linux/pci_ids.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 60c7bd525237..15295f5d9aca 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -32,6 +32,8 @@
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
> +#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
> +#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
>
> /* Protect the PCI config register pairs used for SMN. */
> static DEFINE_MUTEX(smn_mutex);
> @@ -46,6 +48,7 @@ static const struct pci_device_id amd_root_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
> {}
> };
>
> @@ -71,6 +74,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
> {}
> };
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index ec1c226d13e6..32a1f85ff0de 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -561,6 +561,7 @@
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d
> +#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
> #define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
> #define PCI_DEVICE_ID_AMD_LANCE 0x2000
> #define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh
2022-06-02 20:11 ` [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh Mario Limonciello
@ 2022-06-02 21:06 ` Guenter Roeck
0 siblings, 0 replies; 16+ messages in thread
From: Guenter Roeck @ 2022-06-02 21:06 UTC (permalink / raw)
To: Mario Limonciello, Clemens Ladisch, Jean Delvare,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: babu.moger, yazen.ghannam, x86
On 6/2/22 13:11, Mario Limonciello wrote:
> Add the support for CCD offsets used on family 17h models A0h-AFh.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/hwmon/k10temp.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
> index 4e239bd75b1d..5f831e74bc51 100644
> --- a/drivers/hwmon/k10temp.c
> +++ b/drivers/hwmon/k10temp.c
> @@ -428,6 +428,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> data->ccd_offset = 0x154;
> k10temp_get_ccd_support(pdev, data, 8);
> break;
> + case 0xa0 ... 0xaf:
> + data->ccd_offset = 0x300;
> + k10temp_get_ccd_support(pdev, data, 8);
> + break;
> }
> } else if (boot_cpu_data.x86 == 0x19) {
> data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
> @@ -489,6 +493,7 @@ static const struct pci_device_id k10temp_id_table[] = {
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
> + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh
2022-06-02 20:11 ` [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh Mario Limonciello
@ 2022-06-02 21:06 ` Guenter Roeck
0 siblings, 0 replies; 16+ messages in thread
From: Guenter Roeck @ 2022-06-02 21:06 UTC (permalink / raw)
To: Mario Limonciello, Clemens Ladisch, Jean Delvare,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: babu.moger, yazen.ghannam, x86
On 6/2/22 13:11, Mario Limonciello wrote:
> Add the support for CCD offsets used on family 19h models 70h-7Fh.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/hwmon/k10temp.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
> index 5f831e74bc51..5f37e2e7833e 100644
> --- a/drivers/hwmon/k10temp.c
> +++ b/drivers/hwmon/k10temp.c
> @@ -449,6 +449,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> data->ccd_offset = 0x300;
> k10temp_get_ccd_support(pdev, data, 8);
> break;
> + case 0x70 ... 0x7f:
> + data->ccd_offset = 0x308;
> + k10temp_get_ccd_support(pdev, data, 8);
> + break;
> case 0x10 ... 0x1f:
> case 0xa0 ... 0xaf:
> data->ccd_offset = 0x300;
> @@ -498,6 +502,7 @@ static const struct pci_device_id k10temp_id_table[] = {
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
> + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
> { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
> {}
> };
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh
2022-06-02 20:11 ` [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh Mario Limonciello
@ 2022-06-02 21:06 ` Guenter Roeck
0 siblings, 0 replies; 16+ messages in thread
From: Guenter Roeck @ 2022-06-02 21:06 UTC (permalink / raw)
To: Mario Limonciello, Clemens Ladisch, Jean Delvare,
open list:K10TEMP HARDWARE MONITORING DRIVER, open list
Cc: babu.moger, yazen.ghannam, x86
On 6/2/22 13:11, Mario Limonciello wrote:
> Add the support for CCD offsets used on family 19h models 60h-6Fh.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Guenter Roeck <linux@roeck-us.net>
> ---
> drivers/hwmon/k10temp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
> index 5f37e2e7833e..5a9d47a229e4 100644
> --- a/drivers/hwmon/k10temp.c
> +++ b/drivers/hwmon/k10temp.c
> @@ -449,6 +449,7 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
> data->ccd_offset = 0x300;
> k10temp_get_ccd_support(pdev, data, 8);
> break;
> + case 0x60 ... 0x6f:
> case 0x70 ... 0x7f:
> data->ccd_offset = 0x308;
> k10temp_get_ccd_support(pdev, data, 8);
> @@ -502,6 +503,7 @@ static const struct pci_device_id k10temp_id_table[] = {
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
> + { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
> { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
> { PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
> {}
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
@ 2022-06-07 13:00 ` Guenter Roeck
2022-06-08 20:13 ` Bjorn Helgaas
2022-06-10 16:37 ` Yazen Ghannam
2 siblings, 0 replies; 16+ messages in thread
From: Guenter Roeck @ 2022-06-07 13:00 UTC (permalink / raw)
To: Mario Limonciello
Cc: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Yazen Ghannam,
Krzysztof Wilczyński,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM, linux-hwmon, babu.moger
On Thu, Jun 02, 2022 at 03:11:32PM -0500, Mario Limonciello wrote:
> Add support for SMN communication on Family 17h Model A0h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> v1->v2:
> * Drop fixes tag
> * Fix commit message and definitions for s/17/19/
> ---
> arch/x86/kernel/amd_nb.c | 5 +++++
> include/linux/pci_ids.h | 1 +
I would need maintainer Acks for patches 1-3 of this series to apply them
through the hwmon tree. Alternatively, I am ok with applying the series
through the x86 tree.
Thanks,
Guenter
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 190e0f763375..60c7bd525237 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -19,12 +19,14 @@
> #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
> #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
> #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
> #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
> #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
> #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
> #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4 0x1728
> #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> @@ -41,6 +43,7 @@ static const struct pci_device_id amd_root_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
> {}
> @@ -61,6 +64,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
> @@ -81,6 +85,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 0178823ce8c2..ec1c226d13e6 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -556,6 +556,7 @@
> #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
> #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3 0x1727
> #define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
2022-06-07 13:00 ` Guenter Roeck
@ 2022-06-08 20:13 ` Bjorn Helgaas
2022-06-10 16:37 ` Yazen Ghannam
2 siblings, 0 replies; 16+ messages in thread
From: Bjorn Helgaas @ 2022-06-08 20:13 UTC (permalink / raw)
To: Mario Limonciello
Cc: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck, Yazen Ghannam,
Krzysztof Wilczyński,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM, linux-hwmon, babu.moger
On Thu, Jun 02, 2022 at 03:11:32PM -0500, Mario Limonciello wrote:
> Add support for SMN communication on Family 17h Model A0h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com> # pci_ids.h
> ---
> v1->v2:
> * Drop fixes tag
> * Fix commit message and definitions for s/17/19/
> ---
> arch/x86/kernel/amd_nb.c | 5 +++++
> include/linux/pci_ids.h | 1 +
> 2 files changed, 6 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 190e0f763375..60c7bd525237 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -19,12 +19,14 @@
> #define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
> #define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
> #define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
> #define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
> #define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
> #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
> #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4 0x1728
> #define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> @@ -41,6 +43,7 @@ static const struct pci_device_id amd_root_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
> {}
> @@ -61,6 +64,7 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
> @@ -81,6 +85,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
> + { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
> { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 0178823ce8c2..ec1c226d13e6 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -556,6 +556,7 @@
> #define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
> #define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b
> #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
> +#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3 0x1727
> #define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
> #define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
2022-06-07 13:00 ` Guenter Roeck
2022-06-08 20:13 ` Bjorn Helgaas
@ 2022-06-10 16:37 ` Yazen Ghannam
2 siblings, 0 replies; 16+ messages in thread
From: Yazen Ghannam @ 2022-06-10 16:37 UTC (permalink / raw)
To: Mario Limonciello
Cc: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck,
Krzysztof Wilczyński,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM, linux-hwmon, babu.moger
On Thu, Jun 02, 2022 at 03:11:32PM -0500, Mario Limonciello wrote:
> Add support for SMN communication on Family 17h Model A0h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Thanks,
Yazen
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs
2022-06-02 20:11 ` [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs Mario Limonciello
2022-06-02 21:05 ` Guenter Roeck
@ 2022-06-10 16:46 ` Yazen Ghannam
1 sibling, 0 replies; 16+ messages in thread
From: Yazen Ghannam @ 2022-06-10 16:46 UTC (permalink / raw)
To: Mario Limonciello
Cc: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck, Babu Moger,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM, linux-hwmon
On Thu, Jun 02, 2022 at 03:11:33PM -0500, Mario Limonciello wrote:
> Add support for SMN communication on Family 19h Model 70h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> arch/x86/kernel/amd_nb.c | 4 ++++
> include/linux/pci_ids.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 60c7bd525237..15295f5d9aca 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -32,6 +32,8 @@
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
> +#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
> +#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
>
The IDs are correct. But can you please group the "ROOT" IDs together
including PCI_DEVICE_ID_AMD_19H_M40H_ROOT? Otherwise, looks good to me.
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Thanks,
Yazen
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs
2022-06-02 20:11 ` [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs Mario Limonciello
@ 2022-06-10 16:49 ` Yazen Ghannam
0 siblings, 0 replies; 16+ messages in thread
From: Yazen Ghannam @ 2022-06-10 16:49 UTC (permalink / raw)
To: Mario Limonciello
Cc: Clemens Ladisch, Thomas Gleixner, Ingo Molnar, Borislav Petkov,
Dave Hansen, maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT),
H. Peter Anvin, Bjorn Helgaas, Guenter Roeck,
Krzysztof Wilczyński,
open list:X86 ARCHITECTURE (32-BIT AND 64-BIT),
open list:PCI SUBSYSTEM, linux-hwmon, babu.moger
On Thu, Jun 02, 2022 at 03:11:34PM -0500, Mario Limonciello wrote:
> Add support for SMN communication on Family 19h Model 60h.
>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> arch/x86/kernel/amd_nb.c | 4 ++++
> include/linux/pci_ids.h | 1 +
> 2 files changed, 5 insertions(+)
>
> diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
> index 15295f5d9aca..491669c24ffd 100644
> --- a/arch/x86/kernel/amd_nb.c
> +++ b/arch/x86/kernel/amd_nb.c
> @@ -32,6 +32,8 @@
> #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
> #define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
> #define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
> +#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
> +#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
> #define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
> #define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
>
Same here about grouping "ROOT" IDs. Otherwise, looks good.
Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com>
Thanks,
Yazen
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2022-06-10 16:50 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-02 20:11 [PATCH v2 0/6] Add support for upcoming chips to k10temp and amd_nb Mario Limonciello
2022-06-02 20:11 ` [PATCH v2 1/6] x86/amd_nb: Add AMD Family 17h A0-AF IDs Mario Limonciello
2022-06-07 13:00 ` Guenter Roeck
2022-06-08 20:13 ` Bjorn Helgaas
2022-06-10 16:37 ` Yazen Ghannam
2022-06-02 20:11 ` [PATCH v2 2/6] x86/amd_nb: Add Family 19h model 70h-7Fh IDs Mario Limonciello
2022-06-02 21:05 ` Guenter Roeck
2022-06-10 16:46 ` Yazen Ghannam
2022-06-02 20:11 ` [PATCH v2 3/6] x86/amd_nb: Add Family 19h model 60h-6Fh IDs Mario Limonciello
2022-06-10 16:49 ` Yazen Ghannam
2022-06-02 20:11 ` [PATCH v2 4/6] hwmon: (k10temp): Add support for family 17h models A0h-AFh Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
2022-06-02 20:11 ` [PATCH v2 5/6] hwmon: (k10temp): Add support for family 19h models 70h-7Fh Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
2022-06-02 20:11 ` [PATCH v2 6/6] hwmon: (k10temp): Add support for family 19h models 60h-6Fh Mario Limonciello
2022-06-02 21:06 ` Guenter Roeck
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