* [PATCH] drm/i915/display: clean up comments
@ 2022-07-01 20:32 Tom Rix
2022-07-01 23:52 ` Matt Roper
0 siblings, 1 reply; 2+ messages in thread
From: Tom Rix @ 2022-07-01 20:32 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin,
airlied, daniel, jose.souza, jouni.hogander, gwan-gyeong.mun,
ville.syrjala, matthew.d.roper
Cc: intel-gfx, dri-devel, linux-kernel, Tom Rix
spelling changes
resoluition -> resolution
dont -> don't
commmit -> commit
Invalidade -> Invalidate
Signed-off-by: Tom Rix <trix@redhat.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 7d61c55184e5..e6a870641cd2 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -555,7 +555,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
/*
* TODO: 7 lines of IO_BUFFER_WAKE and FAST_WAKE are default
* values from BSpec. In order to setting an optimal power
- * consumption, lower than 4k resoluition mode needs to decrese
+ * consumption, lower than 4k resolution mode needs to decrease
* IO_BUFFER_WAKE and FAST_WAKE. And higher than 4K resolution
* mode needs to increase IO_BUFFER_WAKE and FAST_WAKE.
*/
@@ -959,7 +959,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
int psr_setup_time;
/*
- * Current PSR panels dont work reliably with VRR enabled
+ * Current PSR panels don't work reliably with VRR enabled
* So if VRR is enabled, do not enable PSR.
*/
if (crtc_state->vrr.enable)
@@ -1664,7 +1664,7 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c
*
* Plane scaling and rotation is not supported by selective fetch and both
* properties can change without a modeset, so need to be check at every
- * atomic commmit.
+ * atomic commit.
*/
static bool psr2_sel_fetch_plane_state_supported(const struct intel_plane_state *plane_state)
{
@@ -2203,7 +2203,7 @@ static void _psr_invalidate_handle(struct intel_dp *intel_dp)
}
/**
- * intel_psr_invalidate - Invalidade PSR
+ * intel_psr_invalidate - Invalidate PSR
* @dev_priv: i915 device
* @frontbuffer_bits: frontbuffer plane tracking bits
* @origin: which operation caused the invalidate
--
2.27.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] drm/i915/display: clean up comments
2022-07-01 20:32 [PATCH] drm/i915/display: clean up comments Tom Rix
@ 2022-07-01 23:52 ` Matt Roper
0 siblings, 0 replies; 2+ messages in thread
From: Matt Roper @ 2022-07-01 23:52 UTC (permalink / raw)
To: Tom Rix
Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, tvrtko.ursulin,
airlied, daniel, jose.souza, jouni.hogander, gwan-gyeong.mun,
ville.syrjala, intel-gfx, dri-devel, linux-kernel
On Fri, Jul 01, 2022 at 04:32:36PM -0400, Tom Rix wrote:
> spelling changes
> resoluition -> resolution
> dont -> don't
> commmit -> commit
> Invalidade -> Invalidate
>
> Signed-off-by: Tom Rix <trix@redhat.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
and applied to drm-intel-next. Thanks for the patch.
Matt
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 7d61c55184e5..e6a870641cd2 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -555,7 +555,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
> /*
> * TODO: 7 lines of IO_BUFFER_WAKE and FAST_WAKE are default
> * values from BSpec. In order to setting an optimal power
> - * consumption, lower than 4k resoluition mode needs to decrese
> + * consumption, lower than 4k resolution mode needs to decrease
> * IO_BUFFER_WAKE and FAST_WAKE. And higher than 4K resolution
> * mode needs to increase IO_BUFFER_WAKE and FAST_WAKE.
> */
> @@ -959,7 +959,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> int psr_setup_time;
>
> /*
> - * Current PSR panels dont work reliably with VRR enabled
> + * Current PSR panels don't work reliably with VRR enabled
> * So if VRR is enabled, do not enable PSR.
> */
> if (crtc_state->vrr.enable)
> @@ -1664,7 +1664,7 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c
> *
> * Plane scaling and rotation is not supported by selective fetch and both
> * properties can change without a modeset, so need to be check at every
> - * atomic commmit.
> + * atomic commit.
> */
> static bool psr2_sel_fetch_plane_state_supported(const struct intel_plane_state *plane_state)
> {
> @@ -2203,7 +2203,7 @@ static void _psr_invalidate_handle(struct intel_dp *intel_dp)
> }
>
> /**
> - * intel_psr_invalidate - Invalidade PSR
> + * intel_psr_invalidate - Invalidate PSR
> * @dev_priv: i915 device
> * @frontbuffer_bits: frontbuffer plane tracking bits
> * @origin: which operation caused the invalidate
> --
> 2.27.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
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