[PATCH v5 0/3] Microchip LAN966x USB device support

[PATCH v5 0/3] Microchip LAN966x USB device support

[Herve Codina]

Hi,

This series add support for the USB device controller available on
the Microchip LAN966x SOCs (LAN9662 and LAN9668).

Both SOCs have the same controller and this controller is also the
same as the one present on the SAMAD3 SOC.

Regards,
Herve

Changes v2:
- Avoid wildcards in the DT compatible string
- Rename the DT node

Changes v3:
- Add Krzysztof's 'Acked-by' on patch 2/3
- Change node insertion point (sort nodes by base addresses) on patch 3/3

Changes v4:
- rebase on top of v5.19-rc1

Changes v5:
- Rename dts node to avoid the following DTC warnings (make W=1 dtbs):
    ...
    DTC     arch/arm/boot/dts/lan966x-pcb8291.dtb
    arch/arm/boot/dts/lan966x.dtsi:461.21-470.5: Warning (simple_bus_reg):
    /soc/usb@e0808000: simple-bus unit address format error, expected "200000"
    ...

Herve Codina (3):
  clk: lan966x: Fix the lan966x clock gate register address
  dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
  ARM: dts: lan966x: Add UDPHS support

 Documentation/devicetree/bindings/usb/atmel-usb.txt |  3 +++
 arch/arm/boot/dts/lan966x.dtsi                      | 11 +++++++++++
 drivers/clk/clk-lan966x.c                           |  2 +-
 3 files changed, 15 insertions(+), 1 deletion(-)

-- 
2.35.3

[PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

[Herve Codina]

The register address used for the clock gate register is the base
register address coming from first reg map (ie. the generic
clock registers) instead of the second reg map defining the clock
gate register.

Use the correct clock gate register address.

Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 drivers/clk/clk-lan966x.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index d1535ac13e89..81cb90955d68 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c
@@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,
 
 		hw_data->hws[i] =
 			devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
-						  "lan966x", 0, base,
+						  "lan966x", 0, gate_base,
 						  clk_gate_desc[idx].bit_idx,
 						  0, &clk_gate_lock);
 
-- 
2.35.3

[PATCH v5 2/3] dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string

[Herve Codina]

The USB device controller available in the Microchip LAN9662 SOC
is the same IP as the one present in the SAMA5D3 SOC.

Add the LAN9662 compatible string and set the SAMA5D3 compatible
string as a fallback for the LAN9662.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt
index f512f0290728..12183ef47ee4 100644
--- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -87,6 +87,9 @@ Required properties:
 	       "atmel,at91sam9g45-udc"
 	       "atmel,sama5d3-udc"
 	       "microchip,sam9x60-udc"
+	       "microchip,lan9662-udc"
+	       For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
+	       is required.
  - reg: Address and length of the register set for the device
  - interrupts: Should contain usba interrupt
  - clocks: Should reference the peripheral and host clocks
-- 
2.35.3

[PATCH v5 3/3] ARM: dts: lan966x: Add UDPHS support

[Herve Codina]

Add UDPHS (the USB High Speed Device Port controller) support.

The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
 arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 3cb02fffe716..a54fee5254a4 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -84,6 +84,17 @@ soc {
 		#size-cells = <1>;
 		ranges;
 
+		udc: usb@200000 {
+			compatible = "microchip,lan9662-udc",
+				     "atmel,sama5d3-udc";
+			reg = <0x00200000 0x80000>,
+			      <0xe0808000 0x400>;
+			interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
+			clock-names = "pclk", "hclk";
+			status = "disabled";
+		};
+
 		switch: switch@e0000000 {
 			compatible = "microchip,lan966x-switch";
 			reg = <0xe0000000 0x0100000>,
-- 
2.35.3

Re: [PATCH v5 2/3] dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string

[Claudiu.Beznea]

On 04.07.2022 13:28, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The USB device controller available in the Microchip LAN9662 SOC
> is the same IP as the one present in the SAMA5D3 SOC.
> 
> Add the LAN9662 compatible string and set the SAMA5D3 compatible
> string as a fallback for the LAN9662.
> 
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Applied to at91-dt, thanks!

> ---
>  Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt
> index f512f0290728..12183ef47ee4 100644
> --- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
> +++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
> @@ -87,6 +87,9 @@ Required properties:
>                "atmel,at91sam9g45-udc"
>                "atmel,sama5d3-udc"
>                "microchip,sam9x60-udc"
> +              "microchip,lan9662-udc"
> +              For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
> +              is required.
>   - reg: Address and length of the register set for the device
>   - interrupts: Should contain usba interrupt
>   - clocks: Should reference the peripheral and host clocks
> --
> 2.35.3
> 

Re: [PATCH v5 3/3] ARM: dts: lan966x: Add UDPHS support

[Claudiu.Beznea]

On 04.07.2022 13:28, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> Add UDPHS (the USB High Speed Device Port controller) support.
> 
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
> 
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

Applied to at91-dt, thanks!

> ---
>  arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 3cb02fffe716..a54fee5254a4 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -84,6 +84,17 @@ soc {
>                 #size-cells = <1>;
>                 ranges;
> 
> +               udc: usb@200000 {
> +                       compatible = "microchip,lan9662-udc",
> +                                    "atmel,sama5d3-udc";
> +                       reg = <0x00200000 0x80000>,
> +                             <0xe0808000 0x400>;
> +                       interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> +                       clock-names = "pclk", "hclk";
> +                       status = "disabled";
> +               };
> +
>                 switch: switch@e0000000 {
>                         compatible = "microchip,lan966x-switch";
>                         reg = <0xe0000000 0x0100000>,
> --
> 2.35.3
> 

Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

[Claudiu.Beznea]

On 04.07.2022 13:28, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
> 
> Use the correct clock gate register address.
> 
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>


> ---
>  drivers/clk/clk-lan966x.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> index d1535ac13e89..81cb90955d68 100644
> --- a/drivers/clk/clk-lan966x.c
> +++ b/drivers/clk/clk-lan966x.c
> @@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,
> 
>                 hw_data->hws[i] =
>                         devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
> -                                                 "lan966x", 0, base,
> +                                                 "lan966x", 0, gate_base,
>                                                   clk_gate_desc[idx].bit_idx,
>                                                   0, &clk_gate_lock);
> 
> --
> 2.35.3
> 

Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

[Michael Walle]

> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
> 
> Use the correct clock gate register address.
> 
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>

Tested-by: Michael Walle <michael@walle.cc>

Re: [PATCH v5 1/3] clk: lan966x: Fix the lan966x clock gate register address

[Stephen Boyd]

Quoting Herve Codina (2022-07-04 03:28:43)
> The register address used for the clock gate register is the base
> register address coming from first reg map (ie. the generic
> clock registers) instead of the second reg map defining the clock
> gate register.
> 
> Use the correct clock gate register address.
> 
> Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---

Applied to clk-fixes