[PATCH V6 0/6] imx: support i.MX93 SRC and mediamix blk ctrl

[PATCH V6 0/6] imx: support i.MX93 SRC and mediamix blk ctrl

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

V6:
 Per Rob's comments to patch 1:
  Drop the ref to power-domain.yaml
  Describe each item of reg
 Per Randy's comment, drop duplicated support in Kconfig
 Per kernel test robot, use `void __iomem *` instead `void * __iomem`
 not default select PM_GENERIC_DOMAINS for SOC_IMX9
 
V5:
 Update bindings for SRC, remove the slices node
   Although there are several mix-slices, mem-slices, but actually
   they should work together, so I use one node to group a mix/mem with
   dual reg entries.
 Add SRC driver to include a driver to populate subnodes of SRC node
 Restructure SRC-PD driver, because slices node dropped.
 Drop the patch to export of_clk_bulk_get_all, which is not needed.

 https://lore.kernel.org/all/20220711062452.3575032-1-peng.fan@oss.nxp.com/

V4:
 Correct including fsl,imx93-power.h, not imx93-power.h in driver

V3:
  Move src yaml to power directory.
  Update slice name to slices

V2:
  yaml fix

This patchset is to support i.MX93 SRC and mediamix blk ctrl.
SRC functions as power domain provider as i.MX8M GPC.
mediamix blk ctrl is similar with i.MX8M blk ctrl, but much simplier from
software view.

Export of_clk_bulk_get_all for driver usage.

Add bindings and dts node

Peng Fan (6):
  dt-bindings: soc: add i.MX93 SRC
  dt-bindings: soc: add i.MX93 mediamix blk ctrl
  soc: imx: add i.MX93 SRC power domain driver
  soc: imx: add i.MX93 media blk ctrl driver
  arm64: dts: imx93: add src node
  arm64: dts: imx93: add mediamix blk ctrl node

 .../soc/imx/fsl,imx93-media-blk-ctrl.yaml     |  80 +++++
 .../bindings/soc/imx/fsl,imx93-src.yaml       |  96 +++++
 arch/arm64/boot/dts/freescale/imx93.dtsi      |  37 ++
 drivers/soc/imx/Kconfig                       |   8 +
 drivers/soc/imx/Makefile                      |   1 +
 drivers/soc/imx/imx93-blk-ctrl.c              | 333 ++++++++++++++++++
 drivers/soc/imx/imx93-pd.c                    | 163 +++++++++
 drivers/soc/imx/imx93-src.c                   |  32 ++
 include/dt-bindings/power/fsl,imx93-power.h   |  15 +
 9 files changed, 765 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
 create mode 100644 drivers/soc/imx/imx93-blk-ctrl.c
 create mode 100644 drivers/soc/imx/imx93-pd.c
 create mode 100644 drivers/soc/imx/imx93-src.c
 create mode 100644 include/dt-bindings/power/fsl,imx93-power.h

-- 
2.25.1

[PATCH V6 1/6] dt-bindings: soc: add i.MX93 SRC

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
resets and power gating for mixes.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 .../bindings/soc/imx/fsl,imx93-src.yaml       | 96 +++++++++++++++++++
 1 file changed, 96 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
new file mode 100644
index 000000000000..c1cc69b51981
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
@@ -0,0 +1,96 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 System Reset Controller
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description: |
+  The System Reset Controller (SRC) is responsible for the generation of
+  all the system reset signals and boot argument latching.
+
+  Its main functions are as follows,
+  - Deals with all global system reset sources from other modules,
+    and generates global system reset.
+  - Responsible for power gating of MIXs (Slices) and their memory
+    low power control.
+
+properties:
+  compatible:
+    items:
+      - const: fsl,imx93-src
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  ranges: true
+
+  '#address-cells':
+    const: 1
+
+  '#size-cells':
+    const: 1
+
+patternProperties:
+  "power-domain@[0-9a-f]+$":
+
+    type: object
+    properties:
+      compatible:
+        items:
+          - const: fsl,imx93-src-slice
+
+      '#power-domain-cells':
+        const: 0
+
+      reg:
+        items:
+          - description: mix slice register region
+          - description: mem slice register region
+
+      clocks:
+        description: |
+          A number of phandles to clocks that need to be enabled
+          during domain power-up sequencing to ensure reset
+          propagation into devices located inside this power domain.
+        minItems: 1
+        maxItems: 5
+
+    required:
+      - compatible
+      - '#power-domain-cells'
+      - reg
+
+required:
+  - compatible
+  - reg
+  - ranges
+  - '#address-cells'
+  - '#size-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx93-clock.h>
+
+    system-controller@44460000 {
+        compatible = "fsl,imx93-src", "syscon";
+        reg = <0x44460000 0x10000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        ranges;
+
+        mediamix: power-domain@0 {
+            compatible = "fsl,imx93-src-slice";
+            reg = <0x44462400 0x400>, <0x44465800 0x400>;
+            #power-domain-cells = <0>;
+            clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+                     <&clk IMX93_CLK_MEDIA_APB>;
+        };
+    };
-- 
2.25.1

[PATCH V6 2/6] dt-bindings: soc: add i.MX93 mediamix blk ctrl

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add DT bindings for i.MX93 MEDIAMIX BLK CTRL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
 .../soc/imx/fsl,imx93-media-blk-ctrl.yaml     | 80 +++++++++++++++++++
 include/dt-bindings/power/fsl,imx93-power.h   | 15 ++++
 2 files changed, 95 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
 create mode 100644 include/dt-bindings/power/fsl,imx93-power.h

diff --git a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
new file mode 100644
index 000000000000..792ebecec22d
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: NXP i.MX93 Media blk-ctrl
+
+maintainers:
+  - Peng Fan <peng.fan@nxp.com>
+
+description:
+  The i.MX93 MEDIAMIX domain contains control and status registers known
+  as MEDIAMIX Block Control (MEDIAMIX BLK_CTRL). These registers include
+  clocking, reset, and miscellaneous top-level controls for peripherals
+  within the MEDIAMIX domain
+
+properties:
+  compatible:
+    items:
+      - const: fsl,imx93-media-blk-ctrl
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  '#power-domain-cells':
+    const: 1
+
+  power-domains:
+    maxItems: 1
+
+  clocks:
+    maxItems: 10
+
+  clock-names:
+    items:
+      - const: apb
+      - const: axi
+      - const: nic
+      - const: disp
+      - const: cam
+      - const: pxp
+      - const: lcdif
+      - const: isi
+      - const: csi
+      - const: dsi
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/imx93-clock.h>
+    #include <dt-bindings/power/fsl,imx93-power.h>
+
+    media_blk_ctrl: system-controller@4ac10000 {
+      compatible = "fsl,imx93-media-blk-ctrl", "syscon";
+      reg = <0x4ac10000 0x10000>;
+      power-domains = <&mediamix>;
+      clocks = <&clk IMX93_CLK_MEDIA_APB>,
+               <&clk IMX93_CLK_MEDIA_AXI>,
+               <&clk IMX93_CLK_NIC_MEDIA_GATE>,
+               <&clk IMX93_CLK_MEDIA_DISP_PIX>,
+               <&clk IMX93_CLK_CAM_PIX>,
+               <&clk IMX93_CLK_PXP_GATE>,
+               <&clk IMX93_CLK_LCDIF_GATE>,
+               <&clk IMX93_CLK_ISI_GATE>,
+               <&clk IMX93_CLK_MIPI_CSI_GATE>,
+               <&clk IMX93_CLK_MIPI_DSI_GATE>;
+               clock-names = "apb", "axi", "nic", "disp", "cam",
+                             "pxp", "lcdif", "isi", "csi", "dsi";
+      #power-domain-cells = <1>;
+    };
diff --git a/include/dt-bindings/power/fsl,imx93-power.h b/include/dt-bindings/power/fsl,imx93-power.h
new file mode 100644
index 000000000000..17f9f015bf7d
--- /dev/null
+++ b/include/dt-bindings/power/fsl,imx93-power.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ *  Copyright 2022 NXP
+ */
+
+#ifndef __DT_BINDINGS_IMX93_POWER_H__
+#define __DT_BINDINGS_IMX93_POWER_H__
+
+#define IMX93_MEDIABLK_PD_MIPI_DSI		0
+#define IMX93_MEDIABLK_PD_MIPI_CSI		1
+#define IMX93_MEDIABLK_PD_PXP			2
+#define IMX93_MEDIABLK_PD_LCDIF			3
+#define IMX93_MEDIABLK_PD_ISI			4
+
+#endif
-- 
2.25.1

[PATCH V6 3/6] soc: imx: add i.MX93 SRC power domain driver

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Support controlling power domain managed by System Reset
Controller(SRC). Current supported power domain is mediamix power
domain.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Kconfig     |   8 ++
 drivers/soc/imx/Makefile    |   1 +
 drivers/soc/imx/imx93-pd.c  | 163 ++++++++++++++++++++++++++++++++++++
 drivers/soc/imx/imx93-src.c |  32 +++++++
 4 files changed, 204 insertions(+)
 create mode 100644 drivers/soc/imx/imx93-pd.c
 create mode 100644 drivers/soc/imx/imx93-src.c

diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
index a840494e849a..4b906791d6c7 100644
--- a/drivers/soc/imx/Kconfig
+++ b/drivers/soc/imx/Kconfig
@@ -20,4 +20,12 @@ config SOC_IMX8M
 	  support, it will provide the SoC info like SoC family,
 	  ID and revision etc.
 
+config SOC_IMX9
+	tristate "i.MX9 SoC family support"
+	depends on ARCH_MXC || COMPILE_TEST
+	default ARCH_MXC && ARM64
+	select SOC_BUS
+	help
+	  If you say yes here, you get support for the NXP i.MX9 family
+
 endmenu
diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index 63cd29f6d4d2..a0baa2a01adb 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
 obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
 obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
 obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
+obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
diff --git a/drivers/soc/imx/imx93-pd.c b/drivers/soc/imx/imx93-pd.c
new file mode 100644
index 000000000000..48437c303b78
--- /dev/null
+++ b/drivers/soc/imx/imx93-pd.c
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 NXP
+ */
+
+#include <linux/clk.h>
+#include <linux/of_device.h>
+#include <linux/delay.h>
+#include <linux/iopoll.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+
+#define MIX_SLICE_SW_CTRL_OFF		0x20
+#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK	BIT(4)
+#define SLICE_SW_CTRL_PDN_SOFT_MASK	BIT(31)
+
+#define MIX_FUNC_STAT_OFF		0xB4
+
+#define FUNC_STAT_PSW_STAT_MASK		BIT(0)
+#define FUNC_STAT_RST_STAT_MASK		BIT(2)
+#define FUNC_STAT_ISO_STAT_MASK		BIT(4)
+
+struct imx93_power_domain {
+	struct generic_pm_domain genpd;
+	struct device *dev;
+	void __iomem *addr;
+	struct clk_bulk_data *clks;
+	int num_clks;
+	bool init_off;
+};
+
+#define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
+
+static int imx93_pd_on(struct generic_pm_domain *genpd)
+{
+	struct imx93_power_domain *domain = to_imx93_pd(genpd);
+	void __iomem *addr = domain->addr;
+	u32 val;
+	int ret;
+
+	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
+	if (ret) {
+		dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
+		return ret;
+	}
+
+	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
+	val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
+	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
+
+	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
+				 !(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
+	if (ret) {
+		dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int imx93_pd_off(struct generic_pm_domain *genpd)
+{
+	struct imx93_power_domain *domain = to_imx93_pd(genpd);
+	void __iomem *addr = domain->addr;
+	int ret;
+	u32 val;
+
+	/* Power off MIX */
+	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
+	val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
+	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
+
+	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
+				 val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
+	if (ret) {
+		dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
+		return ret;
+	}
+
+	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
+
+	return 0;
+};
+
+static int imx93_pd_remove(struct platform_device *pdev)
+{
+	struct imx93_power_domain *domain = platform_get_drvdata(pdev);
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+
+	if (!domain->init_off)
+		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
+
+	of_genpd_del_provider(np);
+	pm_genpd_remove(&domain->genpd);
+
+	return 0;
+}
+
+static int imx93_pd_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct device_node *np = dev->of_node;
+	struct imx93_power_domain *domain;
+	int ret;
+
+	domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
+	if (!domain)
+		return -ENOMEM;
+	domain->addr = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(domain->addr))
+		return PTR_ERR(domain->addr);
+
+
+	domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
+	if (domain->num_clks < 0)
+		return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
+
+	domain->genpd.name = dev_name(dev);
+	domain->genpd.power_off = imx93_pd_off;
+	domain->genpd.power_on = imx93_pd_on;
+	domain->dev = dev;
+
+	domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
+	/* Just to sync the status of hardware */
+	if (!domain->init_off) {
+		ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
+		if (ret) {
+			dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
+				domain->genpd.name);
+			return 0;
+		}
+	}
+
+	ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
+	if (ret)
+		return ret;
+
+	platform_set_drvdata(pdev, domain);
+
+	return of_genpd_add_provider_simple(np, &domain->genpd);
+}
+
+static const struct of_device_id imx93_dt_ids[] = {
+	{ .compatible = "fsl,imx93-src-slice" },
+	{ }
+};
+
+static struct platform_driver imx93_power_domain_driver = {
+	.driver = {
+		.name	= "imx93_power_domain",
+		.owner	= THIS_MODULE,
+		.of_match_table = imx93_dt_ids,
+	},
+	.probe = imx93_pd_probe,
+	.remove = imx93_pd_remove,
+};
+module_platform_driver(imx93_power_domain_driver);
+
+MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
+MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/soc/imx/imx93-src.c b/drivers/soc/imx/imx93-src.c
new file mode 100644
index 000000000000..6f14c241538e
--- /dev/null
+++ b/drivers/soc/imx/imx93-src.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright 2022 NXP
+ */
+
+#include <linux/module.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+static int imx93_src_probe(struct platform_device *pdev)
+{
+	return devm_of_platform_populate(&pdev->dev);
+}
+
+static const struct of_device_id imx93_dt_ids[] = {
+	{ .compatible = "fsl,imx93-src" },
+	{ }
+};
+
+static struct platform_driver imx93_src_driver = {
+	.driver = {
+		.name	= "imx93_src",
+		.owner	= THIS_MODULE,
+		.of_match_table = imx93_dt_ids,
+	},
+	.probe = imx93_src_probe,
+};
+module_platform_driver(imx93_src_driver);
+
+MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
+MODULE_DESCRIPTION("NXP i.MX93 src driver");
+MODULE_LICENSE("GPL");
-- 
2.25.1

[PATCH V6 4/6] soc: imx: add i.MX93 media blk ctrl driver

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 mediamix blk ctrl support.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/soc/imx/Makefile         |   2 +-
 drivers/soc/imx/imx93-blk-ctrl.c | 333 +++++++++++++++++++++++++++++++
 2 files changed, 334 insertions(+), 1 deletion(-)
 create mode 100644 drivers/soc/imx/imx93-blk-ctrl.c

diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
index a0baa2a01adb..754866e0a10d 100644
--- a/drivers/soc/imx/Makefile
+++ b/drivers/soc/imx/Makefile
@@ -7,4 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
 obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
 obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
 obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
-obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
+obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o imx93-blk-ctrl.o
diff --git a/drivers/soc/imx/imx93-blk-ctrl.c b/drivers/soc/imx/imx93-blk-ctrl.c
new file mode 100644
index 000000000000..42be09688cf1
--- /dev/null
+++ b/drivers/soc/imx/imx93-blk-ctrl.c
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/*
+ * Copyright 2022 NXP, Peng Fan <peng.fan@nxp.com>
+ */
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/pm_domain.h>
+#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
+#include <linux/clk.h>
+
+#include <dt-bindings/power/fsl,imx93-power.h>
+
+#define BLK_SFT_RSTN	0x0
+#define BLK_CLK_EN	0x4
+
+#define BLK_MAX_CLKS 4
+
+struct imx93_blk_ctrl_domain;
+
+struct imx93_blk_ctrl {
+	struct device *dev;
+	struct regmap *regmap;
+	int num_clks;
+	struct clk_bulk_data clks[BLK_MAX_CLKS];
+	struct imx93_blk_ctrl_domain *domains;
+	struct genpd_onecell_data onecell_data;
+};
+
+struct imx93_blk_ctrl_domain_data {
+	const char *name;
+	const char * const *clk_names;
+	int num_clks;
+	u32 rst_mask;
+	u32 clk_mask;
+
+};
+
+#define DOMAIN_MAX_CLKS 4
+
+struct imx93_blk_ctrl_domain {
+	struct generic_pm_domain genpd;
+	const struct imx93_blk_ctrl_domain_data *data;
+	struct clk_bulk_data clks[DOMAIN_MAX_CLKS];
+	struct imx93_blk_ctrl *bc;
+};
+
+struct imx93_blk_ctrl_data {
+	int max_reg;
+	const struct imx93_blk_ctrl_domain_data *domains;
+	const struct imx93_blk_ctrl_domain_data *bus;
+	int num_domains;
+};
+
+static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_bus_data = {
+	.clk_names = (const char *[]){ "axi", "apb", "nic", },
+	.num_clks = 3,
+};
+
+static inline struct imx93_blk_ctrl_domain *
+to_imx93_blk_ctrl_domain(struct generic_pm_domain *genpd)
+{
+	return container_of(genpd, struct imx93_blk_ctrl_domain, genpd);
+}
+
+static int imx93_blk_ctrl_power_on(struct generic_pm_domain *genpd)
+{
+	struct imx93_blk_ctrl_domain *domain = to_imx93_blk_ctrl_domain(genpd);
+	const struct imx93_blk_ctrl_domain_data *data = domain->data;
+	struct imx93_blk_ctrl *bc = domain->bc;
+	int ret;
+
+	ret = clk_bulk_prepare_enable(bc->num_clks, bc->clks);
+	if (ret) {
+		dev_err(bc->dev, "failed to enable bus clocks\n");
+		return ret;
+	}
+
+	ret = clk_bulk_prepare_enable(data->num_clks, domain->clks);
+	if (ret) {
+		dev_err(bc->dev, "failed to enable clocks\n");
+		return ret;
+	}
+
+	ret = pm_runtime_get_sync(bc->dev);
+	if (ret < 0) {
+		pm_runtime_put_noidle(bc->dev);
+		dev_err(bc->dev, "failed to power up domain\n");
+		goto disable_clk;
+	}
+
+	/* ungate clk */
+	regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
+	/* release reset */
+	regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
+
+	dev_info(bc->dev, "pd_on: name: %s\n", genpd->name);
+
+	return 0;
+
+disable_clk:
+	clk_bulk_disable_unprepare(data->num_clks, domain->clks);
+
+	return ret;
+}
+
+static int imx93_blk_ctrl_power_off(struct generic_pm_domain *genpd)
+{
+	struct imx93_blk_ctrl_domain *domain = to_imx93_blk_ctrl_domain(genpd);
+	const struct imx93_blk_ctrl_domain_data *data = domain->data;
+	struct imx93_blk_ctrl *bc = domain->bc;
+
+	dev_info(bc->dev, "pd_off: name: %s\n", genpd->name);
+
+	regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
+	regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
+
+	pm_runtime_put(bc->dev);
+
+	clk_bulk_disable_unprepare(data->num_clks, domain->clks);
+
+	clk_bulk_disable_unprepare(bc->num_clks, bc->clks);
+
+	return 0;
+}
+
+static struct generic_pm_domain *
+imx93_blk_ctrl_xlate(struct of_phandle_args *args, void *data)
+{
+	struct genpd_onecell_data *onecell_data = data;
+	unsigned int index = args->args[0];
+
+	if (args->args_count != 1 ||
+	    index >= onecell_data->num_domains)
+		return ERR_PTR(-EINVAL);
+
+	return onecell_data->domains[index];
+}
+
+static int imx93_blk_ctrl_probe(struct platform_device *pdev)
+{
+	const struct imx93_blk_ctrl_data *bc_data;
+	struct device *dev = &pdev->dev;
+	struct imx93_blk_ctrl *bc;
+	void __iomem *base;
+	int i, ret;
+	const struct imx93_blk_ctrl_domain_data *bus;
+
+	struct regmap_config regmap_config = {
+		.reg_bits	= 32,
+		.val_bits	= 32,
+		.reg_stride	= 4,
+	};
+
+	bc = devm_kzalloc(dev, sizeof(*bc), GFP_KERNEL);
+	if (!bc)
+		return -ENOMEM;
+
+	bc->dev = dev;
+
+	bc_data = of_device_get_match_data(dev);
+
+	base = devm_platform_ioremap_resource(pdev, 0);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	regmap_config.max_register = bc_data->max_reg;
+	bc->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
+	if (IS_ERR(bc->regmap))
+		return dev_err_probe(dev, PTR_ERR(bc->regmap),
+				     "failed to init regmap\n");
+
+	bc->domains = devm_kcalloc(dev, bc_data->num_domains + 1,
+				   sizeof(struct imx93_blk_ctrl_domain),
+				   GFP_KERNEL);
+	if (!bc->domains)
+		return -ENOMEM;
+
+	bus = bc_data->bus;
+
+	bc->onecell_data.num_domains = bc_data->num_domains;
+	bc->onecell_data.xlate = imx93_blk_ctrl_xlate;
+	bc->onecell_data.domains =
+		devm_kcalloc(dev, bc_data->num_domains,
+			     sizeof(struct generic_pm_domain *), GFP_KERNEL);
+	if (!bc->onecell_data.domains)
+		return -ENOMEM;
+
+	for (i = 0; i < bus->num_clks; i++)
+		bc->clks[i].id = bus->clk_names[i];
+	bc->num_clks = bus->num_clks;
+
+	ret = devm_clk_bulk_get(dev, bc->num_clks, bc->clks);
+	if (ret) {
+		dev_err_probe(dev, ret, "failed to get bus clock\n");
+		return ret;
+	}
+
+	for (i = 0; i < bc_data->num_domains; i++) {
+		const struct imx93_blk_ctrl_domain_data *data = &bc_data->domains[i];
+		struct imx93_blk_ctrl_domain *domain = &bc->domains[i];
+		int j;
+
+		domain->data = data;
+
+		for (j = 0; j < data->num_clks; j++)
+			domain->clks[j].id = data->clk_names[j];
+
+		ret = devm_clk_bulk_get(dev, data->num_clks, domain->clks);
+		if (ret) {
+			dev_err_probe(dev, ret, "failed to get clock\n");
+			goto cleanup_pds;
+		}
+
+		domain->genpd.name = data->name;
+		domain->genpd.power_on = imx93_blk_ctrl_power_on;
+		domain->genpd.power_off = imx93_blk_ctrl_power_off;
+		domain->bc = bc;
+
+		ret = pm_genpd_init(&domain->genpd, NULL, true);
+		if (ret) {
+			dev_err_probe(dev, ret, "failed to init power domain\n");
+			goto cleanup_pds;
+		}
+
+		bc->onecell_data.domains[i] = &domain->genpd;
+	}
+
+	pm_runtime_enable(dev);
+
+	ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data);
+	if (ret) {
+		dev_err_probe(dev, ret, "failed to add power domain provider\n");
+		goto cleanup_pds;
+	}
+
+
+	dev_set_drvdata(dev, bc);
+
+	return 0;
+
+cleanup_pds:
+	for (i--; i >= 0; i--)
+		pm_genpd_remove(&bc->domains[i].genpd);
+
+	return ret;
+}
+
+static int imx93_blk_ctrl_remove(struct platform_device *pdev)
+{
+	struct imx93_blk_ctrl *bc = dev_get_drvdata(&pdev->dev);
+	int i;
+
+	of_genpd_del_provider(pdev->dev.of_node);
+
+	for (i = 0; bc->onecell_data.num_domains; i++) {
+		struct imx93_blk_ctrl_domain *domain = &bc->domains[i];
+
+		pm_genpd_remove(&domain->genpd);
+	}
+
+	return 0;
+}
+
+static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] = {
+	[IMX93_MEDIABLK_PD_MIPI_DSI] = {
+		.name = "mediablk-mipi-dsi",
+		.clk_names = (const char *[]){ "dsi" },
+		.num_clks = 1,
+		.rst_mask = BIT(11) | BIT(12),
+		.clk_mask = BIT(11) | BIT(12),
+	},
+	[IMX93_MEDIABLK_PD_MIPI_CSI] = {
+		.name = "mediablk-mipi-csi",
+		.clk_names = (const char *[]){ "cam", "csi" },
+		.num_clks = 2,
+		.rst_mask = BIT(9) | BIT(10),
+		.clk_mask = BIT(9) | BIT(10),
+	},
+	[IMX93_MEDIABLK_PD_PXP] = {
+		.name = "mediablk-pxp",
+		.clk_names = (const char *[]){ "pxp" },
+		.num_clks = 1,
+		.rst_mask = BIT(7) | BIT(8),
+		.clk_mask = BIT(7) | BIT(8),
+	},
+	[IMX93_MEDIABLK_PD_LCDIF] = {
+		.name = "mediablk-lcdif",
+		.clk_names = (const char *[]){ "disp", "lcdif" },
+		.num_clks = 2,
+		.rst_mask = BIT(4) | BIT(5) | BIT(6),
+		.clk_mask = BIT(4) | BIT(5) | BIT(6),
+	},
+	[IMX93_MEDIABLK_PD_ISI] = {
+		.name = "mediablk-isi",
+		.clk_names = (const char *[]){ "isi" },
+		.num_clks = 1,
+		.rst_mask = BIT(2) | BIT(3),
+		.clk_mask = BIT(2) | BIT(3),
+	},
+};
+
+static const struct imx93_blk_ctrl_data imx93_media_blk_ctl_dev_data = {
+	.max_reg = 0x90,
+	.domains = imx93_media_blk_ctl_domain_data,
+	.bus = &imx93_media_blk_ctl_bus_data,
+	.num_domains = ARRAY_SIZE(imx93_media_blk_ctl_domain_data),
+};
+
+static const struct of_device_id imx93_blk_ctrl_of_match[] = {
+	{
+		.compatible = "fsl,imx93-media-blk-ctrl",
+		.data = &imx93_media_blk_ctl_dev_data
+	}, {
+		/* Sentinel */
+	}
+};
+MODULE_DEVICE_TABLE(of, imx93_blk_ctrl_of_match);
+
+static struct platform_driver imx93_blk_ctrl_driver = {
+	.probe = imx93_blk_ctrl_probe,
+	.remove = imx93_blk_ctrl_remove,
+	.driver = {
+		.name = "imx93-blk-ctrl",
+		.of_match_table = imx93_blk_ctrl_of_match,
+	},
+};
+module_platform_driver(imx93_blk_ctrl_driver);
-- 
2.25.1

[PATCH V6 5/6] arm64: dts: imx93: add src node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 SRC node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index f83a07c7c9b1..883d38920db4 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -161,6 +161,22 @@ clk: clock-controller@44450000 {
 				status = "okay";
 			};
 
+			src: system-controller@44460000 {
+				compatible = "fsl,imx93-src", "syscon";
+				reg = <0x44460000 0x10000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges;
+
+				mediamix: power-domain@8 {
+					compatible = "fsl,imx93-src-slice";
+					reg = <0x44462400 0x400>, <0x44465800 0x400>;
+					#power-domain-cells = <0>;
+					clocks = <&clk IMX93_CLK_MEDIA_AXI>,
+						 <&clk IMX93_CLK_MEDIA_APB>;
+				};
+			};
+
 			anatop: anatop@44480000 {
 				compatible = "fsl,imx93-anatop", "syscon";
 				reg = <0x44480000 0x10000>;
-- 
2.25.1

[PATCH V6 6/6] arm64: dts: imx93: add mediamix blk ctrl node

[Peng Fan (OSS)]

From: Peng Fan <peng.fan@nxp.com>

Add i.MX93 mediamix blk ctrl node

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx93.dtsi | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 883d38920db4..7b93e5037a27 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/fsl,imx93-power.h>
 
 #include "imx93-pinfunc.h"
 
@@ -346,5 +347,25 @@ gpio1: gpio@47400080 {
 			#interrupt-cells = <2>;
 			gpio-ranges = <&iomuxc 0 0 32>;
 		};
+
+		media_blk_ctrl: power-controller@4ac10000 {
+			compatible = "fsl,imx93-media-blk-ctrl", "syscon";
+			reg = <0x4ac10000 0x10000>;
+			power-domains = <&mediamix>;
+			clocks = <&clk IMX93_CLK_MEDIA_APB>,
+				 <&clk IMX93_CLK_MEDIA_AXI>,
+				 <&clk IMX93_CLK_NIC_MEDIA_GATE>,
+				 <&clk IMX93_CLK_MEDIA_DISP_PIX>,
+				 <&clk IMX93_CLK_CAM_PIX>,
+				 <&clk IMX93_CLK_PXP_GATE>,
+				 <&clk IMX93_CLK_LCDIF_GATE>,
+				 <&clk IMX93_CLK_ISI_GATE>,
+				 <&clk IMX93_CLK_MIPI_CSI_GATE>,
+				 <&clk IMX93_CLK_MIPI_DSI_GATE>;
+			clock-names = "apb", "axi", "nic", "disp", "cam",
+				      "pxp", "lcdif", "isi", "csi", "dsi";
+			#power-domain-cells = <1>;
+			status = "disabled";
+		};
 	};
 };
-- 
2.25.1

Re: [PATCH V6 1/6] dt-bindings: soc: add i.MX93 SRC

[Rob Herring]

On Tue, 19 Jul 2022 15:35:36 +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add bindings for i.MX93 System Reset Controller(SRC). SRC supports
> resets and power gating for mixes.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  .../bindings/soc/imx/fsl,imx93-src.yaml       | 96 +++++++++++++++++++
>  1 file changed, 96 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/soc/imx/fsl,imx93-src.yaml
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Re: [PATCH V6 3/6] soc: imx: add i.MX93 SRC power domain driver

[Shawn Guo]

On Tue, Jul 19, 2022 at 03:35:38PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Support controlling power domain managed by System Reset
> Controller(SRC). Current supported power domain is mediamix power
> domain.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Kconfig     |   8 ++
>  drivers/soc/imx/Makefile    |   1 +
>  drivers/soc/imx/imx93-pd.c  | 163 ++++++++++++++++++++++++++++++++++++
>  drivers/soc/imx/imx93-src.c |  32 +++++++

Shouldn't a reset driver go to drivers/reset/?

>  4 files changed, 204 insertions(+)
>  create mode 100644 drivers/soc/imx/imx93-pd.c
>  create mode 100644 drivers/soc/imx/imx93-src.c
> 
> diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig
> index a840494e849a..4b906791d6c7 100644
> --- a/drivers/soc/imx/Kconfig
> +++ b/drivers/soc/imx/Kconfig
> @@ -20,4 +20,12 @@ config SOC_IMX8M
>  	  support, it will provide the SoC info like SoC family,
>  	  ID and revision etc.
>  
> +config SOC_IMX9
> +	tristate "i.MX9 SoC family support"
> +	depends on ARCH_MXC || COMPILE_TEST
> +	default ARCH_MXC && ARM64
> +	select SOC_BUS
> +	help
> +	  If you say yes here, you get support for the NXP i.MX9 family
> +
>  endmenu
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index 63cd29f6d4d2..a0baa2a01adb 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
>  obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
>  obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
>  obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
> +obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
> diff --git a/drivers/soc/imx/imx93-pd.c b/drivers/soc/imx/imx93-pd.c
> new file mode 100644
> index 000000000000..48437c303b78
> --- /dev/null
> +++ b/drivers/soc/imx/imx93-pd.c
> @@ -0,0 +1,163 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2022 NXP
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/of_device.h>
> +#include <linux/delay.h>
> +#include <linux/iopoll.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
> +
> +#define MIX_SLICE_SW_CTRL_OFF		0x20
> +#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK	BIT(4)
> +#define SLICE_SW_CTRL_PDN_SOFT_MASK	BIT(31)
> +
> +#define MIX_FUNC_STAT_OFF		0xB4
> +
> +#define FUNC_STAT_PSW_STAT_MASK		BIT(0)
> +#define FUNC_STAT_RST_STAT_MASK		BIT(2)
> +#define FUNC_STAT_ISO_STAT_MASK		BIT(4)
> +
> +struct imx93_power_domain {
> +	struct generic_pm_domain genpd;
> +	struct device *dev;
> +	void __iomem *addr;
> +	struct clk_bulk_data *clks;
> +	int num_clks;
> +	bool init_off;
> +};
> +
> +#define to_imx93_pd(_genpd) container_of(_genpd, struct imx93_power_domain, genpd)
> +
> +static int imx93_pd_on(struct generic_pm_domain *genpd)
> +{
> +	struct imx93_power_domain *domain = to_imx93_pd(genpd);
> +	void __iomem *addr = domain->addr;
> +	u32 val;
> +	int ret;
> +
> +	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
> +	if (ret) {
> +		dev_err(domain->dev, "failed to enable clocks for domain: %s\n", genpd->name);
> +		return ret;
> +	}
> +
> +	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
> +	val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
> +	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
> +
> +	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
> +				 !(val & FUNC_STAT_ISO_STAT_MASK), 1, 10000);
> +	if (ret) {
> +		dev_err(domain->dev, "pd_on timeout: name: %s, stat: %x\n", genpd->name, val);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static int imx93_pd_off(struct generic_pm_domain *genpd)
> +{
> +	struct imx93_power_domain *domain = to_imx93_pd(genpd);
> +	void __iomem *addr = domain->addr;
> +	int ret;
> +	u32 val;
> +
> +	/* Power off MIX */
> +	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
> +	val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
> +	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
> +
> +	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
> +				 val & FUNC_STAT_PSW_STAT_MASK, 1, 1000);
> +	if (ret) {
> +		dev_err(domain->dev, "pd_off timeout: name: %s, stat: %x\n", genpd->name, val);
> +		return ret;
> +	}
> +
> +	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
> +
> +	return 0;
> +};
> +
> +static int imx93_pd_remove(struct platform_device *pdev)
> +{
> +	struct imx93_power_domain *domain = platform_get_drvdata(pdev);
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +
> +	if (!domain->init_off)
> +		clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
> +
> +	of_genpd_del_provider(np);
> +	pm_genpd_remove(&domain->genpd);
> +
> +	return 0;
> +}
> +
> +static int imx93_pd_probe(struct platform_device *pdev)
> +{
> +	struct device *dev = &pdev->dev;
> +	struct device_node *np = dev->of_node;
> +	struct imx93_power_domain *domain;
> +	int ret;
> +
> +	domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
> +	if (!domain)
> +		return -ENOMEM;

Have a newline.

> +	domain->addr = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(domain->addr))
> +		return PTR_ERR(domain->addr);
> +
> +

One newline is enough.

> +	domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
> +	if (domain->num_clks < 0)
> +		return dev_err_probe(dev, domain->num_clks, "Failed to get domain's clocks\n");
> +
> +	domain->genpd.name = dev_name(dev);
> +	domain->genpd.power_off = imx93_pd_off;
> +	domain->genpd.power_on = imx93_pd_on;
> +	domain->dev = dev;
> +
> +	domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) & FUNC_STAT_ISO_STAT_MASK;
> +	/* Just to sync the status of hardware */
> +	if (!domain->init_off) {
> +		ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
> +		if (ret) {
> +			dev_err(domain->dev, "failed to enable clocks for domain: %s\n",
> +				domain->genpd.name);
> +			return 0;

This is a case of success?

> +		}
> +	}
> +
> +	ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
> +	if (ret)
> +		return ret;
> +
> +	platform_set_drvdata(pdev, domain);
> +
> +	return of_genpd_add_provider_simple(np, &domain->genpd);
> +}
> +
> +static const struct of_device_id imx93_dt_ids[] = {
> +	{ .compatible = "fsl,imx93-src-slice" },
> +	{ }
> +};

MODULE_DEVICE_TABLE()?

Shawn

> +
> +static struct platform_driver imx93_power_domain_driver = {
> +	.driver = {
> +		.name	= "imx93_power_domain",
> +		.owner	= THIS_MODULE,
> +		.of_match_table = imx93_dt_ids,
> +	},
> +	.probe = imx93_pd_probe,
> +	.remove = imx93_pd_remove,
> +};
> +module_platform_driver(imx93_power_domain_driver);
> +
> +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> +MODULE_DESCRIPTION("NXP i.MX93 power domain driver");
> +MODULE_LICENSE("GPL");

"GPL v2" since you have "SPDX-License-Identifier: GPL-2.0" claimed in
the beginning?

Shawn

> diff --git a/drivers/soc/imx/imx93-src.c b/drivers/soc/imx/imx93-src.c
> new file mode 100644
> index 000000000000..6f14c241538e
> --- /dev/null
> +++ b/drivers/soc/imx/imx93-src.c
> @@ -0,0 +1,32 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Copyright 2022 NXP
> + */
> +
> +#include <linux/module.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +
> +static int imx93_src_probe(struct platform_device *pdev)
> +{
> +	return devm_of_platform_populate(&pdev->dev);
> +}
> +
> +static const struct of_device_id imx93_dt_ids[] = {
> +	{ .compatible = "fsl,imx93-src" },
> +	{ }
> +};
> +
> +static struct platform_driver imx93_src_driver = {
> +	.driver = {
> +		.name	= "imx93_src",
> +		.owner	= THIS_MODULE,
> +		.of_match_table = imx93_dt_ids,
> +	},
> +	.probe = imx93_src_probe,
> +};
> +module_platform_driver(imx93_src_driver);
> +
> +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> +MODULE_DESCRIPTION("NXP i.MX93 src driver");
> +MODULE_LICENSE("GPL");
> -- 
> 2.25.1
> 

Re: [PATCH V6 4/6] soc: imx: add i.MX93 media blk ctrl driver

[Shawn Guo]

On Tue, Jul 19, 2022 at 03:35:39PM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> Add i.MX93 mediamix blk ctrl support.
> 
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> ---
>  drivers/soc/imx/Makefile         |   2 +-
>  drivers/soc/imx/imx93-blk-ctrl.c | 333 +++++++++++++++++++++++++++++++
>  2 files changed, 334 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/soc/imx/imx93-blk-ctrl.c
> 
> diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile
> index a0baa2a01adb..754866e0a10d 100644
> --- a/drivers/soc/imx/Makefile
> +++ b/drivers/soc/imx/Makefile
> @@ -7,4 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
>  obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
>  obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
>  obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
> -obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
> +obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o imx93-blk-ctrl.o
> diff --git a/drivers/soc/imx/imx93-blk-ctrl.c b/drivers/soc/imx/imx93-blk-ctrl.c
> new file mode 100644
> index 000000000000..42be09688cf1
> --- /dev/null
> +++ b/drivers/soc/imx/imx93-blk-ctrl.c
> @@ -0,0 +1,333 @@
> +// SPDX-License-Identifier: GPL-2.0+

GPL-2.0 for SRC driver and GPL-2.0+ for this?

> +

No need of newline.

> +/*
> + * Copyright 2022 NXP, Peng Fan <peng.fan@nxp.com>
> + */
> +
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/platform_device.h>
> +#include <linux/pm_domain.h>
> +#include <linux/pm_runtime.h>
> +#include <linux/regmap.h>
> +#include <linux/clk.h>

Sort them alphabetically?

> +
> +#include <dt-bindings/power/fsl,imx93-power.h>
> +
> +#define BLK_SFT_RSTN	0x0
> +#define BLK_CLK_EN	0x4
> +
> +#define BLK_MAX_CLKS 4
> +
> +struct imx93_blk_ctrl_domain;
> +
> +struct imx93_blk_ctrl {
> +	struct device *dev;
> +	struct regmap *regmap;
> +	int num_clks;
> +	struct clk_bulk_data clks[BLK_MAX_CLKS];
> +	struct imx93_blk_ctrl_domain *domains;
> +	struct genpd_onecell_data onecell_data;
> +};
> +
> +struct imx93_blk_ctrl_domain_data {
> +	const char *name;
> +	const char * const *clk_names;
> +	int num_clks;
> +	u32 rst_mask;
> +	u32 clk_mask;
> +
> +};
> +
> +#define DOMAIN_MAX_CLKS 4

Move this up to #define section?

> +
> +struct imx93_blk_ctrl_domain {
> +	struct generic_pm_domain genpd;
> +	const struct imx93_blk_ctrl_domain_data *data;
> +	struct clk_bulk_data clks[DOMAIN_MAX_CLKS];
> +	struct imx93_blk_ctrl *bc;
> +};
> +
> +struct imx93_blk_ctrl_data {
> +	int max_reg;
> +	const struct imx93_blk_ctrl_domain_data *domains;
> +	const struct imx93_blk_ctrl_domain_data *bus;
> +	int num_domains;
> +};
> +
> +static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_bus_data = {
> +	.clk_names = (const char *[]){ "axi", "apb", "nic", },
> +	.num_clks = 3,
> +};

Can this be moved to where imx93_media_blk_ctl_domain_data is defined?

> +
> +static inline struct imx93_blk_ctrl_domain *
> +to_imx93_blk_ctrl_domain(struct generic_pm_domain *genpd)
> +{
> +	return container_of(genpd, struct imx93_blk_ctrl_domain, genpd);
> +}
> +
> +static int imx93_blk_ctrl_power_on(struct generic_pm_domain *genpd)
> +{
> +	struct imx93_blk_ctrl_domain *domain = to_imx93_blk_ctrl_domain(genpd);
> +	const struct imx93_blk_ctrl_domain_data *data = domain->data;
> +	struct imx93_blk_ctrl *bc = domain->bc;
> +	int ret;
> +
> +	ret = clk_bulk_prepare_enable(bc->num_clks, bc->clks);
> +	if (ret) {
> +		dev_err(bc->dev, "failed to enable bus clocks\n");
> +		return ret;
> +	}
> +
> +	ret = clk_bulk_prepare_enable(data->num_clks, domain->clks);
> +	if (ret) {
> +		dev_err(bc->dev, "failed to enable clocks\n");
> +		return ret;

So bc->clks left enabled?

> +	}
> +
> +	ret = pm_runtime_get_sync(bc->dev);
> +	if (ret < 0) {
> +		pm_runtime_put_noidle(bc->dev);
> +		dev_err(bc->dev, "failed to power up domain\n");
> +		goto disable_clk;
> +	}
> +
> +	/* ungate clk */
> +	regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
> +
> +	/* release reset */
> +	regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
> +
> +	dev_info(bc->dev, "pd_on: name: %s\n", genpd->name);

dev_dbg() maybe?

> +
> +	return 0;
> +
> +disable_clk:
> +	clk_bulk_disable_unprepare(data->num_clks, domain->clks);
> +
> +	return ret;
> +}
> +
> +static int imx93_blk_ctrl_power_off(struct generic_pm_domain *genpd)
> +{
> +	struct imx93_blk_ctrl_domain *domain = to_imx93_blk_ctrl_domain(genpd);
> +	const struct imx93_blk_ctrl_domain_data *data = domain->data;
> +	struct imx93_blk_ctrl *bc = domain->bc;
> +
> +	dev_info(bc->dev, "pd_off: name: %s\n", genpd->name);
> +
> +	regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
> +	regmap_set_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
> +
> +	pm_runtime_put(bc->dev);
> +
> +	clk_bulk_disable_unprepare(data->num_clks, domain->clks);
> +
> +	clk_bulk_disable_unprepare(bc->num_clks, bc->clks);
> +
> +	return 0;
> +}
> +
> +static struct generic_pm_domain *
> +imx93_blk_ctrl_xlate(struct of_phandle_args *args, void *data)
> +{
> +	struct genpd_onecell_data *onecell_data = data;
> +	unsigned int index = args->args[0];
> +
> +	if (args->args_count != 1 ||
> +	    index >= onecell_data->num_domains)
> +		return ERR_PTR(-EINVAL);
> +
> +	return onecell_data->domains[index];
> +}
> +
> +static int imx93_blk_ctrl_probe(struct platform_device *pdev)
> +{
> +	const struct imx93_blk_ctrl_data *bc_data;
> +	struct device *dev = &pdev->dev;
> +	struct imx93_blk_ctrl *bc;
> +	void __iomem *base;
> +	int i, ret;
> +	const struct imx93_blk_ctrl_domain_data *bus;
> +
> +	struct regmap_config regmap_config = {
> +		.reg_bits	= 32,
> +		.val_bits	= 32,
> +		.reg_stride	= 4,
> +	};
> +
> +	bc = devm_kzalloc(dev, sizeof(*bc), GFP_KERNEL);
> +	if (!bc)
> +		return -ENOMEM;
> +
> +	bc->dev = dev;
> +

Unnecessary newline.

> +	bc_data = of_device_get_match_data(dev);
> +
> +	base = devm_platform_ioremap_resource(pdev, 0);
> +	if (IS_ERR(base))
> +		return PTR_ERR(base);
> +
> +	regmap_config.max_register = bc_data->max_reg;
> +	bc->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
> +	if (IS_ERR(bc->regmap))
> +		return dev_err_probe(dev, PTR_ERR(bc->regmap),
> +				     "failed to init regmap\n");
> +
> +	bc->domains = devm_kcalloc(dev, bc_data->num_domains + 1,
> +				   sizeof(struct imx93_blk_ctrl_domain),
> +				   GFP_KERNEL);
> +	if (!bc->domains)
> +		return -ENOMEM;
> +
> +	bus = bc_data->bus;
> +
> +	bc->onecell_data.num_domains = bc_data->num_domains;
> +	bc->onecell_data.xlate = imx93_blk_ctrl_xlate;
> +	bc->onecell_data.domains =
> +		devm_kcalloc(dev, bc_data->num_domains,
> +			     sizeof(struct generic_pm_domain *), GFP_KERNEL);
> +	if (!bc->onecell_data.domains)
> +		return -ENOMEM;
> +
> +	for (i = 0; i < bus->num_clks; i++)
> +		bc->clks[i].id = bus->clk_names[i];
> +	bc->num_clks = bus->num_clks;
> +
> +	ret = devm_clk_bulk_get(dev, bc->num_clks, bc->clks);
> +	if (ret) {
> +		dev_err_probe(dev, ret, "failed to get bus clock\n");
> +		return ret;
> +	}
> +
> +	for (i = 0; i < bc_data->num_domains; i++) {
> +		const struct imx93_blk_ctrl_domain_data *data = &bc_data->domains[i];
> +		struct imx93_blk_ctrl_domain *domain = &bc->domains[i];
> +		int j;
> +
> +		domain->data = data;
> +
> +		for (j = 0; j < data->num_clks; j++)
> +			domain->clks[j].id = data->clk_names[j];
> +
> +		ret = devm_clk_bulk_get(dev, data->num_clks, domain->clks);
> +		if (ret) {
> +			dev_err_probe(dev, ret, "failed to get clock\n");
> +			goto cleanup_pds;
> +		}
> +
> +		domain->genpd.name = data->name;
> +		domain->genpd.power_on = imx93_blk_ctrl_power_on;
> +		domain->genpd.power_off = imx93_blk_ctrl_power_off;
> +		domain->bc = bc;
> +
> +		ret = pm_genpd_init(&domain->genpd, NULL, true);
> +		if (ret) {
> +			dev_err_probe(dev, ret, "failed to init power domain\n");
> +			goto cleanup_pds;
> +		}
> +
> +		bc->onecell_data.domains[i] = &domain->genpd;
> +	}
> +
> +	pm_runtime_enable(dev);
> +
> +	ret = of_genpd_add_provider_onecell(dev->of_node, &bc->onecell_data);
> +	if (ret) {
> +		dev_err_probe(dev, ret, "failed to add power domain provider\n");
> +		goto cleanup_pds;
> +	}
> +
> +

One newline.

> +	dev_set_drvdata(dev, bc);
> +
> +	return 0;
> +
> +cleanup_pds:
> +	for (i--; i >= 0; i--)
> +		pm_genpd_remove(&bc->domains[i].genpd);
> +
> +	return ret;
> +}
> +
> +static int imx93_blk_ctrl_remove(struct platform_device *pdev)
> +{
> +	struct imx93_blk_ctrl *bc = dev_get_drvdata(&pdev->dev);
> +	int i;
> +
> +	of_genpd_del_provider(pdev->dev.of_node);
> +
> +	for (i = 0; bc->onecell_data.num_domains; i++) {
> +		struct imx93_blk_ctrl_domain *domain = &bc->domains[i];
> +
> +		pm_genpd_remove(&domain->genpd);
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct imx93_blk_ctrl_domain_data imx93_media_blk_ctl_domain_data[] = {
> +	[IMX93_MEDIABLK_PD_MIPI_DSI] = {
> +		.name = "mediablk-mipi-dsi",
> +		.clk_names = (const char *[]){ "dsi" },
> +		.num_clks = 1,
> +		.rst_mask = BIT(11) | BIT(12),
> +		.clk_mask = BIT(11) | BIT(12),
> +	},
> +	[IMX93_MEDIABLK_PD_MIPI_CSI] = {
> +		.name = "mediablk-mipi-csi",
> +		.clk_names = (const char *[]){ "cam", "csi" },
> +		.num_clks = 2,
> +		.rst_mask = BIT(9) | BIT(10),
> +		.clk_mask = BIT(9) | BIT(10),
> +	},
> +	[IMX93_MEDIABLK_PD_PXP] = {
> +		.name = "mediablk-pxp",
> +		.clk_names = (const char *[]){ "pxp" },
> +		.num_clks = 1,
> +		.rst_mask = BIT(7) | BIT(8),
> +		.clk_mask = BIT(7) | BIT(8),
> +	},
> +	[IMX93_MEDIABLK_PD_LCDIF] = {
> +		.name = "mediablk-lcdif",
> +		.clk_names = (const char *[]){ "disp", "lcdif" },
> +		.num_clks = 2,
> +		.rst_mask = BIT(4) | BIT(5) | BIT(6),
> +		.clk_mask = BIT(4) | BIT(5) | BIT(6),
> +	},
> +	[IMX93_MEDIABLK_PD_ISI] = {
> +		.name = "mediablk-isi",
> +		.clk_names = (const char *[]){ "isi" },
> +		.num_clks = 1,
> +		.rst_mask = BIT(2) | BIT(3),
> +		.clk_mask = BIT(2) | BIT(3),
> +	},
> +};
> +
> +static const struct imx93_blk_ctrl_data imx93_media_blk_ctl_dev_data = {
> +	.max_reg = 0x90,
> +	.domains = imx93_media_blk_ctl_domain_data,
> +	.bus = &imx93_media_blk_ctl_bus_data,
> +	.num_domains = ARRAY_SIZE(imx93_media_blk_ctl_domain_data),
> +};
> +
> +static const struct of_device_id imx93_blk_ctrl_of_match[] = {
> +	{
> +		.compatible = "fsl,imx93-media-blk-ctrl",
> +		.data = &imx93_media_blk_ctl_dev_data
> +	}, {
> +		/* Sentinel */
> +	}
> +};
> +MODULE_DEVICE_TABLE(of, imx93_blk_ctrl_of_match);
> +
> +static struct platform_driver imx93_blk_ctrl_driver = {
> +	.probe = imx93_blk_ctrl_probe,
> +	.remove = imx93_blk_ctrl_remove,
> +	.driver = {
> +		.name = "imx93-blk-ctrl",
> +		.of_match_table = imx93_blk_ctrl_of_match,
> +	},
> +};
> +module_platform_driver(imx93_blk_ctrl_driver);

MODULE_AUTHOR, MODULE_DESCRIPTION, MODULE_LICENSE?

Shawn

RE: [PATCH V6 3/6] soc: imx: add i.MX93 SRC power domain driver

[Peng Fan]

> Subject: Re: [PATCH V6 3/6] soc: imx: add i.MX93 SRC power domain driver
> 
> On Tue, Jul 19, 2022 at 03:35:38PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > Support controlling power domain managed by System Reset
> > Controller(SRC). Current supported power domain is mediamix power
> > domain.
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  drivers/soc/imx/Kconfig     |   8 ++
> >  drivers/soc/imx/Makefile    |   1 +
> >  drivers/soc/imx/imx93-pd.c  | 163
> > ++++++++++++++++++++++++++++++++++++
> >  drivers/soc/imx/imx93-src.c |  32 +++++++
> 
> Shouldn't a reset driver go to drivers/reset/?

Although it is named system reset controller(SRC), it is not just for reset.
- Deals with all global system reset sources from other modules, and
  generates global system reset.
- Responsible for power gating of MIXs (Slices) and their memory
  low power control.

The reset feature is actually being handled by secure world. Currently I 
use the driver to populate subnodes, otherwise the mixs driver
will not probe.

Thanks,
Peng.


> 
> >  4 files changed, 204 insertions(+)
> >  create mode 100644 drivers/soc/imx/imx93-pd.c  create mode 100644
> > drivers/soc/imx/imx93-src.c
> >
> > diff --git a/drivers/soc/imx/Kconfig b/drivers/soc/imx/Kconfig index
> > a840494e849a..4b906791d6c7 100644
> > --- a/drivers/soc/imx/Kconfig
> > +++ b/drivers/soc/imx/Kconfig
> > @@ -20,4 +20,12 @@ config SOC_IMX8M
> >  	  support, it will provide the SoC info like SoC family,
> >  	  ID and revision etc.
> >
> > +config SOC_IMX9
> > +	tristate "i.MX9 SoC family support"
> > +	depends on ARCH_MXC || COMPILE_TEST
> > +	default ARCH_MXC && ARM64
> > +	select SOC_BUS
> > +	help
> > +	  If you say yes here, you get support for the NXP i.MX9 family
> > +
> >  endmenu
> > diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index
> > 63cd29f6d4d2..a0baa2a01adb 100644
> > --- a/drivers/soc/imx/Makefile
> > +++ b/drivers/soc/imx/Makefile
> > @@ -7,3 +7,4 @@ obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
> >  obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o
> >  obj-$(CONFIG_SOC_IMX8M) += imx8m-blk-ctrl.o
> >  obj-$(CONFIG_SOC_IMX8M) += imx8mp-blk-ctrl.o
> > +obj-$(CONFIG_SOC_IMX9) += imx93-src.o imx93-pd.o
> > diff --git a/drivers/soc/imx/imx93-pd.c b/drivers/soc/imx/imx93-pd.c
> > new file mode 100644 index 000000000000..48437c303b78
> > --- /dev/null
> > +++ b/drivers/soc/imx/imx93-pd.c
> > @@ -0,0 +1,163 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2022 NXP
> > + */
> > +
> > +#include <linux/clk.h>
> > +#include <linux/of_device.h>
> > +#include <linux/delay.h>
> > +#include <linux/iopoll.h>
> > +#include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/pm_domain.h>
> > +
> > +#define MIX_SLICE_SW_CTRL_OFF		0x20
> > +#define SLICE_SW_CTRL_PSW_CTRL_OFF_MASK	BIT(4)
> > +#define SLICE_SW_CTRL_PDN_SOFT_MASK	BIT(31)
> > +
> > +#define MIX_FUNC_STAT_OFF		0xB4
> > +
> > +#define FUNC_STAT_PSW_STAT_MASK		BIT(0)
> > +#define FUNC_STAT_RST_STAT_MASK		BIT(2)
> > +#define FUNC_STAT_ISO_STAT_MASK		BIT(4)
> > +
> > +struct imx93_power_domain {
> > +	struct generic_pm_domain genpd;
> > +	struct device *dev;
> > +	void __iomem *addr;
> > +	struct clk_bulk_data *clks;
> > +	int num_clks;
> > +	bool init_off;
> > +};
> > +
> > +#define to_imx93_pd(_genpd) container_of(_genpd, struct
> > +imx93_power_domain, genpd)
> > +
> > +static int imx93_pd_on(struct generic_pm_domain *genpd) {
> > +	struct imx93_power_domain *domain = to_imx93_pd(genpd);
> > +	void __iomem *addr = domain->addr;
> > +	u32 val;
> > +	int ret;
> > +
> > +	ret = clk_bulk_prepare_enable(domain->num_clks, domain->clks);
> > +	if (ret) {
> > +		dev_err(domain->dev, "failed to enable clocks for
> domain: %s\n", genpd->name);
> > +		return ret;
> > +	}
> > +
> > +	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
> > +	val &= ~SLICE_SW_CTRL_PDN_SOFT_MASK;
> > +	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
> > +
> > +	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
> > +				 !(val & FUNC_STAT_ISO_STAT_MASK), 1,
> 10000);
> > +	if (ret) {
> > +		dev_err(domain->dev, "pd_on timeout: name: %s,
> stat: %x\n", genpd->name, val);
> > +		return ret;
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> > +static int imx93_pd_off(struct generic_pm_domain *genpd) {
> > +	struct imx93_power_domain *domain = to_imx93_pd(genpd);
> > +	void __iomem *addr = domain->addr;
> > +	int ret;
> > +	u32 val;
> > +
> > +	/* Power off MIX */
> > +	val = readl(addr + MIX_SLICE_SW_CTRL_OFF);
> > +	val |= SLICE_SW_CTRL_PDN_SOFT_MASK;
> > +	writel(val, addr + MIX_SLICE_SW_CTRL_OFF);
> > +
> > +	ret = readl_poll_timeout(addr + MIX_FUNC_STAT_OFF, val,
> > +				 val & FUNC_STAT_PSW_STAT_MASK, 1,
> 1000);
> > +	if (ret) {
> > +		dev_err(domain->dev, "pd_off timeout: name: %s,
> stat: %x\n", genpd->name, val);
> > +		return ret;
> > +	}
> > +
> > +	clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
> > +
> > +	return 0;
> > +};
> > +
> > +static int imx93_pd_remove(struct platform_device *pdev) {
> > +	struct imx93_power_domain *domain =
> platform_get_drvdata(pdev);
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +
> > +	if (!domain->init_off)
> > +		clk_bulk_disable_unprepare(domain->num_clks, domain-
> >clks);
> > +
> > +	of_genpd_del_provider(np);
> > +	pm_genpd_remove(&domain->genpd);
> > +
> > +	return 0;
> > +}
> > +
> > +static int imx93_pd_probe(struct platform_device *pdev) {
> > +	struct device *dev = &pdev->dev;
> > +	struct device_node *np = dev->of_node;
> > +	struct imx93_power_domain *domain;
> > +	int ret;
> > +
> > +	domain = devm_kzalloc(dev, sizeof(*domain), GFP_KERNEL);
> > +	if (!domain)
> > +		return -ENOMEM;
> 
> Have a newline.
> 
> > +	domain->addr = devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(domain->addr))
> > +		return PTR_ERR(domain->addr);
> > +
> > +
> 
> One newline is enough.
> 
> > +	domain->num_clks = devm_clk_bulk_get_all(dev, &domain->clks);
> > +	if (domain->num_clks < 0)
> > +		return dev_err_probe(dev, domain->num_clks, "Failed to
> get domain's
> > +clocks\n");
> > +
> > +	domain->genpd.name = dev_name(dev);
> > +	domain->genpd.power_off = imx93_pd_off;
> > +	domain->genpd.power_on = imx93_pd_on;
> > +	domain->dev = dev;
> > +
> > +	domain->init_off = readl(domain->addr + MIX_FUNC_STAT_OFF) &
> FUNC_STAT_ISO_STAT_MASK;
> > +	/* Just to sync the status of hardware */
> > +	if (!domain->init_off) {
> > +		ret = clk_bulk_prepare_enable(domain->num_clks, domain-
> >clks);
> > +		if (ret) {
> > +			dev_err(domain->dev, "failed to enable clocks for
> domain: %s\n",
> > +				domain->genpd.name);
> > +			return 0;
> 
> This is a case of success?
> 
> > +		}
> > +	}
> > +
> > +	ret = pm_genpd_init(&domain->genpd, NULL, domain->init_off);
> > +	if (ret)
> > +		return ret;
> > +
> > +	platform_set_drvdata(pdev, domain);
> > +
> > +	return of_genpd_add_provider_simple(np, &domain->genpd); }
> > +
> > +static const struct of_device_id imx93_dt_ids[] = {
> > +	{ .compatible = "fsl,imx93-src-slice" },
> > +	{ }
> > +};
> 
> MODULE_DEVICE_TABLE()?
> 
> Shawn
> 
> > +
> > +static struct platform_driver imx93_power_domain_driver = {
> > +	.driver = {
> > +		.name	= "imx93_power_domain",
> > +		.owner	= THIS_MODULE,
> > +		.of_match_table = imx93_dt_ids,
> > +	},
> > +	.probe = imx93_pd_probe,
> > +	.remove = imx93_pd_remove,
> > +};
> > +module_platform_driver(imx93_power_domain_driver);
> > +
> > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> MODULE_DESCRIPTION("NXP
> > +i.MX93 power domain driver"); MODULE_LICENSE("GPL");
> 
> "GPL v2" since you have "SPDX-License-Identifier: GPL-2.0" claimed in the
> beginning?
> 
> Shawn
> 
> > diff --git a/drivers/soc/imx/imx93-src.c b/drivers/soc/imx/imx93-src.c
> > new file mode 100644 index 000000000000..6f14c241538e
> > --- /dev/null
> > +++ b/drivers/soc/imx/imx93-src.c
> > @@ -0,0 +1,32 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2022 NXP
> > + */
> > +
> > +#include <linux/module.h>
> > +#include <linux/of_platform.h>
> > +#include <linux/platform_device.h>
> > +
> > +static int imx93_src_probe(struct platform_device *pdev) {
> > +	return devm_of_platform_populate(&pdev->dev);
> > +}
> > +
> > +static const struct of_device_id imx93_dt_ids[] = {
> > +	{ .compatible = "fsl,imx93-src" },
> > +	{ }
> > +};
> > +
> > +static struct platform_driver imx93_src_driver = {
> > +	.driver = {
> > +		.name	= "imx93_src",
> > +		.owner	= THIS_MODULE,
> > +		.of_match_table = imx93_dt_ids,
> > +	},
> > +	.probe = imx93_src_probe,
> > +};
> > +module_platform_driver(imx93_src_driver);
> > +
> > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> MODULE_DESCRIPTION("NXP
> > +i.MX93 src driver"); MODULE_LICENSE("GPL");
> > --
> > 2.25.1
> >