* [PATCH 1/2] ARM: dts: stm32: add spi nodes into stm32mp131.dtsi
2022-07-21 15:34 [PATCH 0/2] ARM: dts: stm32: add SPI on STM32MP13 platform Alain Volmat
@ 2022-07-21 15:34 ` Alain Volmat
2022-07-21 16:32 ` Krzysztof Kozlowski
2022-07-21 15:34 ` [PATCH 2/2] ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk Alain Volmat
1 sibling, 1 reply; 5+ messages in thread
From: Alain Volmat @ 2022-07-21 15:34 UTC (permalink / raw)
To: alexandre.torgue
Cc: robh+dt, mcoquelin.stm32, krzysztof.kozlowski+dt,
linux-arm-kernel, devicetree, linux-kernel, linux-stm32,
amelie.delaunay
Add the 5 instances of spi busses supported by the stm32mp131.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
arch/arm/boot/dts/stm32mp131.dtsi | 70 +++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi
index da9e8a6ca663..db3d1b900d5c 100644
--- a/arch/arm/boot/dts/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/stm32mp131.dtsi
@@ -97,6 +97,34 @@ scmi_shm: scmi-sram@0 {
};
};
+ spi2: spi@4000b000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4000b000 0x400>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI2_K>;
+ resets = <&rcc SPI2_R>;
+ dmas = <&dmamux1 39 0x400 0x01>,
+ <&dmamux1 40 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ spi3: spi@4000c000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4000c000 0x400>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI3_K>;
+ resets = <&rcc SPI3_R>;
+ dmas = <&dmamux1 61 0x400 0x01>,
+ <&dmamux1 62 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
uart4: serial@40010000 {
compatible = "st,stm32h7-uart";
reg = <0x40010000 0x400>;
@@ -142,6 +170,20 @@ i2c2: i2c@40013000 {
status = "disabled";
};
+ spi1: spi@44004000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x44004000 0x400>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI1_K>;
+ resets = <&rcc SPI1_R>;
+ dmas = <&dmamux1 37 0x400 0x01>,
+ <&dmamux1 38 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
dma1: dma-controller@48000000 {
compatible = "st,stm32-dma";
reg = <0x48000000 0x400>;
@@ -189,6 +231,34 @@ dmamux1: dma-router@48002000 {
dma-channels = <16>;
};
+ spi4: spi@4c002000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4c002000 0x400>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI4_K>;
+ resets = <&rcc SPI4_R>;
+ dmas = <&dmamux1 83 0x400 0x01>,
+ <&dmamux1 84 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ spi5: spi@4c003000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32h7-spi";
+ reg = <0x4c003000 0x400>;
+ interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rcc SPI5_K>;
+ resets = <&rcc SPI5_R>;
+ dmas = <&dmamux1 85 0x400 0x01>,
+ <&dmamux1 86 0x400 0x01>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
i2c3: i2c@4c004000 {
compatible = "st,stm32mp13-i2c";
reg = <0x4c004000 0x400>;
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH 2/2] ARM: dts: stm32: add pinctrl and disabled spi5 node in stm32mp135f-dk
2022-07-21 15:34 [PATCH 0/2] ARM: dts: stm32: add SPI on STM32MP13 platform Alain Volmat
2022-07-21 15:34 ` [PATCH 1/2] ARM: dts: stm32: add spi nodes into stm32mp131.dtsi Alain Volmat
@ 2022-07-21 15:34 ` Alain Volmat
1 sibling, 0 replies; 5+ messages in thread
From: Alain Volmat @ 2022-07-21 15:34 UTC (permalink / raw)
To: alexandre.torgue
Cc: robh+dt, mcoquelin.stm32, krzysztof.kozlowski+dt,
linux-arm-kernel, devicetree, linux-kernel, linux-stm32,
amelie.delaunay
Add pinctrl information and a disabled spi5 node within
stm32mp135f-dk.dts in order to use the spi5 bus which is
available via the GPIO expansion pins of the STM32MP135 Discovery board.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
---
arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 23 +++++++++++++++++++++++
arch/arm/boot/dts/stm32mp135f-dk.dts | 7 +++++++
2 files changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
index 749078ba9d42..efdd163eba30 100644
--- a/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp13-pinctrl.dtsi
@@ -142,6 +142,29 @@ pins {
};
};
+ spi5_pins_a: spi5-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
+ <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
+ bias-disable;
+ };
+ };
+
+ spi5_sleep_pins_a: spi5-sleep-0 {
+ pins {
+ pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
+ <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
+ <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
+ };
+ };
+
uart4_pins_a: uart4-0 {
pins1 {
pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
diff --git a/arch/arm/boot/dts/stm32mp135f-dk.dts b/arch/arm/boot/dts/stm32mp135f-dk.dts
index 3e2823332d51..de341d17e87d 100644
--- a/arch/arm/boot/dts/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/stm32mp135f-dk.dts
@@ -116,6 +116,13 @@ &sdmmc1 {
status = "okay";
};
+&spi5 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&spi5_pins_a>;
+ pinctrl-1 = <&spi5_sleep_pins_a>;
+ status = "disabled";
+};
+
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&uart4_pins_a>;
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread