From: Sergiu Moga <sergiu.moga@microchip.com>
To: <lee@kernel.org>, <robh+dt@kernel.org>,
<krzysztof.kozlowski+dt@linaro.org>,
<nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<claudiu.beznea@microchip.com>, <radu_nicolae.pirea@upb.ro>,
<richard.genoud@gmail.com>, <mturquette@baylibre.com>,
<sboyd@kernel.org>, <gregkh@linuxfoundation.org>,
<jirislaby@kernel.org>, <admin@hifiphile.com>,
<kavyasree.kotagiri@microchip.com>
Cc: <devicetree@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
<linux-clk@vger.kernel.org>, <linux-serial@vger.kernel.org>,
Sergiu Moga <sergiu.moga@microchip.com>
Subject: [PATCH 4/5] clk: at91: sama5d2: Add Generic Clocks for UART/USART
Date: Wed, 17 Aug 2022 10:55:17 +0300 [thread overview]
Message-ID: <20220817075517.49575-5-sergiu.moga@microchip.com> (raw)
In-Reply-To: <20220817075517.49575-1-sergiu.moga@microchip.com>
Add the generic clocks for UART/USART in the sama5d2 driver to allow them
to be registered in the Common Clock Framework.
Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---
drivers/clk/at91/sama5d2.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/clk/at91/sama5d2.c b/drivers/clk/at91/sama5d2.c
index cfd0f5e23b99..84156dc52bff 100644
--- a/drivers/clk/at91/sama5d2.c
+++ b/drivers/clk/at91/sama5d2.c
@@ -120,6 +120,16 @@ static const struct {
struct clk_range r;
int chg_pid;
} sama5d2_gck[] = {
+ { .n = "flx0_gclk", .id = 19, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "flx1_gclk", .id = 20, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "flx2_gclk", .id = 21, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "flx3_gclk", .id = 22, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "flx4_gclk", .id = 23, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "uart0_gclk", .id = 24, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "uart1_gclk", .id = 25, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "uart2_gclk", .id = 26, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "uart3_gclk", .id = 27, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
+ { .n = "uart4_gclk", .id = 28, .chg_pid = INT_MIN, .r = { .min = 0, .max = 27666666 }, },
{ .n = "sdmmc0_gclk", .id = 31, .chg_pid = INT_MIN, },
{ .n = "sdmmc1_gclk", .id = 32, .chg_pid = INT_MIN, },
{ .n = "tcb0_gclk", .id = 35, .chg_pid = INT_MIN, .r = { .min = 0, .max = 83000000 }, },
--
2.25.1
next prev parent reply other threads:[~2022-08-17 8:04 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-17 7:55 [PATCH 0/5] Make atmel serial driver aware of GCLK Sergiu Moga
2022-08-17 7:55 ` [PATCH 1/5] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-08-18 8:31 ` Krzysztof Kozlowski
2022-08-17 7:55 ` [PATCH 2/5] dt-bindings: mfd: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-08-18 8:38 ` Krzysztof Kozlowski
2022-08-19 8:37 ` Sergiu.Moga
2022-08-19 8:41 ` Krzysztof Kozlowski
2022-08-19 9:25 ` Sergiu.Moga
2022-08-19 12:06 ` Krzysztof Kozlowski
2022-08-18 8:39 ` Krzysztof Kozlowski
2022-08-19 8:38 ` Sergiu.Moga
2022-08-19 8:47 ` Krzysztof Kozlowski
2022-08-19 9:05 ` Krzysztof Kozlowski
2022-09-01 11:31 ` Eugen.Hristev
2022-09-05 10:10 ` Krzysztof Kozlowski
2022-09-05 14:37 ` Lee Jones
2022-09-05 15:22 ` Sergiu.Moga
2022-09-05 16:12 ` Krzysztof Kozlowski
2022-09-06 15:49 ` Lee Jones
2022-08-17 7:55 ` [PATCH 3/5] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-08-17 7:55 ` Sergiu Moga [this message]
2022-08-26 7:03 ` [PATCH 4/5] clk: at91: sama5d2: Add Generic Clocks for UART/USART Claudiu.Beznea
2022-08-30 22:23 ` Stephen Boyd
2022-08-31 14:47 ` Claudiu.Beznea
2022-08-17 7:55 ` [PATCH 5/5] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-08-30 17:29 ` Richard Genoud
2022-08-31 8:49 ` Sergiu.Moga
2022-08-31 9:46 ` Claudiu.Beznea
2022-08-31 11:32 ` Sergiu.Moga
2022-09-01 6:36 ` Claudiu.Beznea
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