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From: Heiko Stuebner <heiko@sntech.de>
To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu
Cc: guoren@kernel.org, apatel@ventanamicro.com, atishp@rivosinc.com,
	linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	Heiko Stuebner <heiko@sntech.de>,
	Conor Dooley <conor.dooley@microchip.com>,
	Andrew Jones <ajones@ventanamicro.com>
Subject: [PATCH v2 1/5] riscv: cleanup svpbmt cpufeature probing
Date: Mon,  5 Sep 2022 13:10:23 +0200	[thread overview]
Message-ID: <20220905111027.2463297-2-heiko@sntech.de> (raw)
In-Reply-To: <20220905111027.2463297-1-heiko@sntech.de>

For better readability (and compile time coverage) use IS_ENABLED
instead of ifdef and drop the new unneeded switch statement.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
---
 arch/riscv/kernel/cpufeature.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 553d755483ed..764ea220161f 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -253,16 +253,13 @@ void __init riscv_fill_hwcap(void)
 #ifdef CONFIG_RISCV_ALTERNATIVE
 static bool __init_or_module cpufeature_probe_svpbmt(unsigned int stage)
 {
-#ifdef CONFIG_RISCV_ISA_SVPBMT
-	switch (stage) {
-	case RISCV_ALTERNATIVES_EARLY_BOOT:
+	if (!IS_ENABLED(CONFIG_RISCV_ISA_SVPBMT))
 		return false;
-	default:
-		return riscv_isa_extension_available(NULL, SVPBMT);
-	}
-#endif
 
-	return false;
+	if (stage == RISCV_ALTERNATIVES_EARLY_BOOT)
+		return false;
+
+	return riscv_isa_extension_available(NULL, SVPBMT);
 }
 
 static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage)
-- 
2.35.1


  reply	other threads:[~2022-09-05 11:10 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-05 11:10 [PATCH v2 0/5] Some style cleanups for recent extension additions Heiko Stuebner
2022-09-05 11:10 ` Heiko Stuebner [this message]
2022-09-05 11:10 ` [PATCH v2 2/5] riscv: drop some idefs from CMO initialization Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 3/5] riscv: use BIT() macros in t-head errata init Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 4/5] riscv: use BIT() marco for cpufeature probing Heiko Stuebner
2022-09-05 11:19   ` Conor.Dooley
2022-09-05 11:23     ` Heiko Stübner
2022-09-05 14:12       ` Heiko Stübner
2022-09-05 14:16         ` Conor.Dooley
     [not found]   ` <CAOnJCUJ9hC2xhoxuBPCNHEEZACeWckEL-Tc7xS6ECWrfx5KXhg@mail.gmail.com>
2022-09-07 23:12     ` Guo Ren
2022-09-05 11:10 ` [PATCH v2 5/5] riscv: check for kernel config option in t-head memory types errata Heiko Stuebner
2022-09-06  1:33   ` Guo Ren
2022-10-13 16:58 ` [PATCH v2 0/5] Some style cleanups for recent extension additions Palmer Dabbelt

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