From: Guo Ren <guoren@kernel.org>
To: Atish Patra <atishp@atishpatra.org>
Cc: Heiko Stuebner <heiko@sntech.de>,
paul.walmsley@sifive.com, palmer@dabbelt.com,
aou@eecs.berkeley.edu, apatel@ventanamicro.com,
atishp@rivosinc.com, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v2 4/5] riscv: use BIT() marco for cpufeature probing
Date: Thu, 8 Sep 2022 07:12:57 +0800 [thread overview]
Message-ID: <CAJF2gTTbfdUQEGDnosKaZrFLh58UVdnDRQUXc-N5p+11aLPT7w@mail.gmail.com> (raw)
In-Reply-To: <CAOnJCUJ9hC2xhoxuBPCNHEEZACeWckEL-Tc7xS6ECWrfx5KXhg@mail.gmail.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
On Thu, Sep 8, 2022 at 6:50 AM Atish Patra <atishp@atishpatra.org> wrote:
>
>
>
> On Mon, Sep 5, 2022 at 7:15 AM Heiko Stuebner <heiko@sntech.de> wrote:
>>
>> Using the appropriate BIT macro makes the code better readable.
>>
>> Suggested-by: Conor Dooley <conor.dooley@microchip.com>
>> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
>> ---
>> arch/riscv/kernel/cpufeature.c | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
>> index 729f7a218093..08f7445985dc 100644
>> --- a/arch/riscv/kernel/cpufeature.c
>> +++ b/arch/riscv/kernel/cpufeature.c
>> @@ -289,10 +289,10 @@ static u32 __init_or_module cpufeature_probe(unsigned int stage)
>> u32 cpu_req_feature = 0;
>>
>> if (cpufeature_probe_svpbmt(stage))
>> - cpu_req_feature |= (1U << CPUFEATURE_SVPBMT);
>> + cpu_req_feature |= BIT(CPUFEATURE_SVPBMT);
>>
>> if (cpufeature_probe_zicbom(stage))
>> - cpu_req_feature |= (1U << CPUFEATURE_ZICBOM);
>> + cpu_req_feature |= BIT(CPUFEATURE_ZICBOM);
>>
>> return cpu_req_feature;
>> }
>> --
>> 2.35.1
>>
>>
>> _______________________________________________
>> linux-riscv mailing list
>> linux-riscv@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
>
>
> Reviewed-by: Atish Patra <atishp@rivosinc.com>
>
> --
> Regards,
> Atish
--
Best Regards
Guo Ren
next prev parent reply other threads:[~2022-09-07 23:13 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-05 11:10 [PATCH v2 0/5] Some style cleanups for recent extension additions Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 1/5] riscv: cleanup svpbmt cpufeature probing Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 2/5] riscv: drop some idefs from CMO initialization Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 3/5] riscv: use BIT() macros in t-head errata init Heiko Stuebner
2022-09-05 11:10 ` [PATCH v2 4/5] riscv: use BIT() marco for cpufeature probing Heiko Stuebner
2022-09-05 11:19 ` Conor.Dooley
2022-09-05 11:23 ` Heiko Stübner
2022-09-05 14:12 ` Heiko Stübner
2022-09-05 14:16 ` Conor.Dooley
[not found] ` <CAOnJCUJ9hC2xhoxuBPCNHEEZACeWckEL-Tc7xS6ECWrfx5KXhg@mail.gmail.com>
2022-09-07 23:12 ` Guo Ren [this message]
2022-09-05 11:10 ` [PATCH v2 5/5] riscv: check for kernel config option in t-head memory types errata Heiko Stuebner
2022-09-06 1:33 ` Guo Ren
2022-10-13 16:58 ` [PATCH v2 0/5] Some style cleanups for recent extension additions Palmer Dabbelt
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