* [PATCH 1/3] drm/amd/display: fix HDCP drm prop update for MST
@ 2022-09-23 20:52 Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 2/3] drm/amd/display: save and restore a connector's HDCP properties Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 3/3] drm/amd/display: fix a crash caused by hot plugging on certain MST hubs Hamza Mahfooz
0 siblings, 2 replies; 3+ messages in thread
From: Hamza Mahfooz @ 2022-09-23 20:52 UTC (permalink / raw)
To: linux-kernel
Cc: Hamza Mahfooz, Harry Wentland, Leo Li, Rodrigo Siqueira,
Alex Deucher, Christian König, Pan, Xinhui, David Airlie,
Daniel Vetter, Nicholas Kazlauskas, Aurabindo Pillai, Roman Li,
Jude Shih, Qingqing Zhuo, Wayne Lin, hersen wu,
Thomas Zimmermann, Fangzhi Zuo, amd-gfx, dri-devel
For MST topology with 1 physical link and multiple connectors (e.g. a
one-to-many MST hub), if userspace enables HDCP simultaneously on all
connected outputs, the commit tail iteratively calls
hdcp_update_display() for each display (connector). However, the HDCP
workqueue data structure for each link has only one DM connector and
encryption status member, which means the workqueue of
property_validate/update() would only be triggered for the last
connector within this physical link, and therefore the HDCP property
value of other connectors would stay on DESIRED instead of switching to
ENABLED. So, to ensure that all of the connectors switch from DESIRED to
ENABLED keep track of each connector's status in an array instead of
only keeping track of the status of the most recent connector that
userspace has interacted with.
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
---
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 145 +++++++++++++-----
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.h | 5 +-
2 files changed, 113 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
index 6202e31c7e3a..922ec91940e4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.c
@@ -170,9 +170,10 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
struct mod_hdcp_display *display = &hdcp_work[link_index].display;
struct mod_hdcp_link *link = &hdcp_work[link_index].link;
struct mod_hdcp_display_query query;
+ unsigned int conn_index = aconnector->base.index;
mutex_lock(&hdcp_w->mutex);
- hdcp_w->aconnector = aconnector;
+ hdcp_w->aconnector[conn_index] = aconnector;
query.display = NULL;
mod_hdcp_query_display(&hdcp_w->hdcp, aconnector->base.index, &query);
@@ -204,7 +205,8 @@ void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
} else {
display->adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
- hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
+ hdcp_w->encryption_status[conn_index] =
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
cancel_delayed_work(&hdcp_w->property_validate_dwork);
}
@@ -223,9 +225,10 @@ static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
struct drm_connector_state *conn_state = aconnector->base.state;
+ unsigned int conn_index = aconnector->base.index;
mutex_lock(&hdcp_w->mutex);
- hdcp_w->aconnector = aconnector;
+ hdcp_w->aconnector[conn_index] = aconnector;
/* the removal of display will invoke auth reset -> hdcp destroy and
* we'd expect the Content Protection (CP) property changed back to
@@ -247,13 +250,18 @@ static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
{
struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
+ unsigned int conn_index;
mutex_lock(&hdcp_w->mutex);
mod_hdcp_reset_connection(&hdcp_w->hdcp, &hdcp_w->output);
cancel_delayed_work(&hdcp_w->property_validate_dwork);
- hdcp_w->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
+
+ for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
+ conn_index++)
+ hdcp_w->encryption_status[conn_index] =
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
process_output(hdcp_w);
@@ -290,45 +298,85 @@ static void event_callback(struct work_struct *work)
}
-static void event_property_update(struct work_struct *work)
+
+static struct amdgpu_dm_connector *find_first_connected_output(struct hdcp_workqueue *hdcp_work)
{
+ unsigned int conn_index;
+ for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
+ conn_index++)
+ if (hdcp_work->aconnector[conn_index])
+ return hdcp_work->aconnector[conn_index];
+
+ return NULL;
+}
+
+static void event_property_update(struct work_struct *work)
+{
struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue, property_update_work);
- struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
- struct drm_device *dev = hdcp_work->aconnector->base.dev;
+ struct amdgpu_dm_connector *aconnector =
+ find_first_connected_output(hdcp_work);
+ struct drm_device *dev;
long ret;
+ unsigned int conn_index;
+ struct drm_connector *connector;
+ struct drm_connector_state *conn_state;
+
+ if (!aconnector)
+ return;
+
+ dev = aconnector->base.dev;
drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
mutex_lock(&hdcp_work->mutex);
+ for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
+ conn_index++) {
+ aconnector = hdcp_work->aconnector[conn_index];
+
+ if (!aconnector)
+ continue;
+
+ if (!aconnector->base.index)
+ continue;
+
+ connector = &aconnector->base;
+ conn_state = aconnector->base.state;
- if (aconnector->base.state && aconnector->base.state->commit) {
- ret = wait_for_completion_interruptible_timeout(&aconnector->base.state->commit->hw_done, 10 * HZ);
+ if (!conn_state)
+ continue;
- if (ret == 0) {
- DRM_ERROR("HDCP state unknown! Setting it to DESIRED");
- hdcp_work->encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
+ if (conn_state->commit) {
+ ret = wait_for_completion_interruptible_timeout(&conn_state->commit->hw_done,
+ 10 * HZ);
+ if (!ret) {
+ DRM_ERROR("HDCP state unknown! Setting it to DESIRED");
+ hdcp_work->encryption_status[conn_index] =
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
+ }
}
- }
- if (aconnector->base.state) {
- if (hdcp_work->encryption_status != MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
- if (aconnector->base.state->hdcp_content_type ==
- DRM_MODE_HDCP_CONTENT_TYPE0 &&
- hdcp_work->encryption_status <=
- MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON)
- drm_hdcp_update_content_protection(&aconnector->base,
+ if (hdcp_work->encryption_status[conn_index] !=
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
+ if (conn_state->hdcp_content_type ==
+ DRM_MODE_HDCP_CONTENT_TYPE0 &&
+ hdcp_work->encryption_status[conn_index] <=
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON)
+
+ drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
- else if (aconnector->base.state->hdcp_content_type ==
- DRM_MODE_HDCP_CONTENT_TYPE1 &&
- hdcp_work->encryption_status ==
- MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON)
- drm_hdcp_update_content_protection(&aconnector->base,
+ else if (conn_state->hdcp_content_type ==
+ DRM_MODE_HDCP_CONTENT_TYPE1 &&
+ hdcp_work->encryption_status[conn_index] ==
+ MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON)
+
+ drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_ENABLED);
} else {
- drm_hdcp_update_content_protection(&aconnector->base,
+ drm_hdcp_update_content_protection(connector,
DRM_MODE_CONTENT_PROTECTION_DESIRED);
}
+
}
mutex_unlock(&hdcp_work->mutex);
@@ -340,19 +388,37 @@ static void event_property_validate(struct work_struct *work)
struct hdcp_workqueue *hdcp_work =
container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
struct mod_hdcp_display_query query;
- struct amdgpu_dm_connector *aconnector = hdcp_work->aconnector;
-
- if (!aconnector)
- return;
+ struct amdgpu_dm_connector *aconnector;
+ unsigned int conn_index;
mutex_lock(&hdcp_work->mutex);
- query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
- mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index, &query);
+ for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
+ conn_index++) {
+ aconnector = hdcp_work->aconnector[conn_index];
- if (query.encryption_status != hdcp_work->encryption_status) {
- hdcp_work->encryption_status = query.encryption_status;
- schedule_work(&hdcp_work->property_update_work);
+ if (!aconnector)
+ continue;
+
+ if (!aconnector->base.index)
+ continue;
+
+ query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
+ mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index,
+ &query);
+
+ DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP %u, (query->enc_st, work->enc_st): (%d, %d)\n",
+ aconnector->base.index,
+ aconnector->base.state->content_protection,
+ query.encryption_status,
+ hdcp_work->encryption_status[conn_index]);
+
+ if (query.encryption_status !=
+ hdcp_work->encryption_status[conn_index]) {
+ hdcp_work->encryption_status[conn_index] =
+ query.encryption_status;
+ schedule_work(&hdcp_work->property_update_work);
+ }
}
mutex_unlock(&hdcp_work->mutex);
@@ -686,6 +752,15 @@ struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev, struct
hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;
hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;
hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;
+
+ memset(hdcp_work[i].aconnector, 0,
+ sizeof(struct amdgpu_dm_connector *) *
+ AMDGPU_DM_MAX_DISPLAY_INDEX);
+
+ memset(hdcp_work[i].encryption_status, 0,
+ sizeof(enum mod_hdcp_encryption_status) *
+ AMDGPU_DM_MAX_DISPLAY_INDEX);
+
}
cp_psp->funcs.update_stream_config = update_config;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
index 09294ff122fe..b2dbc0719472 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
@@ -43,7 +43,7 @@ struct hdcp_workqueue {
struct delayed_work callback_dwork;
struct delayed_work watchdog_timer_dwork;
struct delayed_work property_validate_dwork;
- struct amdgpu_dm_connector *aconnector;
+ struct amdgpu_dm_connector *aconnector[AMDGPU_DM_MAX_DISPLAY_INDEX];
struct mutex mutex;
struct mod_hdcp hdcp;
@@ -51,7 +51,8 @@ struct hdcp_workqueue {
struct mod_hdcp_display display;
struct mod_hdcp_link link;
- enum mod_hdcp_encryption_status encryption_status;
+ enum mod_hdcp_encryption_status encryption_status[
+ AMDGPU_DM_MAX_DISPLAY_INDEX];
uint8_t max_link;
uint8_t *srm;
--
2.37.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/3] drm/amd/display: save and restore a connector's HDCP properties
2022-09-23 20:52 [PATCH 1/3] drm/amd/display: fix HDCP drm prop update for MST Hamza Mahfooz
@ 2022-09-23 20:52 ` Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 3/3] drm/amd/display: fix a crash caused by hot plugging on certain MST hubs Hamza Mahfooz
1 sibling, 0 replies; 3+ messages in thread
From: Hamza Mahfooz @ 2022-09-23 20:52 UTC (permalink / raw)
To: linux-kernel
Cc: Hamza Mahfooz, Harry Wentland, Leo Li, Rodrigo Siqueira,
Alex Deucher, Christian König, Pan, Xinhui, David Airlie,
Daniel Vetter, Nicholas Kazlauskas, Aurabindo Pillai, Roman Li,
Jude Shih, Qingqing Zhuo, Wayne Lin, hersen wu, Fangzhi Zuo,
Thomas Zimmermann, amd-gfx, dri-devel
When a display is unplugged from a MST hub, the connector will be
destroyed in dm_dp_mst_connector_destroy(). The connector's HDCP
properties, like HDCP state will be lost. So, save the connector's HDCP
properties into hdcp_work in amdgpu_dm_atomic_commit_tail(). Also, if
the same display is plugged back in with the same display index, restore
its HDCP properties from hdcp_work in dm_dp_mst_get_modes().
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 56 +++++++++++++++++--
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.h | 13 +++++
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 33 +++++++++++
3 files changed, 97 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ece2003a74cc..8d8788792f7d 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7990,6 +7990,12 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
struct drm_connector *connector;
struct drm_connector_state *old_con_state, *new_con_state;
struct dm_crtc_state *dm_old_crtc_state, *dm_new_crtc_state;
+#ifdef CONFIG_DRM_AMD_DC_HDCP
+ struct dc_edid_caps *edid_caps;
+ struct hdcp_workqueue *hdcp_work, *hdcp_w;
+ unsigned int index;
+ bool enable_encryption = false;
+#endif
int crtc_disable_count = 0;
bool mode_set_reset_required = false;
@@ -8165,11 +8171,51 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
continue;
}
- if (is_content_protection_different(new_con_state, old_con_state, connector, adev->dm.hdcp_workqueue))
- hdcp_update_display(
- adev->dm.hdcp_workqueue, aconnector->dc_link->link_index, aconnector,
- new_con_state->hdcp_content_type,
- new_con_state->content_protection == DRM_MODE_CONTENT_PROTECTION_DESIRED);
+ if (is_content_protection_different(new_con_state,
+ old_con_state,
+ connector,
+ adev->dm.hdcp_workqueue)) {
+
+ if (new_con_state->content_protection ==
+ DRM_MODE_CONTENT_PROTECTION_DESIRED)
+ enable_encryption = true;
+
+ if (aconnector->dc_link && aconnector->dc_sink &&
+ aconnector->dc_link->type ==
+ dc_connection_mst_branch) {
+ hdcp_work = adev->dm.hdcp_workqueue;
+ hdcp_w = &hdcp_work[
+ aconnector->dc_link->link_index];
+ edid_caps = &aconnector->dc_sink->edid_caps;
+ index = connector->index;
+
+ hdcp_w->sink_edid_id[index].manufacturer_id =
+ edid_caps->manufacturer_id;
+ hdcp_w->sink_edid_id[index].product_id =
+ edid_caps->product_id;
+ hdcp_w->sink_edid_id[index].serial_number =
+ edid_caps->serial_number;
+ hdcp_w->sink_edid_id[index].manufacture_week =
+ edid_caps->manufacture_week;
+ hdcp_w->sink_edid_id[index].manufacture_year =
+ edid_caps->manufacture_year;
+
+ hdcp_w->hdcp_content_type[index] =
+ new_con_state->hdcp_content_type;
+ hdcp_w->content_protection[index] =
+ new_con_state->content_protection;
+
+ if (new_crtc_state &&
+ new_crtc_state->mode_changed)
+ enable_encryption = true;
+ }
+
+ hdcp_update_display(adev->dm.hdcp_workqueue,
+ aconnector->dc_link->link_index,
+ aconnector,
+ new_con_state->hdcp_content_type,
+ enable_encryption);
+ }
}
#endif
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
index b2dbc0719472..31a81ee5ab69 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_hdcp.h
@@ -37,6 +37,14 @@ struct mod_hdcp_link;
struct mod_hdcp_display;
struct cp_psp;
+struct sink_identification {
+ uint16_t manufacturer_id;
+ uint16_t product_id;
+ uint32_t serial_number;
+ uint8_t manufacture_week;
+ uint8_t manufacture_year;
+};
+
struct hdcp_workqueue {
struct work_struct cpirq_work;
struct work_struct property_update_work;
@@ -53,6 +61,11 @@ struct hdcp_workqueue {
enum mod_hdcp_encryption_status encryption_status[
AMDGPU_DM_MAX_DISPLAY_INDEX];
+
+ struct sink_identification sink_edid_id[AMDGPU_DM_MAX_DISPLAY_INDEX];
+ unsigned int hdcp_content_type[AMDGPU_DM_MAX_DISPLAY_INDEX];
+ unsigned int content_protection[AMDGPU_DM_MAX_DISPLAY_INDEX];
+
uint8_t max_link;
uint8_t *srm;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index ce6929224a6e..872c83e61a13 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -31,6 +31,9 @@
#include "amdgpu.h"
#include "amdgpu_dm.h"
#include "amdgpu_dm_mst_types.h"
+#ifdef CONFIG_DRM_AMD_DC_HDCP
+#include "amdgpu_dm_hdcp.h"
+#endif
#include "dc.h"
#include "dm_helpers.h"
@@ -272,6 +275,10 @@ static bool retrieve_downstream_port_device(struct amdgpu_dm_connector *aconnect
static int dm_dp_mst_get_modes(struct drm_connector *connector)
{
struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
+#ifdef CONFIG_DRM_AMD_DC_HDCP
+ struct hdcp_workqueue *hdcp_work, *hdcp_w;
+ unsigned int index;
+#endif
int ret = 0;
if (!aconnector)
@@ -344,6 +351,32 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector)
/* dc_link_add_remote_sink returns a new reference */
aconnector->dc_sink = dc_sink;
+#ifdef CONFIG_DRM_AMD_DC_HDCP
+ if (aconnector->dc_sink && connector->state) {
+ hdcp_work =
+ drm_to_adev(connector->dev)->dm.hdcp_workqueue;
+ hdcp_w = &hdcp_work[aconnector->dc_link->link_index];
+ index = connector->index;
+
+ if (hdcp_w->sink_edid_id[index].manufacturer_id ==
+ aconnector->dc_sink->edid_caps.manufacturer_id &&
+ hdcp_w->sink_edid_id[index].product_id ==
+ aconnector->dc_sink->edid_caps.product_id &&
+ hdcp_w->sink_edid_id[index].serial_number ==
+ aconnector->dc_sink->edid_caps.serial_number &&
+ hdcp_w->sink_edid_id[index].manufacture_week ==
+ aconnector->dc_sink->edid_caps.manufacture_week &&
+ hdcp_w->sink_edid_id[index].manufacture_year ==
+ aconnector->dc_sink->edid_caps.manufacture_year) {
+
+ connector->state->hdcp_content_type =
+ hdcp_w->hdcp_content_type[index];
+ connector->state->content_protection =
+ hdcp_w->content_protection[index];
+ }
+ }
+#endif
+
if (aconnector->dc_sink) {
amdgpu_dm_update_freesync_caps(
connector, aconnector->edid);
--
2.37.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 3/3] drm/amd/display: fix a crash caused by hot plugging on certain MST hubs
2022-09-23 20:52 [PATCH 1/3] drm/amd/display: fix HDCP drm prop update for MST Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 2/3] drm/amd/display: save and restore a connector's HDCP properties Hamza Mahfooz
@ 2022-09-23 20:52 ` Hamza Mahfooz
1 sibling, 0 replies; 3+ messages in thread
From: Hamza Mahfooz @ 2022-09-23 20:52 UTC (permalink / raw)
To: linux-kernel
Cc: Hamza Mahfooz, Harry Wentland, Leo Li, Rodrigo Siqueira,
Alex Deucher, Christian König, Pan, Xinhui, David Airlie,
Daniel Vetter, Nicholas Kazlauskas, Aurabindo Pillai, Roman Li,
Jude Shih, Bhawanpreet Lakha, Wayne Lin, Qingqing Zhuo,
Thomas Zimmermann, hersen wu, Fangzhi Zuo, amd-gfx, dri-devel
Currently we aren't considering the mode_changed property of struct
drm_crtc_state, which can mean that we might not update the display when
it is otherwise necessary, and cause a crash. So, consider mode_changed
in is_content_protection_different().
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 8d8788792f7d..78bd1a5099f1 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -7222,9 +7222,11 @@ is_scaling_state_different(const struct dm_connector_state *dm_state,
}
#ifdef CONFIG_DRM_AMD_DC_HDCP
-static bool is_content_protection_different(struct drm_connector_state *state,
+static bool is_content_protection_different(const struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *state,
const struct drm_connector_state *old_state,
- const struct drm_connector *connector, struct hdcp_workqueue *hdcp_w)
+ const struct drm_connector *connector,
+ struct hdcp_workqueue *hdcp_w)
{
struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
struct dm_connector_state *dm_con_state = to_dm_connector_state(connector->state);
@@ -7289,7 +7291,9 @@ static bool is_content_protection_different(struct drm_connector_state *state,
* ENABLED -> ENABLED
*/
if (old_state->content_protection == state->content_protection)
- return false;
+ return state->content_protection >=
+ DRM_MODE_CONTENT_PROTECTION_DESIRED &&
+ crtc_state && crtc_state->mode_changed;
/*
* Handles: UNDESIRED -> DESIRED
@@ -8171,7 +8175,8 @@ static void amdgpu_dm_atomic_commit_tail(struct drm_atomic_state *state)
continue;
}
- if (is_content_protection_different(new_con_state,
+ if (is_content_protection_different(new_crtc_state,
+ new_con_state,
old_con_state,
connector,
adev->dm.hdcp_workqueue)) {
--
2.37.2
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-09-23 20:53 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-23 20:52 [PATCH 1/3] drm/amd/display: fix HDCP drm prop update for MST Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 2/3] drm/amd/display: save and restore a connector's HDCP properties Hamza Mahfooz
2022-09-23 20:52 ` [PATCH 3/3] drm/amd/display: fix a crash caused by hot plugging on certain MST hubs Hamza Mahfooz
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