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From: Xin Li <xin3.li@intel.com>
To: linux-kernel@vger.kernel.org, x86@kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, hpa@zytor.com
Subject: [PATCH 3/6] x86/gsseg: make asm_load_gs_index() take an u16
Date: Thu,  6 Oct 2022 08:40:38 -0700	[thread overview]
Message-ID: <20221006154041.13001-4-xin3.li@intel.com> (raw)
In-Reply-To: <20221006154041.13001-1-xin3.li@intel.com>

From: "H. Peter Anvin (Intel)" <hpa@zytor.com>

Let gcc know that only the low 16 bits of load_gs_index() argument
actually matter. It might allow it to create slightly better
code. However, do not propagate this into the prototypes of functions
that end up being paravirtualized, to avoid unnecessary changes.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
---
 arch/x86/entry/entry_64.S            | 2 +-
 arch/x86/include/asm/special_insns.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index 9953d966d124..e0c48998d2fb 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -779,7 +779,7 @@ _ASM_NOKPROBE(common_interrupt_return)
 
 /*
  * Reload gs selector with exception handling
- * edi:  new selector
+ *  di:  new selector
  *
  * Is in entry.text as it shouldn't be instrumented.
  */
diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h
index 35f709f619fb..a71d0e8d4684 100644
--- a/arch/x86/include/asm/special_insns.h
+++ b/arch/x86/include/asm/special_insns.h
@@ -120,7 +120,7 @@ static inline void native_wbinvd(void)
 	asm volatile("wbinvd": : :"memory");
 }
 
-extern asmlinkage void asm_load_gs_index(unsigned int selector);
+extern asmlinkage void asm_load_gs_index(u16 selector);
 
 static inline void native_load_gs_index(unsigned int selector)
 {
-- 
2.34.1


  parent reply	other threads:[~2022-10-06 16:04 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-06 15:40 [PATCH 0/6] Enable LKGS instruction Xin Li
2022-10-06 15:40 ` [PATCH 1/6] x86/cpufeature: add cpu feature bit for LKGS Xin Li
2022-10-06 15:40 ` [PATCH 2/6] x86/opcode: add LKGS instruction to x86-opcode-map Xin Li
2022-10-06 15:40 ` Xin Li [this message]
2022-10-06 15:40 ` [PATCH 4/6] x86/gsseg: move local_irq_save/restore() into asm_load_gs_index() Xin Li
2022-10-07 14:50   ` Peter Zijlstra
2022-10-07 17:47     ` H. Peter Anvin
2022-10-06 15:40 ` [PATCH 5/6] x86/gsseg: move load_gs_index() to its own header file Xin Li
2022-10-07 15:40   ` Brian Gerst
2022-10-07 17:43     ` H. Peter Anvin
2022-10-07 22:41       ` Li, Xin3
2022-10-06 15:40 ` [PATCH 6/6] x86/gsseg: use the LKGS instruction if available for load_gs_index() Xin Li
2022-10-07 14:47   ` Peter Zijlstra
2022-10-07 17:45     ` H. Peter Anvin
2022-10-07 18:07       ` Li, Xin3
2022-10-07 18:49         ` H. Peter Anvin
2022-10-07 18:01     ` Li, Xin3
2022-10-07 19:24       ` Peter Zijlstra
2022-10-07 20:03         ` H. Peter Anvin
2022-10-07 20:23           ` Peter Zijlstra
2022-10-07 20:33             ` H. Peter Anvin
2022-10-08  5:32               ` Li, Xin3
2022-10-08  7:16                 ` H. Peter Anvin
2022-10-10  4:21                   ` Li, Xin3
2022-10-14  4:36               ` Li, Xin3
2022-10-07 14:52   ` Peter Zijlstra
2022-10-07 15:09   ` Peter Zijlstra
2022-10-08  5:31     ` Li, Xin3
2022-10-07 16:18   ` Brian Gerst
2022-10-08  5:40     ` Li, Xin3
2022-10-08 12:40       ` Brian Gerst
2022-10-10  4:32         ` Li, Xin3
2022-10-10  4:51           ` H. Peter Anvin
2022-10-10  7:53           ` Peter Zijlstra

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