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From: Jiaxi Chen <jiaxi.chen@linux.intel.com>
To: kvm@vger.kernel.org
Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de,
	dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com,
	seanjc@google.com, pbonzini@redhat.com, ndesaulniers@google.com,
	alexandre.belloni@bootlin.com, peterz@infradead.org,
	jiaxi.chen@linux.intel.com, jpoimboe@kernel.org,
	chang.seok.bae@intel.com, pawan.kumar.gupta@linux.intel.com,
	babu.moger@amd.com, jmattson@google.com, sandipan.das@amd.com,
	tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com,
	fenghua.yu@intel.com, keescook@chromium.org,
	jane.malalane@citrix.com, nathan@kernel.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH 1/6] x86: KVM: Enable CMPccXADD CPUID and expose it to guest
Date: Wed, 19 Oct 2022 16:47:29 +0800	[thread overview]
Message-ID: <20221019084734.3590760-2-jiaxi.chen@linux.intel.com> (raw)
In-Reply-To: <20221019084734.3590760-1-jiaxi.chen@linux.intel.com>

CMPccXADD is a new set of instructions in the latest Intel platform Sierra
Forest. It includes a semaphore operation that can compare and add the
operands if condition is met, which can improve database performance.

The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 7]

This patch enables this CPUID in the kernel feature bits and expose it to
guest OS.

Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index ef4775c6db01..445626cb5779 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -308,6 +308,7 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
 #define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
+#define X86_FEATURE_CMPCCXADD           (12*32+ 7) /* CMPccXADD instructions */
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
 #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 7065462378e2..3f745f6fdc43 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -657,7 +657,7 @@ void kvm_set_cpu_caps(void)
 		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
 
 	kvm_cpu_cap_mask(CPUID_7_1_EAX,
-		F(AVX_VNNI) | F(AVX512_BF16)
+		F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD)
 	);
 
 	kvm_cpu_cap_mask(CPUID_D_1_EAX,
-- 
2.27.0


  reply	other threads:[~2022-10-19  8:57 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-19  8:47 [PATCH 0/6] x86: KVM: Expose CPUID to guest for new Intel platform instructions Jiaxi Chen
2022-10-19  8:47 ` Jiaxi Chen [this message]
2022-10-19 15:15   ` [PATCH 1/6] x86: KVM: Enable CMPccXADD CPUID and expose it to guest Sean Christopherson
2022-10-20  7:27     ` Chen, Jiaxi
2022-10-26  3:40     ` Jiaxi Chen
2022-10-26 17:15       ` Borislav Petkov
2022-10-27  2:27         ` Jiaxi Chen
2022-11-01  9:07         ` Jiaxi Chen
2022-11-01 15:07           ` Sean Christopherson
2022-11-03  2:35             ` Jiaxi Chen
2022-10-19  8:47 ` [PATCH 2/6] x86: KVM: Enable AMX-FP16 " Jiaxi Chen
2022-11-02 18:14   ` Dave Hansen
2022-11-02 18:16     ` Paolo Bonzini
2022-11-02 18:21       ` Dave Hansen
2022-11-03  2:38         ` Jiaxi Chen
2022-10-19  8:47 ` [PATCH 3/6] x86: KVM: Enable AVX-IFMA " Jiaxi Chen
2022-10-19  8:47 ` [PATCH 4/6] x86: KVM: Enable AVX-VNNI-INT8 " Jiaxi Chen
2022-10-19  8:52   ` Borislav Petkov
2022-10-19 14:57     ` Sean Christopherson
2022-10-19 15:09       ` Sean Christopherson
2022-10-26  3:33         ` Jiaxi Chen
2022-10-20  7:13     ` Chen, Jiaxi
2022-10-19  8:47 ` [PATCH 5/6] x86: KVM: Enable AVX-NE-CONVERT " Jiaxi Chen
2022-10-19  8:47 ` [PATCH 6/6] x86: KVM: Enable PREFETCHIT0/1 " Jiaxi Chen

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