* [PATCH v3 1/5] arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property
2022-10-25 18:32 [PATCH v3 0/5] add suspend/resume support for i.mx8x SoCs Shenwei Wang
@ 2022-10-25 18:32 ` Shenwei Wang
2022-10-26 8:25 ` Peng Fan
2022-10-25 18:32 ` [PATCH v3 2/5] arm64: dts: imx8qm-ss-lsio: " Shenwei Wang
` (3 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Shenwei Wang @ 2022-10-25 18:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Shenwei Wang, Peng Fan, devicetree, linux-arm-kernel,
linux-kernel, imx
add gpio-ranges property for imx8dxl soc.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
.../boot/dts/freescale/imx8dxl-ss-lsio.dtsi | 41 +++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
index 815bd987b09b..5306d2b3fc3f 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
@@ -6,41 +6,82 @@
&lsio_gpio0 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 47 13>,
+ <&iomuxc 13 61 4>,
+ <&iomuxc 19 67 4>,
+ <&iomuxc 24 72 1>;
};
&lsio_gpio1 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 4 74 5>,
+ <&iomuxc 9 80 16>;
};
&lsio_gpio2 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 1 98 2>,
+ <&iomuxc 3 101 1>,
+ <&iomuxc 5 107 8>;
};
&lsio_gpio3 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 115 4>,
+ <&iomuxc 9 121 1>,
+ <&iomuxc 10 120 1>,
+ <&iomuxc 11 123 1>,
+ <&iomuxc 12 122 1>,
+ <&iomuxc 13 125 1>,
+ <&iomuxc 14 124 1>,
+ <&iomuxc 16 126 1>,
+ <&iomuxc 17 128 1>,
+ <&iomuxc 18 131 1>,
+ <&iomuxc 19 130 1>,
+ <&iomuxc 20 133 1>,
+ <&iomuxc 21 132 1>,
+ <&iomuxc 22 129 1>,
+ <&iomuxc 23 134 1>;
};
&lsio_gpio4 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 0 3>,
+ <&iomuxc 3 4 4>,
+ <&iomuxc 7 9 12>,
+ <&iomuxc 19 22 2>,
+ <&iomuxc 21 25 2>,
+ <&iomuxc 29 29 3>;
};
&lsio_gpio5 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 32 3>,
+ <&iomuxc 3 36 6>,
+ <&iomuxc 9 43 3>;
};
&lsio_gpio6 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 53 7>,
+ <&iomuxc 8 86 10>,
+ <&iomuxc 19 107 8>;
};
&lsio_gpio7 {
compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&iomuxc 0 0 3>,
+ <&iomuxc 3 4 4>,
+ <&iomuxc 8 22 2>,
+ <&iomuxc 10 25 2>,
+ <&iomuxc 16 44 2>;
};
&lsio_mu0 {
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 1/5] arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property
2022-10-25 18:32 ` [PATCH v3 1/5] arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property Shenwei Wang
@ 2022-10-26 8:25 ` Peng Fan
0 siblings, 0 replies; 13+ messages in thread
From: Peng Fan @ 2022-10-26 8:25 UTC (permalink / raw)
To: Shenwei Wang
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel, linux-kernel, imx
On Tue, Oct 25, 2022 at 01:32:40PM -0500, Shenwei Wang wrote:
>add gpio-ranges property for imx8dxl soc.
>
>Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
>---
> .../boot/dts/freescale/imx8dxl-ss-lsio.dtsi | 41 +++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
>index 815bd987b09b..5306d2b3fc3f 100644
>--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
>+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-lsio.dtsi
>@@ -6,41 +6,82 @@
> &lsio_gpio0 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 47 13>,
>+ <&iomuxc 13 61 4>,
>+ <&iomuxc 19 67 4>,
>+ <&iomuxc 24 72 1>;
> };
>
> &lsio_gpio1 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 4 74 5>,
>+ <&iomuxc 9 80 16>;
> };
>
> &lsio_gpio2 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 1 98 2>,
>+ <&iomuxc 3 101 1>,
>+ <&iomuxc 5 107 8>;
> };
>
> &lsio_gpio3 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 115 4>,
>+ <&iomuxc 9 121 1>,
>+ <&iomuxc 10 120 1>,
>+ <&iomuxc 11 123 1>,
>+ <&iomuxc 12 122 1>,
>+ <&iomuxc 13 125 1>,
>+ <&iomuxc 14 124 1>,
>+ <&iomuxc 16 126 1>,
>+ <&iomuxc 17 128 1>,
>+ <&iomuxc 18 131 1>,
>+ <&iomuxc 19 130 1>,
>+ <&iomuxc 20 133 1>,
>+ <&iomuxc 21 132 1>,
>+ <&iomuxc 22 129 1>,
>+ <&iomuxc 23 134 1>;
> };
>
> &lsio_gpio4 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 0 3>,
>+ <&iomuxc 3 4 4>,
>+ <&iomuxc 7 9 12>,
>+ <&iomuxc 19 22 2>,
>+ <&iomuxc 21 25 2>,
>+ <&iomuxc 29 29 3>;
> };
>
> &lsio_gpio5 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 32 3>,
>+ <&iomuxc 3 36 6>,
>+ <&iomuxc 9 43 3>;
> };
>
> &lsio_gpio6 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 53 7>,
>+ <&iomuxc 8 86 10>,
>+ <&iomuxc 19 107 8>;
> };
>
> &lsio_gpio7 {
> compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio";
> interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
>+ gpio-ranges = <&iomuxc 0 0 3>,
>+ <&iomuxc 3 4 4>,
>+ <&iomuxc 8 22 2>,
>+ <&iomuxc 10 25 2>,
>+ <&iomuxc 16 44 2>;
> };
>
> &lsio_mu0 {
Reviewed-by: Peng Fan <peng.fan@nxp.com>
>--
>2.34.1
>
--
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 2/5] arm64: dts: imx8qm-ss-lsio: add gpio-ranges property
2022-10-25 18:32 [PATCH v3 0/5] add suspend/resume support for i.mx8x SoCs Shenwei Wang
2022-10-25 18:32 ` [PATCH v3 1/5] arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property Shenwei Wang
@ 2022-10-25 18:32 ` Shenwei Wang
2022-10-26 8:26 ` Peng Fan
2022-10-25 18:32 ` [PATCH v3 3/5] arm64: dts: imx8qxp-ss-lsio: " Shenwei Wang
` (2 subsequent siblings)
4 siblings, 1 reply; 13+ messages in thread
From: Shenwei Wang @ 2022-10-25 18:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Shenwei Wang, Peng Fan, devicetree, linux-arm-kernel,
linux-kernel, imx
add gpio-ranges property for imx8qm soc.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
.../boot/dts/freescale/imx8qm-ss-lsio.dtsi | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
index 669aa14ce9f7..b483134f84d1 100644
--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
@@ -6,30 +6,68 @@
&lsio_gpio0 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 0 6>,
+ <&iomuxc 6 7 22>,
+ <&iomuxc 28 36 4>;
};
&lsio_gpio1 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 40 4>,
+ <&iomuxc 4 50 12>,
+ <&iomuxc 16 63 8>,
+ <&iomuxc 24 72 8>;
};
&lsio_gpio2 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 80 4>,
+ <&iomuxc 4 85 18>,
+ <&iomuxc 22 104 10>;
};
&lsio_gpio3 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 114 2>,
+ <&iomuxc 2 117 16>,
+ <&iomuxc 18 141 1>,
+ <&iomuxc 19 140 1>,
+ <&iomuxc 20 139 1>,
+ <&iomuxc 21 138 1>,
+ <&iomuxc 22 137 1>,
+ <&iomuxc 23 136 1>,
+ <&iomuxc 24 135 1>,
+ <&iomuxc 25 134 1>,
+ <&iomuxc 26 142 3>,
+ <&iomuxc 29 146 3>;
};
&lsio_gpio4 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 149 3>,
+ <&iomuxc 3 153 4>,
+ <&iomuxc 7 158 6>,
+ <&iomuxc 13 165 6>,
+ <&iomuxc 19 172 8>,
+ <&iomuxc 27 198 5>;
};
&lsio_gpio5 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 203 1>,
+ <&iomuxc 1 205 2>,
+ <&iomuxc 3 210 11>,
+ <&iomuxc 14 223 3>,
+ <&iomuxc 17 227 2>,
+ <&iomuxc 19 230 5>,
+ <&iomuxc 24 236 6>,
+ <&iomuxc 30 243 2>;
};
&lsio_gpio6 {
compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 245 10>,
+ <&iomuxc 10 256 12>;
};
&lsio_gpio7 {
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 2/5] arm64: dts: imx8qm-ss-lsio: add gpio-ranges property
2022-10-25 18:32 ` [PATCH v3 2/5] arm64: dts: imx8qm-ss-lsio: " Shenwei Wang
@ 2022-10-26 8:26 ` Peng Fan
0 siblings, 0 replies; 13+ messages in thread
From: Peng Fan @ 2022-10-26 8:26 UTC (permalink / raw)
To: Shenwei Wang
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel, linux-kernel, imx
On Tue, Oct 25, 2022 at 01:32:41PM -0500, Shenwei Wang wrote:
>add gpio-ranges property for imx8qm soc.
>
>Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
>---
> .../boot/dts/freescale/imx8qm-ss-lsio.dtsi | 38 +++++++++++++++++++
> 1 file changed, 38 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
>index 669aa14ce9f7..b483134f84d1 100644
>--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
>+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lsio.dtsi
>@@ -6,30 +6,68 @@
>
> &lsio_gpio0 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 0 6>,
>+ <&iomuxc 6 7 22>,
>+ <&iomuxc 28 36 4>;
> };
>
> &lsio_gpio1 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 40 4>,
>+ <&iomuxc 4 50 12>,
>+ <&iomuxc 16 63 8>,
>+ <&iomuxc 24 72 8>;
> };
>
> &lsio_gpio2 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 80 4>,
>+ <&iomuxc 4 85 18>,
>+ <&iomuxc 22 104 10>;
> };
>
> &lsio_gpio3 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 114 2>,
>+ <&iomuxc 2 117 16>,
>+ <&iomuxc 18 141 1>,
>+ <&iomuxc 19 140 1>,
>+ <&iomuxc 20 139 1>,
>+ <&iomuxc 21 138 1>,
>+ <&iomuxc 22 137 1>,
>+ <&iomuxc 23 136 1>,
>+ <&iomuxc 24 135 1>,
>+ <&iomuxc 25 134 1>,
>+ <&iomuxc 26 142 3>,
>+ <&iomuxc 29 146 3>;
> };
>
> &lsio_gpio4 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 149 3>,
>+ <&iomuxc 3 153 4>,
>+ <&iomuxc 7 158 6>,
>+ <&iomuxc 13 165 6>,
>+ <&iomuxc 19 172 8>,
>+ <&iomuxc 27 198 5>;
> };
>
> &lsio_gpio5 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 203 1>,
>+ <&iomuxc 1 205 2>,
>+ <&iomuxc 3 210 11>,
>+ <&iomuxc 14 223 3>,
>+ <&iomuxc 17 227 2>,
>+ <&iomuxc 19 230 5>,
>+ <&iomuxc 24 236 6>,
>+ <&iomuxc 30 243 2>;
> };
>
> &lsio_gpio6 {
> compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 245 10>,
>+ <&iomuxc 10 256 12>;
> };
>
> &lsio_gpio7 {
Reviewed-by: Peng Fan <peng.fan@nxp.com>
>--
>2.34.1
>
--
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 3/5] arm64: dts: imx8qxp-ss-lsio: add gpio-ranges property
2022-10-25 18:32 [PATCH v3 0/5] add suspend/resume support for i.mx8x SoCs Shenwei Wang
2022-10-25 18:32 ` [PATCH v3 1/5] arm64: dts: imx8dxl-ss-lsio: add gpio-ranges property Shenwei Wang
2022-10-25 18:32 ` [PATCH v3 2/5] arm64: dts: imx8qm-ss-lsio: " Shenwei Wang
@ 2022-10-25 18:32 ` Shenwei Wang
2022-10-26 8:27 ` Peng Fan
2022-10-25 18:32 ` [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config Shenwei Wang
2022-10-25 18:32 ` [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms Shenwei Wang
4 siblings, 1 reply; 13+ messages in thread
From: Shenwei Wang @ 2022-10-25 18:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Shenwei Wang, Peng Fan, devicetree, linux-arm-kernel,
linux-kernel, imx
add gpio-ranges property for imx8qxp soc.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
.../boot/dts/freescale/imx8qxp-ss-lsio.dtsi | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
index 8e2152c6eb88..8f722b1dd078 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
@@ -6,26 +6,51 @@
&lsio_gpio0 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 1 56 12>,
+ <&iomuxc 13 69 4>,
+ <&iomuxc 19 75 4>,
+ <&iomuxc 24 80 1>,
+ <&iomuxc 25 82 7>;
};
&lsio_gpio1 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 89 9>,
+ <&iomuxc 9 99 16>,
+ <&iomuxc 25 116 7>;
};
&lsio_gpio2 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 123 1>,
+ <&iomuxc 1 126 2>,
+ <&iomuxc 3 129 1>;
};
&lsio_gpio3 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 146 4>,
+ <&iomuxc 4 151 13>,
+ <&iomuxc 17 165 8>;
};
&lsio_gpio4 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 0 3>,
+ <&iomuxc 3 4 4>,
+ <&iomuxc 7 9 6>,
+ <&iomuxc 13 16 6>,
+ <&iomuxc 19 23 2>,
+ <&iomuxc 21 26 2>,
+ <&iomuxc 23 30 6>,
+ <&iomuxc 29 37 3>;
};
&lsio_gpio5 {
compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
+ gpio-ranges = <&iomuxc 0 40 3>,
+ <&iomuxc 3 44 6>,
+ <&iomuxc 9 51 3>;
};
&lsio_gpio6 {
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 3/5] arm64: dts: imx8qxp-ss-lsio: add gpio-ranges property
2022-10-25 18:32 ` [PATCH v3 3/5] arm64: dts: imx8qxp-ss-lsio: " Shenwei Wang
@ 2022-10-26 8:27 ` Peng Fan
0 siblings, 0 replies; 13+ messages in thread
From: Peng Fan @ 2022-10-26 8:27 UTC (permalink / raw)
To: Shenwei Wang
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel, linux-kernel, imx
On Tue, Oct 25, 2022 at 01:32:42PM -0500, Shenwei Wang wrote:
>add gpio-ranges property for imx8qxp soc.
>
>Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
>---
> .../boot/dts/freescale/imx8qxp-ss-lsio.dtsi | 25 +++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
>diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
>index 8e2152c6eb88..8f722b1dd078 100644
>--- a/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
>+++ b/arch/arm64/boot/dts/freescale/imx8qxp-ss-lsio.dtsi
>@@ -6,26 +6,51 @@
>
> &lsio_gpio0 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 1 56 12>,
>+ <&iomuxc 13 69 4>,
>+ <&iomuxc 19 75 4>,
>+ <&iomuxc 24 80 1>,
>+ <&iomuxc 25 82 7>;
> };
>
> &lsio_gpio1 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 89 9>,
>+ <&iomuxc 9 99 16>,
>+ <&iomuxc 25 116 7>;
> };
>
> &lsio_gpio2 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 123 1>,
>+ <&iomuxc 1 126 2>,
>+ <&iomuxc 3 129 1>;
> };
>
> &lsio_gpio3 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 146 4>,
>+ <&iomuxc 4 151 13>,
>+ <&iomuxc 17 165 8>;
> };
>
> &lsio_gpio4 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 0 3>,
>+ <&iomuxc 3 4 4>,
>+ <&iomuxc 7 9 6>,
>+ <&iomuxc 13 16 6>,
>+ <&iomuxc 19 23 2>,
>+ <&iomuxc 21 26 2>,
>+ <&iomuxc 23 30 6>,
>+ <&iomuxc 29 37 3>;
> };
>
> &lsio_gpio5 {
> compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio";
>+ gpio-ranges = <&iomuxc 0 40 3>,
>+ <&iomuxc 3 44 6>,
>+ <&iomuxc 9 51 3>;
> };
>
> &lsio_gpio6 {
Reviewed-by: Peng Fan <peng.fan@nxp.com>
>--
>2.34.1
>
--
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config
2022-10-25 18:32 [PATCH v3 0/5] add suspend/resume support for i.mx8x SoCs Shenwei Wang
` (2 preceding siblings ...)
2022-10-25 18:32 ` [PATCH v3 3/5] arm64: dts: imx8qxp-ss-lsio: " Shenwei Wang
@ 2022-10-25 18:32 ` Shenwei Wang
2022-10-26 3:56 ` kernel test robot
2022-10-26 8:21 ` Peng Fan
2022-10-25 18:32 ` [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms Shenwei Wang
4 siblings, 2 replies; 13+ messages in thread
From: Shenwei Wang @ 2022-10-25 18:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Shenwei Wang, Peng Fan, devicetree, linux-arm-kernel,
linux-kernel, imx
add the logic to configure the pad wakeup function via
the pin_config_set handler.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
drivers/pinctrl/freescale/pinctrl-scu.c | 30 +++++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/drivers/pinctrl/freescale/pinctrl-scu.c b/drivers/pinctrl/freescale/pinctrl-scu.c
index 59b5f8a35111..0b172f7e7261 100644
--- a/drivers/pinctrl/freescale/pinctrl-scu.c
+++ b/drivers/pinctrl/freescale/pinctrl-scu.c
@@ -15,6 +15,11 @@
#include "../core.h"
#include "pinctrl-imx.h"
+#define IMX_SC_PAD_FUNC_GET_WAKEUP 9
+#define IMX_SC_PAD_FUNC_SET_WAKEUP 4
+#define IMX_SC_IRQ_GROUP_WAKE 3 /* Wakeup interrupts */
+#define IMX_SC_IRQ_PAD 2 /* Pad wakeup */
+
enum pad_func_e {
IMX_SC_PAD_FUNC_SET = 15,
IMX_SC_PAD_FUNC_GET = 16,
@@ -36,10 +41,18 @@ struct imx_sc_msg_resp_pad_get {
u32 val;
} __packed;
+struct imx_sc_msg_gpio_set_pad_wakeup {
+ struct imx_sc_rpc_msg hdr;
+ u16 pad;
+ u8 wakeup;
+} __packed __aligned(4);
+
static struct imx_sc_ipc *pinctrl_ipc_handle;
int imx_pinctrl_sc_ipc_init(struct platform_device *pdev)
{
+ imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_WAKE,
+ IMX_SC_IRQ_PAD, true);
return imx_scu_get_handle(&pinctrl_ipc_handle);
}
EXPORT_SYMBOL_GPL(imx_pinctrl_sc_ipc_init);
@@ -81,6 +94,23 @@ int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
unsigned int val;
int ret;
+ if (num_configs == 1) {
+ struct imx_sc_msg_gpio_set_pad_wakeup wmsg;
+
+ hdr = &wmsg.hdr;
+ hdr->ver = IMX_SC_RPC_VERSION;
+ hdr->svc = IMX_SC_RPC_SVC_PAD;
+ hdr->func = IMX_SC_PAD_FUNC_SET_WAKEUP;
+ hdr->size = 2;
+ wmsg.pad = pin_id;
+ wmsg.wakeup = *configs;
+ ret = imx_scu_call_rpc(pinctrl_ipc_handle, &wmsg, true);
+
+ dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
+ pin_id, *configs);
+ return ret;
+ }
+
/*
* Set mux and conf together in one IPC call
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config
2022-10-25 18:32 ` [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config Shenwei Wang
@ 2022-10-26 3:56 ` kernel test robot
2022-10-26 8:21 ` Peng Fan
1 sibling, 0 replies; 13+ messages in thread
From: kernel test robot @ 2022-10-26 3:56 UTC (permalink / raw)
To: Shenwei Wang, Rob Herring, Krzysztof Kozlowski, Shawn Guo,
Sascha Hauer, Linus Walleij, Bartosz Golaszewski, Dong Aisheng,
Jacky Bai
Cc: oe-kbuild-all, Pengutronix Kernel Team, Fabio Estevam,
NXP Linux Team, Shenwei Wang, Peng Fan, devicetree,
linux-arm-kernel, linux-kernel, imx
[-- Attachment #1: Type: text/plain, Size: 6768 bytes --]
Hi Shenwei,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on robh/for-next]
[also build test WARNING on linusw-pinctrl/devel brgl/gpio/for-next krzk/for-next krzk-dt/for-next linus/master v6.1-rc2 next-20221025]
[cannot apply to pinctrl-samsung/for-next]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Shenwei-Wang/add-suspend-resume-support-for-i-mx8x-SoCs/20221026-023543
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20221025183244.615318-5-shenwei.wang%40nxp.com
patch subject: [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config
config: arm64-allyesconfig (attached as .config)
compiler: aarch64-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/04a251addfbc0236901c463ebe3cb6d38dd71ca8
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Shenwei-Wang/add-suspend-resume-support-for-i-mx8x-SoCs/20221026-023543
git checkout 04a251addfbc0236901c463ebe3cb6d38dd71ca8
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=arm64 SHELL=/bin/bash drivers/pinctrl/freescale/
If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from include/linux/printk.h:566,
from include/asm-generic/bug.h:22,
from arch/arm64/include/asm/bug.h:26,
from include/linux/bug.h:5,
from arch/arm64/include/asm/cpufeature.h:20,
from arch/arm64/include/asm/ptrace.h:11,
from arch/arm64/include/asm/irqflags.h:10,
from include/linux/irqflags.h:16,
from include/linux/rcupdate.h:26,
from include/linux/rculist.h:11,
from include/linux/pid.h:5,
from include/linux/sched.h:14,
from include/linux/ratelimit.h:6,
from include/linux/dev_printk.h:16,
from include/linux/device.h:15,
from include/linux/firmware/imx/ipc.h:11,
from include/linux/firmware/imx/sci.h:13,
from drivers/pinctrl/freescale/pinctrl-scu.c:9:
drivers/pinctrl/freescale/pinctrl-scu.c: In function 'imx_pinconf_set_scu':
>> drivers/pinctrl/freescale/pinctrl-scu.c:109:37: warning: format '%d' expects argument of type 'int', but argument 5 has type 'long unsigned int' [-Wformat=]
109 | dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/dynamic_debug.h:223:29: note: in definition of macro '__dynamic_func_call_cls'
223 | func(&id, ##__VA_ARGS__); \
| ^~~~~~~~~~~
include/linux/dynamic_debug.h:249:9: note: in expansion of macro '_dynamic_func_call_cls'
249 | _dynamic_func_call_cls(_DPRINTK_CLASS_DFLT, fmt, func, ##__VA_ARGS__)
| ^~~~~~~~~~~~~~~~~~~~~~
include/linux/dynamic_debug.h:272:9: note: in expansion of macro '_dynamic_func_call'
272 | _dynamic_func_call(fmt, __dynamic_dev_dbg, \
| ^~~~~~~~~~~~~~~~~~
include/linux/dev_printk.h:155:9: note: in expansion of macro 'dynamic_dev_dbg'
155 | dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~~~~~~~~~
include/linux/dev_printk.h:155:30: note: in expansion of macro 'dev_fmt'
155 | dynamic_dev_dbg(dev, dev_fmt(fmt), ##__VA_ARGS__)
| ^~~~~~~
drivers/pinctrl/freescale/pinctrl-scu.c:109:17: note: in expansion of macro 'dev_dbg'
109 | dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
| ^~~~~~~
drivers/pinctrl/freescale/pinctrl-scu.c:109:63: note: format string is defined here
109 | dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
| ~^
| |
| int
| %ld
vim +109 drivers/pinctrl/freescale/pinctrl-scu.c
85
86 int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
87 unsigned long *configs, unsigned num_configs)
88 {
89 struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
90 struct imx_sc_msg_req_pad_set msg;
91 struct imx_sc_rpc_msg *hdr = &msg.hdr;
92 unsigned int mux = configs[0];
93 unsigned int conf = configs[1];
94 unsigned int val;
95 int ret;
96
97 if (num_configs == 1) {
98 struct imx_sc_msg_gpio_set_pad_wakeup wmsg;
99
100 hdr = &wmsg.hdr;
101 hdr->ver = IMX_SC_RPC_VERSION;
102 hdr->svc = IMX_SC_RPC_SVC_PAD;
103 hdr->func = IMX_SC_PAD_FUNC_SET_WAKEUP;
104 hdr->size = 2;
105 wmsg.pad = pin_id;
106 wmsg.wakeup = *configs;
107 ret = imx_scu_call_rpc(pinctrl_ipc_handle, &wmsg, true);
108
> 109 dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
110 pin_id, *configs);
111 return ret;
112 }
113
114 /*
115 * Set mux and conf together in one IPC call
116 */
117 WARN_ON(num_configs != 2);
118
119 val = conf | BM_PAD_CTL_IFMUX_ENABLE | BM_PAD_CTL_GP_ENABLE;
120 val |= mux << BP_PAD_CTL_IFMUX;
121
122 hdr->ver = IMX_SC_RPC_VERSION;
123 hdr->svc = IMX_SC_RPC_SVC_PAD;
124 hdr->func = IMX_SC_PAD_FUNC_SET;
125 hdr->size = 3;
126
127 msg.pad = pin_id;
128 msg.val = val;
129
130 ret = imx_scu_call_rpc(pinctrl_ipc_handle, &msg, true);
131
132 dev_dbg(ipctl->dev, "write: pin_id %u config 0x%x val 0x%x\n",
133 pin_id, conf, val);
134
135 return ret;
136 }
137 EXPORT_SYMBOL_GPL(imx_pinconf_set_scu);
138
--
0-DAY CI Kernel Test Service
https://01.org/lkp
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 84414 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config
2022-10-25 18:32 ` [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config Shenwei Wang
2022-10-26 3:56 ` kernel test robot
@ 2022-10-26 8:21 ` Peng Fan
1 sibling, 0 replies; 13+ messages in thread
From: Peng Fan @ 2022-10-26 8:21 UTC (permalink / raw)
To: Shenwei Wang
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel, linux-kernel, imx
On Tue, Oct 25, 2022 at 01:32:43PM -0500, Shenwei Wang wrote:
>add the logic to configure the pad wakeup function via
>the pin_config_set handler.
>
>Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
>---
> drivers/pinctrl/freescale/pinctrl-scu.c | 30 +++++++++++++++++++++++++
> 1 file changed, 30 insertions(+)
>
>diff --git a/drivers/pinctrl/freescale/pinctrl-scu.c b/drivers/pinctrl/freescale/pinctrl-scu.c
>index 59b5f8a35111..0b172f7e7261 100644
>--- a/drivers/pinctrl/freescale/pinctrl-scu.c
>+++ b/drivers/pinctrl/freescale/pinctrl-scu.c
>@@ -15,6 +15,11 @@
> #include "../core.h"
> #include "pinctrl-imx.h"
>
>+#define IMX_SC_PAD_FUNC_GET_WAKEUP 9
>+#define IMX_SC_PAD_FUNC_SET_WAKEUP 4
>+#define IMX_SC_IRQ_GROUP_WAKE 3 /* Wakeup interrupts */
>+#define IMX_SC_IRQ_PAD 2 /* Pad wakeup */
>+
> enum pad_func_e {
> IMX_SC_PAD_FUNC_SET = 15,
> IMX_SC_PAD_FUNC_GET = 16,
>@@ -36,10 +41,18 @@ struct imx_sc_msg_resp_pad_get {
> u32 val;
> } __packed;
>
>+struct imx_sc_msg_gpio_set_pad_wakeup {
>+ struct imx_sc_rpc_msg hdr;
>+ u16 pad;
>+ u8 wakeup;
>+} __packed __aligned(4);
>+
> static struct imx_sc_ipc *pinctrl_ipc_handle;
>
> int imx_pinctrl_sc_ipc_init(struct platform_device *pdev)
> {
>+ imx_scu_irq_group_enable(IMX_SC_IRQ_GROUP_WAKE,
>+ IMX_SC_IRQ_PAD, true);
> return imx_scu_get_handle(&pinctrl_ipc_handle);
> }
> EXPORT_SYMBOL_GPL(imx_pinctrl_sc_ipc_init);
>@@ -81,6 +94,23 @@ int imx_pinconf_set_scu(struct pinctrl_dev *pctldev, unsigned pin_id,
> unsigned int val;
> int ret;
>
>+ if (num_configs == 1) {
>+ struct imx_sc_msg_gpio_set_pad_wakeup wmsg;
>+
>+ hdr = &wmsg.hdr;
>+ hdr->ver = IMX_SC_RPC_VERSION;
>+ hdr->svc = IMX_SC_RPC_SVC_PAD;
>+ hdr->func = IMX_SC_PAD_FUNC_SET_WAKEUP;
>+ hdr->size = 2;
>+ wmsg.pad = pin_id;
>+ wmsg.wakeup = *configs;
>+ ret = imx_scu_call_rpc(pinctrl_ipc_handle, &wmsg, true);
>+
>+ dev_dbg(ipctl->dev, "wakeup pin_id: %d type: %d\n",
>+ pin_id, *configs);
Format issue, and configs should be unsigned long type. Otherwise, looks good
to me.
Regards,
Peng.
>+ return ret;
>+ }
>+
> /*
> * Set mux and conf together in one IPC call
> */
>--
>2.34.1
>
--
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms
2022-10-25 18:32 [PATCH v3 0/5] add suspend/resume support for i.mx8x SoCs Shenwei Wang
` (3 preceding siblings ...)
2022-10-25 18:32 ` [PATCH v3 4/5] pinctrl: freescale: add pad wakeup config Shenwei Wang
@ 2022-10-25 18:32 ` Shenwei Wang
2022-10-26 6:20 ` Peng Fan
4 siblings, 1 reply; 13+ messages in thread
From: Shenwei Wang @ 2022-10-25 18:32 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai
Cc: Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Shenwei Wang, Peng Fan, devicetree, linux-arm-kernel,
linux-kernel, imx
On i.MX8QM/QXP/DXL SoCs, even a GPIO is selected as the wakeup source,
the GPIO block will be powered off when system enters into suspend
state. This can greatly reduce the power consumption of suspend state
because the whole partition can be shutdown. This is called PAD wakeup
feature on i.MX8x platform.
This patch adds the noirq suspend/resume hooks and uses the pad wakeup
feature as the default wakeup method for GPIO modules on
i.MX8QM/QXP/DXL platforms.
Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
---
drivers/gpio/gpio-mxc.c | 91 ++++++++++++++++++++++++++++++++++++++++-
1 file changed, 90 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
index c871602fc5ba..a6fe5ed3d320 100644
--- a/drivers/gpio/gpio-mxc.c
+++ b/drivers/gpio/gpio-mxc.c
@@ -24,6 +24,12 @@
#include <linux/of_device.h>
#include <linux/bug.h>
+#define IMX_SCU_WAKEUP_OFF 0
+#define IMX_SCU_WAKEUP_LOW_LVL 4
+#define IMX_SCU_WAKEUP_FALL_EDGE 5
+#define IMX_SCU_WAKEUP_RISE_EDGE 6
+#define IMX_SCU_WAKEUP_HIGH_LVL 7
+
/* device type dependent stuff */
struct mxc_gpio_hwdata {
unsigned dr_reg;
@@ -61,6 +67,9 @@ struct mxc_gpio_port {
u32 both_edges;
struct mxc_gpio_reg_saved gpio_saved_reg;
bool power_off;
+ u32 wakeup_pads;
+ bool is_pad_wakeup;
+ u32 pad_type[32];
const struct mxc_gpio_hwdata *hwdata;
};
@@ -130,6 +139,9 @@ static const struct of_device_id mxc_gpio_dt_ids[] = {
{ .compatible = "fsl,imx31-gpio", .data = &imx31_gpio_hwdata },
{ .compatible = "fsl,imx35-gpio", .data = &imx35_gpio_hwdata },
{ .compatible = "fsl,imx7d-gpio", .data = &imx35_gpio_hwdata },
+ { .compatible = "fsl,imx8dxl-gpio", .data = &imx35_gpio_hwdata },
+ { .compatible = "fsl,imx8qm-gpio", .data = &imx35_gpio_hwdata },
+ { .compatible = "fsl,imx8qxp-gpio", .data = &imx35_gpio_hwdata },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mxc_gpio_dt_ids);
@@ -203,6 +215,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
}
writel(1 << gpio_idx, port->base + GPIO_ISR);
+ port->pad_type[gpio_idx] = type;
return 0;
}
@@ -254,6 +267,9 @@ static void mx3_gpio_irq_handler(struct irq_desc *desc)
struct mxc_gpio_port *port = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
+ if (port->is_pad_wakeup)
+ return;
+
chained_irq_enter(chip, desc);
irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
@@ -306,11 +322,13 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
ret = enable_irq_wake(port->irq_high);
else
ret = enable_irq_wake(port->irq);
+ port->wakeup_pads |= (1<<gpio_idx);
} else {
if (port->irq_high && (gpio_idx >= 16))
ret = disable_irq_wake(port->irq_high);
else
ret = disable_irq_wake(port->irq);
+ port->wakeup_pads &= ~(1<<gpio_idx);
}
return ret;
@@ -365,7 +383,6 @@ static int mxc_gpio_probe(struct platform_device *pdev)
return -ENOMEM;
port->dev = &pdev->dev;
-
port->hwdata = device_get_match_data(&pdev->dev);
port->base = devm_platform_ioremap_resource(pdev, 0);
@@ -498,6 +515,77 @@ static void mxc_gpio_restore_regs(struct mxc_gpio_port *port)
writel(port->gpio_saved_reg.dr, port->base + GPIO_DR);
}
+static int mxc_gpio_generic_config(struct mxc_gpio_port *port,
+ unsigned int offset, unsigned long config)
+{
+ struct device_node *np = port->dev->of_node;
+
+ if (of_device_is_compatible(np, "fsl,imx8dxl-gpio") ||
+ of_device_is_compatible(np, "fsl,imx8qxp-gpio") ||
+ of_device_is_compatible(np, "fsl,imx8qm-gpio"))
+ return gpiochip_generic_config(&port->gc, offset, config);
+
+ return 0;
+}
+
+static void mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable)
+{
+ unsigned long config;
+ int i, type;
+
+ static const u32 pad_type_map[] = {
+ IMX_SCU_WAKEUP_OFF, /* 0 */
+ IMX_SCU_WAKEUP_RISE_EDGE, /* IRQ_TYPE_EDGE_RISING */
+ IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_FALLING */
+ IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_BOTH */
+ IMX_SCU_WAKEUP_HIGH_LVL, /* IRQ_TYPE_LEVEL_HIGH */
+ IMX_SCU_WAKEUP_OFF, /* 5 */
+ IMX_SCU_WAKEUP_OFF, /* 6 */
+ IMX_SCU_WAKEUP_OFF, /* 7 */
+ IMX_SCU_WAKEUP_LOW_LVL, /* IRQ_TYPE_LEVEL_LOW */
+ };
+
+ for (i = 0; i < 32; i++) {
+ if ((port->wakeup_pads & (1<<i))) {
+ type = port->pad_type[i];
+ if (enable)
+ config = pad_type_map[type];
+ else
+ config = IMX_SCU_WAKEUP_OFF;
+ mxc_gpio_generic_config(port, i, config);
+ }
+ }
+}
+
+static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
+
+ if (port->wakeup_pads > 0) {
+ mxc_gpio_set_pad_wakeup(port, true);
+ port->is_pad_wakeup = true;
+ }
+
+ return 0;
+}
+
+static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
+
+ if (port->wakeup_pads > 0)
+ mxc_gpio_set_pad_wakeup(port, false);
+ port->is_pad_wakeup = false;
+
+ return 0;
+}
+
+static const struct dev_pm_ops mxc_gpio_dev_pm_ops = {
+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume)
+};
+
static int mxc_gpio_syscore_suspend(void)
{
struct mxc_gpio_port *port;
@@ -537,6 +625,7 @@ static struct platform_driver mxc_gpio_driver = {
.name = "gpio-mxc",
.of_match_table = mxc_gpio_dt_ids,
.suppress_bind_attrs = true,
+ .pm = &mxc_gpio_dev_pm_ops,
},
.probe = mxc_gpio_probe,
};
--
2.34.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms
2022-10-25 18:32 ` [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms Shenwei Wang
@ 2022-10-26 6:20 ` Peng Fan
2022-10-27 2:27 ` Shenwei Wang
0 siblings, 1 reply; 13+ messages in thread
From: Peng Fan @ 2022-10-26 6:20 UTC (permalink / raw)
To: Shenwei Wang
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Dong Aisheng, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
devicetree, linux-arm-kernel, linux-kernel, imx
On Tue, Oct 25, 2022 at 01:32:44PM -0500, Shenwei Wang wrote:
>On i.MX8QM/QXP/DXL SoCs, even a GPIO is selected as the wakeup source,
>the GPIO block will be powered off when system enters into suspend
>state. This can greatly reduce the power consumption of suspend state
>because the whole partition can be shutdown. This is called PAD wakeup
>feature on i.MX8x platform.
>
>This patch adds the noirq suspend/resume hooks and uses the pad wakeup
>feature as the default wakeup method for GPIO modules on
>i.MX8QM/QXP/DXL platforms.
>
>Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
>---
> drivers/gpio/gpio-mxc.c | 91 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 90 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpio/gpio-mxc.c b/drivers/gpio/gpio-mxc.c
>index c871602fc5ba..a6fe5ed3d320 100644
>--- a/drivers/gpio/gpio-mxc.c
>+++ b/drivers/gpio/gpio-mxc.c
>@@ -24,6 +24,12 @@
> #include <linux/of_device.h>
> #include <linux/bug.h>
>
>+#define IMX_SCU_WAKEUP_OFF 0
>+#define IMX_SCU_WAKEUP_LOW_LVL 4
>+#define IMX_SCU_WAKEUP_FALL_EDGE 5
>+#define IMX_SCU_WAKEUP_RISE_EDGE 6
>+#define IMX_SCU_WAKEUP_HIGH_LVL 7
>+
> /* device type dependent stuff */
> struct mxc_gpio_hwdata {
> unsigned dr_reg;
>@@ -61,6 +67,9 @@ struct mxc_gpio_port {
> u32 both_edges;
> struct mxc_gpio_reg_saved gpio_saved_reg;
> bool power_off;
>+ u32 wakeup_pads;
>+ bool is_pad_wakeup;
>+ u32 pad_type[32];
> const struct mxc_gpio_hwdata *hwdata;
> };
>
>@@ -130,6 +139,9 @@ static const struct of_device_id mxc_gpio_dt_ids[] = {
> { .compatible = "fsl,imx31-gpio", .data = &imx31_gpio_hwdata },
> { .compatible = "fsl,imx35-gpio", .data = &imx35_gpio_hwdata },
> { .compatible = "fsl,imx7d-gpio", .data = &imx35_gpio_hwdata },
>+ { .compatible = "fsl,imx8dxl-gpio", .data = &imx35_gpio_hwdata },
>+ { .compatible = "fsl,imx8qm-gpio", .data = &imx35_gpio_hwdata },
>+ { .compatible = "fsl,imx8qxp-gpio", .data = &imx35_gpio_hwdata },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, mxc_gpio_dt_ids);
>@@ -203,6 +215,7 @@ static int gpio_set_irq_type(struct irq_data *d, u32 type)
> }
>
> writel(1 << gpio_idx, port->base + GPIO_ISR);
>+ port->pad_type[gpio_idx] = type;
>
> return 0;
> }
>@@ -254,6 +267,9 @@ static void mx3_gpio_irq_handler(struct irq_desc *desc)
> struct mxc_gpio_port *port = irq_desc_get_handler_data(desc);
> struct irq_chip *chip = irq_desc_get_chip(desc);
>
>+ if (port->is_pad_wakeup)
>+ return;
>+
> chained_irq_enter(chip, desc);
>
> irq_stat = readl(port->base + GPIO_ISR) & readl(port->base + GPIO_IMR);
>@@ -306,11 +322,13 @@ static int gpio_set_wake_irq(struct irq_data *d, u32 enable)
> ret = enable_irq_wake(port->irq_high);
> else
> ret = enable_irq_wake(port->irq);
>+ port->wakeup_pads |= (1<<gpio_idx);
"1 << gpio_idx"
> } else {
> if (port->irq_high && (gpio_idx >= 16))
> ret = disable_irq_wake(port->irq_high);
> else
> ret = disable_irq_wake(port->irq);
>+ port->wakeup_pads &= ~(1<<gpio_idx);
"1 << gpio_idx"
> }
>
> return ret;
>@@ -365,7 +383,6 @@ static int mxc_gpio_probe(struct platform_device *pdev)
> return -ENOMEM;
>
> port->dev = &pdev->dev;
>-
> port->hwdata = device_get_match_data(&pdev->dev);
>
> port->base = devm_platform_ioremap_resource(pdev, 0);
>@@ -498,6 +515,77 @@ static void mxc_gpio_restore_regs(struct mxc_gpio_port *port)
> writel(port->gpio_saved_reg.dr, port->base + GPIO_DR);
> }
>
>+static int mxc_gpio_generic_config(struct mxc_gpio_port *port,
>+ unsigned int offset, unsigned long config)
>+{
>+ struct device_node *np = port->dev->of_node;
>+
>+ if (of_device_is_compatible(np, "fsl,imx8dxl-gpio") ||
>+ of_device_is_compatible(np, "fsl,imx8qxp-gpio") ||
>+ of_device_is_compatible(np, "fsl,imx8qm-gpio"))
>+ return gpiochip_generic_config(&port->gc, offset, config);
checkpatch should report warning.
>+
>+ return 0;
>+}
>+
>+static void mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool enable)
>+{
>+ unsigned long config;
>+ int i, type;
>+
>+ static const u32 pad_type_map[] = {
>+ IMX_SCU_WAKEUP_OFF, /* 0 */
>+ IMX_SCU_WAKEUP_RISE_EDGE, /* IRQ_TYPE_EDGE_RISING */
>+ IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_FALLING */
>+ IMX_SCU_WAKEUP_FALL_EDGE, /* IRQ_TYPE_EDGE_BOTH */
>+ IMX_SCU_WAKEUP_HIGH_LVL, /* IRQ_TYPE_LEVEL_HIGH */
>+ IMX_SCU_WAKEUP_OFF, /* 5 */
>+ IMX_SCU_WAKEUP_OFF, /* 6 */
>+ IMX_SCU_WAKEUP_OFF, /* 7 */
>+ IMX_SCU_WAKEUP_LOW_LVL, /* IRQ_TYPE_LEVEL_LOW */
>+ };
>+
>+ for (i = 0; i < 32; i++) {
>+ if ((port->wakeup_pads & (1<<i))) {
>+ type = port->pad_type[i];
>+ if (enable)
>+ config = pad_type_map[type];
>+ else
>+ config = IMX_SCU_WAKEUP_OFF;
>+ mxc_gpio_generic_config(port, i, config);
>+ }
>+ }
>+}
>+
>+static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev)
>+{
>+ struct platform_device *pdev = to_platform_device(dev);
>+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
>+
>+ if (port->wakeup_pads > 0) {
>+ mxc_gpio_set_pad_wakeup(port, true);
>+ port->is_pad_wakeup = true;
>+ }
>+
>+ return 0;
>+}
>+
>+static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev)
>+{
>+ struct platform_device *pdev = to_platform_device(dev);
>+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
>+
>+ if (port->wakeup_pads > 0)
>+ mxc_gpio_set_pad_wakeup(port, false);
>+ port->is_pad_wakeup = false;
>+
>+ return 0;
>+}
>+
>+static const struct dev_pm_ops mxc_gpio_dev_pm_ops = {
>+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend, mxc_gpio_noirq_resume)
>+};
>+
> static int mxc_gpio_syscore_suspend(void)
> {
> struct mxc_gpio_port *port;
>@@ -537,6 +625,7 @@ static struct platform_driver mxc_gpio_driver = {
> .name = "gpio-mxc",
> .of_match_table = mxc_gpio_dt_ids,
> .suppress_bind_attrs = true,
>+ .pm = &mxc_gpio_dev_pm_ops,
> },
> .probe = mxc_gpio_probe,
> };
Except the format issue, patch looks good to me.
Regards,
Peng.
>--
>2.34.1
>
--
^ permalink raw reply [flat|nested] 13+ messages in thread* RE: [PATCH v3 5/5] gpio: mxc: enable pad wakeup on i.MX8x platforms
2022-10-26 6:20 ` Peng Fan
@ 2022-10-27 2:27 ` Shenwei Wang
0 siblings, 0 replies; 13+ messages in thread
From: Shenwei Wang @ 2022-10-27 2:27 UTC (permalink / raw)
To: Peng Fan
Cc: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Linus Walleij, Bartosz Golaszewski, Aisheng Dong, Jacky Bai,
Pengutronix Kernel Team, Fabio Estevam, dl-linux-imx, devicetree,
linux-arm-kernel, linux-kernel, imx
> -----Original Message-----
> From: Peng Fan <peng.fan@nxp.com>
> Sent: Wednesday, October 26, 2022 1:20 AM
> >+ if (of_device_is_compatible(np, "fsl,imx8dxl-gpio") ||
> >+ of_device_is_compatible(np, "fsl,imx8qxp-gpio") ||
> >+ of_device_is_compatible(np, "fsl,imx8qm-gpio"))
> >+ return gpiochip_generic_config(&port->gc, offset, config);
>
> checkpatch should report warning.
>
It is actually no warning. 😊
$ ./scripts/checkpatch.pl 0005-gpio-mxc-enable-pad-wakeup-on-i.MX8x-platforms.patch
total: 0 errors, 0 warnings, 150 lines checked
0005-gpio-mxc-enable-pad-wakeup-on-i.MX8x-platforms.patch has no obvious style problems and is ready for submission.
Regards,
Shenwei
> >+
> >+ return 0;
> >+}
> >+
> >+static void mxc_gpio_set_pad_wakeup(struct mxc_gpio_port *port, bool
> >+enable) {
> >+ unsigned long config;
> >+ int i, type;
> >+
> >+ static const u32 pad_type_map[] = {
> >+ IMX_SCU_WAKEUP_OFF, /* 0 */
> >+ IMX_SCU_WAKEUP_RISE_EDGE, /* IRQ_TYPE_EDGE_RISING */
> >+ IMX_SCU_WAKEUP_FALL_EDGE, /*
> IRQ_TYPE_EDGE_FALLING */
> >+ IMX_SCU_WAKEUP_FALL_EDGE, /*
> IRQ_TYPE_EDGE_BOTH */
> >+ IMX_SCU_WAKEUP_HIGH_LVL, /* IRQ_TYPE_LEVEL_HIGH */
> >+ IMX_SCU_WAKEUP_OFF, /* 5 */
> >+ IMX_SCU_WAKEUP_OFF, /* 6 */
> >+ IMX_SCU_WAKEUP_OFF, /* 7 */
> >+ IMX_SCU_WAKEUP_LOW_LVL, /*
> IRQ_TYPE_LEVEL_LOW */
> >+ };
> >+
> >+ for (i = 0; i < 32; i++) {
> >+ if ((port->wakeup_pads & (1<<i))) {
> >+ type = port->pad_type[i];
> >+ if (enable)
> >+ config = pad_type_map[type];
> >+ else
> >+ config = IMX_SCU_WAKEUP_OFF;
> >+ mxc_gpio_generic_config(port, i, config);
> >+ }
> >+ }
> >+}
> >+
> >+static int __maybe_unused mxc_gpio_noirq_suspend(struct device *dev) {
> >+ struct platform_device *pdev = to_platform_device(dev);
> >+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
> >+
> >+ if (port->wakeup_pads > 0) {
> >+ mxc_gpio_set_pad_wakeup(port, true);
> >+ port->is_pad_wakeup = true;
> >+ }
> >+
> >+ return 0;
> >+}
> >+
> >+static int __maybe_unused mxc_gpio_noirq_resume(struct device *dev) {
> >+ struct platform_device *pdev = to_platform_device(dev);
> >+ struct mxc_gpio_port *port = platform_get_drvdata(pdev);
> >+
> >+ if (port->wakeup_pads > 0)
> >+ mxc_gpio_set_pad_wakeup(port, false);
> >+ port->is_pad_wakeup = false;
> >+
> >+ return 0;
> >+}
> >+
> >+static const struct dev_pm_ops mxc_gpio_dev_pm_ops = {
> >+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(mxc_gpio_noirq_suspend,
> >+mxc_gpio_noirq_resume) };
> >+
> > static int mxc_gpio_syscore_suspend(void) {
> > struct mxc_gpio_port *port;
> >@@ -537,6 +625,7 @@ static struct platform_driver mxc_gpio_driver = {
> > .name = "gpio-mxc",
> > .of_match_table = mxc_gpio_dt_ids,
> > .suppress_bind_attrs = true,
> >+ .pm = &mxc_gpio_dev_pm_ops,
> > },
> > .probe = mxc_gpio_probe,
> > };
>
>
> Except the format issue, patch looks good to me.
>
> Regards,
> Peng.
>
> >--
> >2.34.1
> >
>
> --
^ permalink raw reply [flat|nested] 13+ messages in thread