* [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema
@ 2022-10-28 14:03 Krzysztof Kozlowski
2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
` (3 more replies)
0 siblings, 4 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-28 14:03 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Lars Povlsen,
Steen Hegelund, Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
Cc: Krzysztof Kozlowski
Reference common Qualcomm GCC schema to remove common pieces.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/clock/qcom,gcc-ipq8074.yaml | 25 +++----------------
1 file changed, 4 insertions(+), 21 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
index 21470f52ce36..ac6711ed01ba 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
@@ -17,34 +17,17 @@ description: |
See also:
- dt-bindings/clock/qcom,gcc-ipq8074.h
+allOf:
+ - $ref: qcom,gcc.yaml#
+
properties:
compatible:
const: qcom,gcc-ipq8074
- '#clock-cells':
- const: 1
-
- '#power-domain-cells':
- const: 1
-
- '#reset-cells':
- const: 1
-
- reg:
- maxItems: 1
-
- protected-clocks:
- description:
- Protected clock specifier list as per common clock binding.
-
required:
- compatible
- - reg
- - '#clock-cells'
- - '#power-domain-cells'
- - '#reset-cells'
-additionalProperties: false
+unevaluatedProperties: false
examples:
- |
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports
2022-10-28 14:03 [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema Krzysztof Kozlowski
@ 2022-10-28 14:03 ` Krzysztof Kozlowski
2022-10-30 17:04 ` Oleksij Rempel
2022-10-31 18:57 ` Rob Herring
2022-10-28 14:03 ` [PATCH 2/2] dt-bindings: clock: qcom: cleanup Krzysztof Kozlowski
` (2 subsequent siblings)
3 siblings, 2 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-28 14:03 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Lars Povlsen,
Steen Hegelund, Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
Cc: Krzysztof Kozlowski
'reg' without any constraints allows multiple items which is not the
intention for Ethernet controller's port number.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Please give it a time for Rob's bot to process this.
---
Documentation/devicetree/bindings/net/asix,ax88178.yaml | 4 +++-
Documentation/devicetree/bindings/net/microchip,lan95xx.yaml | 4 +++-
.../devicetree/bindings/net/microchip,lan966x-switch.yaml | 4 ++--
.../devicetree/bindings/net/microchip,sparx5-switch.yaml | 3 ++-
.../devicetree/bindings/net/mscc,vsc7514-switch.yaml | 3 ++-
.../bindings/net/renesas,r8a779f0-ether-switch.yaml | 4 ++--
6 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/asix,ax88178.yaml b/Documentation/devicetree/bindings/net/asix,ax88178.yaml
index 1af52358de4c..a81dbc4792f6 100644
--- a/Documentation/devicetree/bindings/net/asix,ax88178.yaml
+++ b/Documentation/devicetree/bindings/net/asix,ax88178.yaml
@@ -27,7 +27,9 @@ properties:
- usbb95,772b # ASIX AX88772B
- usbb95,7e2b # ASIX AX88772B
- reg: true
+ reg:
+ maxItems: 1
+
local-mac-address: true
mac-address: true
diff --git a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
index cf91fecd8909..3715c5f8f0e0 100644
--- a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
+++ b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
@@ -39,7 +39,9 @@ properties:
- usb424,9e08 # SMSC LAN89530 USB Ethernet Device
- usb424,ec00 # SMSC9512/9514 USB Hub & Ethernet Device
- reg: true
+ reg:
+ maxItems: 1
+
local-mac-address: true
mac-address: true
diff --git a/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml b/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
index dc116f14750e..583d70c51be6 100644
--- a/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
+++ b/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
@@ -83,8 +83,8 @@ properties:
const: 0
reg:
- description:
- Switch port number
+ items:
+ - description: Switch port number
phys:
description:
diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
index 57ffeb8fc876..ccb912561446 100644
--- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
+++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
@@ -89,7 +89,8 @@ properties:
properties:
reg:
- description: Switch port number
+ items:
+ - description: Switch port number
phys:
maxItems: 1
diff --git a/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml b/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
index ee0a504bdb24..1cf82955d75e 100644
--- a/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
+++ b/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
@@ -109,7 +109,8 @@ properties:
properties:
reg:
- description: Switch port number
+ items:
+ - description: Switch port number
phy-handle: true
diff --git a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
index 581fff8902f4..0eba66a29c6c 100644
--- a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
+++ b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
@@ -106,8 +106,8 @@ properties:
properties:
reg:
- description:
- Port number of ETHA (TSNA).
+ items:
+ - description: Port number of ETHA (TSNA).
phys:
maxItems: 1
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] dt-bindings: clock: qcom: cleanup
2022-10-28 14:03 [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema Krzysztof Kozlowski
2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
@ 2022-10-28 14:03 ` Krzysztof Kozlowski
2022-10-28 14:14 ` Jeffrey Hugo
2022-10-31 19:01 ` Rob Herring
2022-10-31 18:51 ` [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema Rob Herring
[not found] ` <20221101194805.9EE0EC433C1@smtp.kernel.org>
3 siblings, 2 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-10-28 14:03 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Lars Povlsen,
Steen Hegelund, Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
Cc: Krzysztof Kozlowski
Clean the Qualcomm SoCs clock bindings:
1. Drop redundant "bindings" in title.
2. Correct language grammar "<independent clause without verb>, which
supports" -> "provides".
3. Use full path to the bindings header, so tools can validate it.
4. Drop quotes where not needed.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../bindings/clock/qcom,a53pll.yaml | 2 +-
.../devicetree/bindings/clock/qcom,a7pll.yaml | 2 +-
.../bindings/clock/qcom,aoncc-sm8250.yaml | 2 +-
.../bindings/clock/qcom,audiocc-sm8250.yaml | 2 +-
.../bindings/clock/qcom,camcc-sm8250.yaml | 6 ++--
.../bindings/clock/qcom,dispcc-sm6125.yaml | 9 +++---
.../bindings/clock/qcom,dispcc-sm6350.yaml | 8 ++---
.../bindings/clock/qcom,dispcc-sm8x50.yaml | 14 ++++-----
.../bindings/clock/qcom,gcc-apq8064.yaml | 18 +++++------
.../bindings/clock/qcom,gcc-apq8084.yaml | 10 +++----
.../bindings/clock/qcom,gcc-ipq8064.yaml | 18 +++++------
.../bindings/clock/qcom,gcc-ipq8074.yaml | 9 +++---
.../bindings/clock/qcom,gcc-msm8660.yaml | 12 ++++----
.../bindings/clock/qcom,gcc-msm8909.yaml | 9 +++---
.../bindings/clock/qcom,gcc-msm8916.yaml | 16 +++++-----
.../bindings/clock/qcom,gcc-msm8976.yaml | 9 +++---
.../bindings/clock/qcom,gcc-msm8994.yaml | 9 +++---
.../bindings/clock/qcom,gcc-msm8996.yaml | 7 ++---
.../bindings/clock/qcom,gcc-msm8998.yaml | 9 +++---
.../bindings/clock/qcom,gcc-other.yaml | 30 +++++++++----------
.../bindings/clock/qcom,gcc-qcm2290.yaml | 9 +++---
.../bindings/clock/qcom,gcc-qcs404.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sc7180.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sc7280.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sc8180x.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sc8280xp.yaml | 7 ++---
.../bindings/clock/qcom,gcc-sdm660.yaml | 8 ++---
.../bindings/clock/qcom,gcc-sdm845.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sdx55.yaml | 7 ++---
.../bindings/clock/qcom,gcc-sdx65.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm6115.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm6125.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm6350.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm8150.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm8250.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm8350.yaml | 9 +++---
.../bindings/clock/qcom,gcc-sm8450.yaml | 9 +++---
.../devicetree/bindings/clock/qcom,gcc.yaml | 6 ++--
.../bindings/clock/qcom,gpucc-sdm660.yaml | 4 +--
.../bindings/clock/qcom,gpucc-sm8350.yaml | 9 +++---
.../devicetree/bindings/clock/qcom,gpucc.yaml | 22 +++++++-------
.../devicetree/bindings/clock/qcom,mmcc.yaml | 4 +--
.../bindings/clock/qcom,msm8998-gpucc.yaml | 8 ++---
.../bindings/clock/qcom,q6sstopcc.yaml | 2 +-
.../bindings/clock/qcom,qcm2290-dispcc.yaml | 8 ++---
.../bindings/clock/qcom,sc7180-camcc.yaml | 9 +++---
.../bindings/clock/qcom,sc7180-dispcc.yaml | 8 ++---
.../clock/qcom,sc7180-lpasscorecc.yaml | 9 +++---
.../bindings/clock/qcom,sc7180-mss.yaml | 7 ++---
.../bindings/clock/qcom,sc7280-camcc.yaml | 6 ++--
.../bindings/clock/qcom,sc7280-dispcc.yaml | 8 ++---
.../bindings/clock/qcom,sc7280-lpasscc.yaml | 9 +++---
.../clock/qcom,sc7280-lpasscorecc.yaml | 12 ++++----
.../bindings/clock/qcom,sdm845-camcc.yaml | 8 ++---
.../bindings/clock/qcom,sdm845-dispcc.yaml | 8 ++---
.../bindings/clock/qcom,sm6115-dispcc.yaml | 7 ++---
.../bindings/clock/qcom,sm6375-gcc.yaml | 9 +++---
.../bindings/clock/qcom,sm8450-camcc.yaml | 8 ++---
.../bindings/clock/qcom,sm8450-dispcc.yaml | 7 ++---
.../bindings/clock/qcom,videocc.yaml | 20 ++++++-------
60 files changed, 258 insertions(+), 289 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
index fe6ca4f68bbe..525ebaa93c85 100644
--- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,a53pll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm A53 PLL Binding
+title: Qualcomm A53 PLL clock
maintainers:
- Bjorn Andersson <andersson@kernel.org>
diff --git a/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml
index 0e96f693b050..809c34eb7d5a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,a7pll.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,a7pll.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm A7 PLL Binding
+title: Qualcomm A7 PLL clock
maintainers:
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
diff --git a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
index c40a74b5d672..4ee2d5a29e23 100644
--- a/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,aoncc-sm8250.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
+title: LPASS Always ON Clock Controller on SM8250 SoCs
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
diff --git a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
index 915d76206ad0..acf37fb633f7 100644
--- a/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,audiocc-sm8250.yaml
@@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/clock/qcom,audiocc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Clock bindings for LPASS Audio Clock Controller on SM8250 SoCs
+title: LPASS Audio Clock Controller on SM8250 SoCs
maintainers:
- Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
diff --git a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml
index 9f239c3960d1..93ec1f598e6e 100644
--- a/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Camera Clock & Reset Controller Binding for SM8250
+title: Qualcomm Camera Clock & Reset Controller on SM8250
maintainers:
- Jonathan Marek <jonathan@marek.ca>
description: |
- Qualcomm camera clock control module which supports the clocks, resets and
+ Qualcomm camera clock control module provides the clocks, resets and
power domains on SM8250.
- See also dt-bindings/clock/qcom,camcc-sm8250.h
+ See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
index 7a03ef19c947..8a210c4c5f82 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6125.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6125.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock Controller Binding for SM6125
+title: Qualcomm Display Clock Controller on SM6125
maintainers:
- Martin Botka <martin.botka@somainline.org>
description: |
- Qualcomm display clock control module which supports the clocks and
- power domains on SM6125.
+ Qualcomm display clock control module provides the clocks and power domains
+ on SM6125.
- See also:
- dt-bindings/clock/qcom,dispcc-sm6125.h
+ See also:: include/dt-bindings/clock/qcom,dispcc-sm6125.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml
index e706678b353a..8efac3fb159f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm6350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for SM6350
+title: Qualcomm Display Clock & Reset Controller on SM6350
maintainers:
- Konrad Dybcio <konrad.dybcio@somainline.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SM6350.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SM6350.
- See also dt-bindings/clock/qcom,dispcc-sm6350.h.
+ See also:: include/dt-bindings/clock/qcom,dispcc-sm6350.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
index 7a8d375e055e..d6774db257f0 100644
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
@@ -4,19 +4,19 @@
$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250/SM8350
+title: Qualcomm Display Clock & Reset Controller on SM8150/SM8250/SM8350
maintainers:
- Jonathan Marek <jonathan@marek.ca>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SM8150/SM8250/SM8350.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SM8150/SM8250/SM8350.
- See also:
- dt-bindings/clock/qcom,dispcc-sm8150.h
- dt-bindings/clock/qcom,dispcc-sm8250.h
- dt-bindings/clock/qcom,dispcc-sm8350.h
+ See also::
+ include/dt-bindings/clock/qcom,dispcc-sm8150.h
+ include/dt-bindings/clock/qcom,dispcc-sm8250.h
+ include/dt-bindings/clock/qcom,dispcc-sm8350.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml
index 6b4efd64c154..09cd7a786871 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml
@@ -4,22 +4,22 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for APQ8064/MSM8960
-
-allOf:
- - $ref: qcom,gcc.yaml#
+title: Qualcomm Global Clock & Reset Controller on APQ8064/MSM8960
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on APQ8064.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on APQ8064.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8960.h
- - dt-bindings/reset/qcom,gcc-msm8960.h
+ See also::
+ include/dt-bindings/clock/qcom,gcc-msm8960.h
+ include/dt-bindings/reset/qcom,gcc-msm8960.h
+
+allOf:
+ - $ref: qcom,gcc.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml
index 397fb918e032..8ade176c24f4 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml
@@ -4,19 +4,19 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for APQ8084
+title: Qualcomm Global Clock & Reset Controller on APQ8084
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <quic_tdas@quicinc.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on APQ8084.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on APQ8084.
See also::
- - dt-bindings/clock/qcom,gcc-apq8084.h
- - dt-bindings/reset/qcom,gcc-apq8084.h
+ include/dt-bindings/clock/qcom,gcc-apq8084.h
+ include/dt-bindings/reset/qcom,gcc-apq8084.h
allOf:
- $ref: qcom,gcc.yaml#
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
index 9eb91dd22557..f6b28061d2ab 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml
@@ -4,21 +4,21 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for IPQ8064
-
-allOf:
- - $ref: qcom,gcc.yaml#
+title: Qualcomm Global Clock & Reset Controller on IPQ8064
maintainers:
- Ansuel Smith <ansuelsmth@gmail.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on IPQ8064.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on IPQ8064.
- See also:
- - dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
- - dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
+ See also::
+ include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
+ include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064)
+
+allOf:
+ - $ref: qcom,gcc.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
index ac6711ed01ba..27a0aa263afe 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8074.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Bindingfor IPQ8074
+title: Qualcomm Global Clock & Reset Controller on IPQ8074
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on IPQ8074.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on IPQ8074.
- See also:
- - dt-bindings/clock/qcom,gcc-ipq8074.h
+ See also:: include/dt-bindings/clock/qcom,gcc-ipq8074.h
allOf:
- $ref: qcom,gcc.yaml#
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml
index 09b2ea60d356..c9e985548621 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml
@@ -4,22 +4,22 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8660
+title: Qualcomm Global Clock & Reset Controller on MSM8660
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <quic_tdas@quicinc.com>
description: |
- Qualcomm global clock control module which supports the clocks and resets on
+ Qualcomm global clock control module provides the clocks and resets on
MSM8660
- See also:
- - dt-bindings/clock/qcom,gcc-msm8660.h
- - dt-bindings/reset/qcom,gcc-msm8660.h
+ See also::
+ include/dt-bindings/clock/qcom,gcc-msm8660.h
+ include/dt-bindings/reset/qcom,gcc-msm8660.h
allOf:
- - $ref: "qcom,gcc.yaml#"
+ - $ref: qcom,gcc.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml
index 2272ea5f78d0..6279a59c2e20 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8909.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8909
+title: Qualcomm Global Clock & Reset Controller on MSM8909
maintainers:
- Stephan Gerhold <stephan@gerhold.net>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on MSM8909.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on MSM8909.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8909.h
+ See also:: include/dt-bindings/clock/qcom,gcc-msm8909.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml
index 2ceb1e501ef9..ad84c0f7680b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml
@@ -4,21 +4,21 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8916 and MSM8939
+title: Qualcomm Global Clock & Reset Controller on MSM8916 and MSM8939
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <quic_tdas@quicinc.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on MSM8916 or MSM8939.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on MSM8916 or MSM8939.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8916.h
- - dt-bindings/clock/qcom,gcc-msm8939.h
- - dt-bindings/reset/qcom,gcc-msm8916.h
- - dt-bindings/reset/qcom,gcc-msm8939.h
+ See also::
+ include/dt-bindings/clock/qcom,gcc-msm8916.h
+ include/dt-bindings/clock/qcom,gcc-msm8939.h
+ include/dt-bindings/reset/qcom,gcc-msm8916.h
+ include/dt-bindings/reset/qcom,gcc-msm8939.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml
index 4b7d69518371..d2186e25f55f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8976.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8976.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8976
+title: Qualcomm Global Clock & Reset Controller on MSM8976
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on MSM8976.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on MSM8976.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8976.h
+ See also:: include/dt-bindings/clock/qcom,gcc-msm8976.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
index 7b9fef6d9b23..8f0f20c1442a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8994.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8994
+title: Qualcomm Global Clock & Reset Controller on MSM8994
maintainers:
- Konrad Dybcio <konrad.dybcio@somainline.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on MSM8994 and MSM8992.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on MSM8994 and MSM8992.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8994.h
+ See also:: include/dt-bindings/clock/qcom,gcc-msm8994.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
index dfc5165db9f1..f77036ace31b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8996.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8996.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8996
+title: Qualcomm Global Clock & Reset Controller on MSM8996
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
+ Qualcomm global clock control module which provides the clocks, resets and
power domains on MSM8996.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8996.h
+ See also:: include/dt-bindings/clock/qcom,gcc-msm8996.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
index 544a2335cf05..2d5355cf9def 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8998.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for MSM8998
+title: Qualcomm Global Clock & Reset Controller on MSM8998
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on MSM8998.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on MSM8998.
- See also:
- - dt-bindings/clock/qcom,gcc-msm8998.h
+ See also:: include/dt-bindings/clock/qcom,gcc-msm8998.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
index 35fc22a19000..a76c21a242d8 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml
@@ -4,29 +4,29 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding
+title: Qualcomm Global Clock & Reset Controller
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains.
-
- See also:
- - dt-bindings/clock/qcom,gcc-ipq4019.h
- - dt-bindings/clock/qcom,gcc-ipq6018.h
- - dt-bindings/reset/qcom,gcc-ipq6018.h
- - dt-bindings/clock/qcom,gcc-msm8953.h
- - dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
- - dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
- - dt-bindings/clock/qcom,gcc-mdm9607.h
- - dt-bindings/clock/qcom,gcc-mdm9615.h
- - dt-bindings/reset/qcom,gcc-mdm9615.h
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains.
+
+ See also::
+ include/dt-bindings/clock/qcom,gcc-ipq4019.h
+ include/dt-bindings/clock/qcom,gcc-ipq6018.h
+ include/dt-bindings/reset/qcom,gcc-ipq6018.h
+ include/dt-bindings/clock/qcom,gcc-msm8953.h
+ include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
+ include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974)
+ include/dt-bindings/clock/qcom,gcc-mdm9607.h
+ include/dt-bindings/clock/qcom,gcc-mdm9615.h
+ include/dt-bindings/reset/qcom,gcc-mdm9615.h
allOf:
- - $ref: "qcom,gcc.yaml#"
+ - $ref: qcom,gcc.yaml#
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml
index aec37e3f5e30..c9bec4656f6e 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcm2290.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-qcm2290.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for QCM2290
+title: Qualcomm Global Clock & Reset Controller on QCM2290
maintainers:
- Shawn Guo <shawn.guo@linaro.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets
- and power domains on QCM2290.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on QCM2290.
- See also:
- - dt-bindings/clock/qcom,gcc-qcm2290.h
+ See also:: include/dt-bindings/clock/qcom,gcc-qcm2290.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml
index ce06f3f8c3e3..dca5775f79a4 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-qcs404.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Bindingfor QCS404
+title: Qualcomm Global Clock & Reset Controller on QCS404
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on QCS404.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on QCS404.
- See also:
- - dt-bindings/clock/qcom,gcc-qcs404.h
+ See also:: include/dt-bindings/clock/qcom,gcc-qcs404.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml
index e4d490e65d14..06dce0c6b7d0 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7180.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc7180.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SC7180
+title: Qualcomm Global Clock & Reset Controller on SC7180
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SC7180.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SC7180.
- See also:
- - dt-bindings/clock/qcom,gcc-sc7180.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sc7180.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
index ea61367e5abc..947b47168cec 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc7280.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc7280.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SC7280
+title: Qualcomm Global Clock & Reset Controller on SC7280
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SC7280.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SC7280.
- See also:
- - dt-bindings/clock/qcom,gcc-sc7280.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sc7280.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml
index 30b5d1215fa8..6c4846b34e4b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8180x.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8180x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SC8180x
+title: Qualcomm Global Clock & Reset Controller on SC8180x
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SC8180x.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SC8180x.
- See also:
- - dt-bindings/clock/qcom,gcc-sc8180x.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sc8180x.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
index b1bf768530a3..c9d8e436d73a 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sc8280xp.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sc8280xp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SC8280xp
+title: Qualcomm Global Clock & Reset Controller on SC8280xp
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
+ Qualcomm global clock control module provides the clocks, resets and
power domains on SC8280xp.
- See also:
- - include/dt-bindings/clock/qcom,gcc-sc8280xp.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sc8280xp.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml
index 68f47174b1b7..52e7412aace5 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml
@@ -11,11 +11,11 @@ maintainers:
- Taniya Das <quic_tdas@quicinc.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SDM630, SDM636 and SDM660
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SDM630, SDM636 and SDM660
- See also:
- - dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660)
+ See also::
+ include/dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and qcom,gcc-sdm660)
$ref: qcom,gcc.yaml#
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
index e169d46c78f8..68e1b7822fe0 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm845.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sdm845.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding
+title: Qualcomm Global Clock & Reset Controller on SDM670 and SDM845
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SDM845
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SDM670 and SDM845
- See also:
- - dt-bindings/clock/qcom,gcc-sdm845.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sdm845.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
index 13ffa16e0833..68d3099c96ae 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx55.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SDX55
+title: Qualcomm Global Clock & Reset Controller on SDX55
maintainers:
- Vinod Koul <vkoul@kernel.org>
- Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
+ Qualcomm global clock control module provides the clocks, resets and
power domains on SDX55
- See also:
- - dt-bindings/clock/qcom,gcc-sdx55.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sdx55.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
index 8a1419c4d465..ba62baab916c 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdx65.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SDX65
+title: Qualcomm Global Clock & Reset Controller on SDX65
maintainers:
- Vamsi krishna Lanka <quic_vamslank@quicinc.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SDX65
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SDX65
- See also:
- - dt-bindings/clock/qcom,gcc-sdx65.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sdx65.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
index bb81a27a1b16..a5ad0a3da397 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6115.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6115.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM6115 and SM4250
+title: Qualcomm Global Clock & Reset Controller on SM6115 and SM4250
maintainers:
- Iskren Chernev <iskren.chernev@gmail.com>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM4250/6115.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM4250/6115.
- See also:
- - dt-bindings/clock/qcom,gcc-sm6115.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm6115.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
index 03e84e15815c..8e37623788bd 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM6125
+title: Qualcomm Global Clock & Reset Controller on SM6125
maintainers:
- Konrad Dybcio <konrad.dybcio@somainline.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM6125.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM6125.
- See also:
- - dt-bindings/clock/qcom,gcc-sm6125.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm6125.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml
index cbe98c01c085..d1b26ab48eaf 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm6350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM6350
+title: Qualcomm Global Clock & Reset Controller on SM6350
maintainers:
- Konrad Dybcio <konrad.dybcio@somainline.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM6350.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM6350.
- See also:
- - dt-bindings/clock/qcom,gcc-sm6350.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm6350.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml
index 0333ccb07d8d..3ea0ff37a4cb 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8150.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8150.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM8150
+title: Qualcomm Global Clock & Reset Controller on SM8150
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM8150.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM8150.
- See also:
- - dt-bindings/clock/qcom,gcc-sm8150.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm8150.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml
index 4e2a9cac0a91..b752542ee20c 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml
@@ -4,18 +4,17 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8250.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM8250
+title: Qualcomm Global Clock & Reset Controller on SM8250
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM8250.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM8250.
- See also:
- - dt-bindings/clock/qcom,gcc-sm8250.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm8250.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
index 3edbeca70a9c..703d9e075247 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8350.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM8350
+title: Qualcomm Global Clock & Reset Controller on SM8350
maintainers:
- Vinod Koul <vkoul@kernel.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM8350.
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM8350.
- See also:
- - dt-bindings/clock/qcom,gcc-sm8350.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
index 102ce6862e24..9a31981fbeb2 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8450.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8450.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM8450
+title: Qualcomm Global Clock & Reset Controller on SM8450
maintainers:
- Vinod Koul <vkoul@kernel.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM8450
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM8450
- See also:
- - dt-bindings/clock/qcom,gcc-sm8450.h
+ See also:: include/dt-bindings/clock/qcom,gcc-sm8450.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
index 2ed27a2ef445..1ab416c83c8d 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc.yaml
@@ -4,15 +4,15 @@
$id: http://devicetree.org/schemas/clock/qcom,gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding Common Bindings
+title: Qualcomm Global Clock & Reset Controller Common Bindings
maintainers:
- Stephen Boyd <sboyd@kernel.org>
- Taniya Das <tdas@codeaurora.org>
description: |
- Common bindings for Qualcomm global clock control module which supports
- the clocks, resets and power domains.
+ Common bindings for Qualcomm global clock control module providing the
+ clocks, resets and power domains.
properties:
'#clock-cells':
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
index 3f70eb59aae3..0518ea963cdd 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc-sdm660.yaml
@@ -4,13 +4,13 @@
$id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Graphics Clock & Reset Controller Binding for SDM630 and SDM660
+title: Qualcomm Graphics Clock & Reset Controller on SDM630 and SDM660
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
description: |
- Qualcomm graphics clock control module which supports the clocks, resets and
+ Qualcomm graphics clock control module provides the clocks, resets and
power domains on SDM630 and SDM660.
See also dt-bindings/clock/qcom,gpucc-sdm660.h.
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
index 0a0546c079a9..fb7ae3d18503 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc-sm8350.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Graphics Clock & Reset Controller Binding
+title: Qualcomm Graphics Clock & Reset Controller on SM8350
maintainers:
- Robert Foss <robert.foss@linaro.org>
description: |
- Qualcomm graphics clock control module which supports the clocks, resets and
- power domains on Qualcomm SoCs.
+ Qualcomm graphics clock control module provides the clocks, resets and power
+ domains on Qualcomm SoCs.
- See also:
- dt-bindings/clock/qcom,gpucc-sm8350.h
+ See also:: include/dt-bindings/clock/qcom,gpucc-sm8350.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index a7d0af1bd9e0..7256c438a4cf 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -4,23 +4,23 @@
$id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Graphics Clock & Reset Controller Binding
+title: Qualcomm Graphics Clock & Reset Controller
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm graphics clock control module which supports the clocks, resets and
- power domains on Qualcomm SoCs.
+ Qualcomm graphics clock control module provides the clocks, resets and power
+ domains on Qualcomm SoCs.
- See also:
- dt-bindings/clock/qcom,gpucc-sdm845.h
- dt-bindings/clock/qcom,gpucc-sc7180.h
- dt-bindings/clock/qcom,gpucc-sc7280.h
- dt-bindings/clock/qcom,gpucc-sc8280xp.h
- dt-bindings/clock/qcom,gpucc-sm6350.h
- dt-bindings/clock/qcom,gpucc-sm8150.h
- dt-bindings/clock/qcom,gpucc-sm8250.h
+ See also::
+ include/dt-bindings/clock/qcom,gpucc-sdm845.h
+ include/dt-bindings/clock/qcom,gpucc-sc7180.h
+ include/dt-bindings/clock/qcom,gpucc-sc7280.h
+ include/dt-bindings/clock/qcom,gpucc-sc8280xp.h
+ include/dt-bindings/clock/qcom,gpucc-sm6350.h
+ include/dt-bindings/clock/qcom,gpucc-sm8150.h
+ include/dt-bindings/clock/qcom,gpucc-sm8250.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
index 03faab5b6a41..7d034aeec804 100644
--- a/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
@@ -4,14 +4,14 @@
$id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Multimedia Clock & Reset Controller Binding
+title: Qualcomm Multimedia Clock & Reset Controller
maintainers:
- Jeffrey Hugo <quic_jhugo@quicinc.com>
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm multimedia clock control module which supports the clocks, resets and
+ Qualcomm multimedia clock control module provides the clocks, resets and
power domains.
properties:
diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml
index d747bb58f0a7..2d8897991663 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8998-gpucc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Graphics Clock & Reset Controller Binding for MSM8998
+title: Qualcomm Graphics Clock & Reset Controller on MSM8998
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm graphics clock control module which supports the clocks, resets and
- power domains on MSM8998.
+ Qualcomm graphics clock control module provides the clocks, resets and power
+ domains on MSM8998.
- See also dt-bindings/clock/qcom,gpucc-msm8998.h.
+ See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml
index bbaaf1e2a203..03fa30fe9253 100644
--- a/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml
@@ -11,7 +11,7 @@ maintainers:
properties:
compatible:
- const: "qcom,qcs404-q6sstopcc"
+ const: qcom,qcs404-q6sstopcc
reg:
items:
diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
index 973e408c6268..4a00f2d41684 100644
--- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,qcm2290-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for qcm2290
+title: Qualcomm Display Clock & Reset Controller on QCM2290
maintainers:
- Loic Poulain <loic.poulain@linaro.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on qcm2290.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on qcm2290.
- See also dt-bindings/clock/qcom,dispcc-qcm2290.h.
+ See also:: include/dt-bindings/clock/qcom,dispcc-qcm2290.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
index f49027edfc44..098c8acf4bad 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7180-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Camera Clock & Reset Controller Binding for SC7180
+title: Qualcomm Camera Clock & Reset Controller on SC7180
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm camera clock control module which supports the clocks, resets and
- power domains on SC7180.
+ Qualcomm camera clock control module provides the clocks, resets and power
+ domains on SC7180.
- See also:
- - dt-bindings/clock/qcom,camcc-sc7180.h
+ See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
index e94847f92770..95ad16d0abc3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-dispcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7180-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for SC7180
+title: Qualcomm Display Clock & Reset Controller on SC7180
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SC7180.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SC7180.
- See also dt-bindings/clock/qcom,dispcc-sc7180.h.
+ See also:: include/dt-bindings/clock/qcom,dispcc-sc7180.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
index c54172fbf29f..f297694ef8b8 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-lpasscorecc.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm LPASS Core Clock Controller Binding for SC7180
+title: Qualcomm LPASS Core Clock Controller on SC7180
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm LPASS core clock control module which supports the clocks and
- power domains on SC7180.
+ Qualcomm LPASS core clock control module provides the clocks and power
+ domains on SC7180.
- See also:
- - dt-bindings/clock/qcom,lpasscorecc-sc7180.h
+ See also:: include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml
index 970030986a86..1e856a8a996e 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml
@@ -4,16 +4,15 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7180-mss.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Modem Clock Controller Binding for SC7180
+title: Qualcomm Modem Clock Controller on SC7180
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm modem clock control module which supports the clocks on SC7180.
+ Qualcomm modem clock control module provides the clocks on SC7180.
- See also:
- - dt-bindings/clock/qcom,mss-sc7180.h
+ See also:: include/dt-bindings/clock/qcom,mss-sc7180.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
index f27ca6f03ffa..b60adbad4590 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7280-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Camera Clock & Reset Controller Binding for SC7280
+title: Qualcomm Camera Clock & Reset Controller on SC7280
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm camera clock control module which supports the clocks, resets and
+ Qualcomm camera clock control module provides the clocks, resets and
power domains on SC7280.
- See also dt-bindings/clock/qcom,camcc-sc7280.h
+ See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
index 2178666fb697..cfe6594a0a6b 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-dispcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7280-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for SC7280
+title: Qualcomm Display Clock & Reset Controller on SC7280
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SC7280.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SC7280.
- See also dt-bindings/clock/qcom,dispcc-sc7280.h.
+ See also:: include/dt-bindings/clock/qcom,dispcc-sc7280.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
index 633887dc2f8a..6151fdebbff8 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscc.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm LPASS Core Clock Controller Binding for SC7280
+title: Qualcomm LPASS Core Clock Controller on SC7280
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm LPASS core clock control module which supports the clocks and
- power domains on SC7280.
+ Qualcomm LPASS core clock control module provides the clocks and power
+ domains on SC7280.
- See also:
- - dt-bindings/clock/qcom,lpass-sc7280.h
+ See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
index f50e284e5f46..447cdc447a0c 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml
@@ -4,18 +4,18 @@
$id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm LPASS Core & Audio Clock Controller Binding for SC7280
+title: Qualcomm LPASS Core & Audio Clock Controller on SC7280
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm LPASS core and audio clock control module which supports the
- clocks and power domains on SC7280.
+ Qualcomm LPASS core and audio clock control module provides the clocks and
+ power domains on SC7280.
- See also:
- - dt-bindings/clock/qcom,lpasscorecc-sc7280.h
- - dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
+ See also::
+ include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h
+ include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h
properties:
clocks: true
diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml
index d4239ccae917..91d1f7918037 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sdm845-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Camera Clock & Reset Controller Binding for SDM845
+title: Qualcomm Camera Clock & Reset Controller on SDM845
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description: |
- Qualcomm camera clock control module which supports the clocks, resets and
- power domains on SDM845.
+ Qualcomm camera clock control module provides the clocks, resets and power
+ domains on SDM845.
- See also dt-bindings/clock/qcom,camcc-sm845.h
+ See also:: include/dt-bindings/clock/qcom,camcc-sm845.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
index 4a3be733d042..76b53ce64e40 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sdm845-dispcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sdm845-dispcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Display Clock & Reset Controller Binding for SDM845
+title: Qualcomm Display Clock & Reset Controller on SDM845
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SDM845.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SDM845.
- See also dt-bindings/clock/qcom,dispcc-sdm845.h.
+ See also:: include/dt-bindings/clock/qcom,dispcc-sdm845.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml
index 6660ff16ad1b..f802a2e7f818 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-dispcc.yaml
@@ -10,11 +10,10 @@ maintainers:
- Bjorn Andersson <andersson@kernel.org>
description: |
- Qualcomm display clock control module which supports the clocks and
- power domains on SM6115.
+ Qualcomm display clock control module provides the clocks and power domains
+ on SM6115.
- See also:
- include/dt-bindings/clock/qcom,sm6115-dispcc.h
+ See also:: include/dt-bindings/clock/qcom,sm6115-dispcc.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml
index 3c573e1a1257..295d4bb1a966 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml
@@ -4,17 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sm6375-gcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Global Clock & Reset Controller Binding for SM6375
+title: Qualcomm Global Clock & Reset Controller on SM6375
maintainers:
- Konrad Dybcio <konrad.dybcio@somainline.org>
description: |
- Qualcomm global clock control module which supports the clocks, resets and
- power domains on SM6375
+ Qualcomm global clock control module provides the clocks, resets and power
+ domains on SM6375
- See also:
- - dt-bindings/clock/qcom,sm6375-gcc.h
+ See also:: include/dt-bindings/clock/qcom,sm6375-gcc.h
allOf:
- $ref: qcom,gcc.yaml#
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
index 268f4c6ae0ee..a52a83fe2831 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml
@@ -4,16 +4,16 @@
$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Camera Clock & Reset Controller Binding for SM8450
+title: Qualcomm Camera Clock & Reset Controller on SM8450
maintainers:
- Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
description: |
- Qualcomm camera clock control module which supports the clocks, resets and
- power domains on SM8450.
+ Qualcomm camera clock control module provides the clocks, resets and power
+ domains on SM8450.
- See also include/dt-bindings/clock/qcom,sm8450-camcc.h
+ See also:: include/dt-bindings/clock/qcom,sm8450-camcc.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml
index 1cc2457f8208..1dd1f696dcd3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sm8450-dispcc.yaml
@@ -10,11 +10,10 @@ maintainers:
- Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
description: |
- Qualcomm display clock control module which supports the clocks, resets and
- power domains on SM8450.
+ Qualcomm display clock control module provides the clocks, resets and power
+ domains on SM8450.
- See also:
- include/dt-bindings/clock/qcom,sm8450-dispcc.h
+ See also:: include/dt-bindings/clock/qcom,sm8450-dispcc.h
properties:
compatible:
diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
index 3cdbcebdc1a1..e221985e743f 100644
--- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml
@@ -4,21 +4,21 @@
$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Qualcomm Video Clock & Reset Controller Binding
+title: Qualcomm Video Clock & Reset Controller
maintainers:
- Taniya Das <tdas@codeaurora.org>
description: |
- Qualcomm video clock control module which supports the clocks, resets and
- power domains on Qualcomm SoCs.
-
- See also:
- dt-bindings/clock/qcom,videocc-sc7180.h
- dt-bindings/clock/qcom,videocc-sc7280.h
- dt-bindings/clock/qcom,videocc-sdm845.h
- dt-bindings/clock/qcom,videocc-sm8150.h
- dt-bindings/clock/qcom,videocc-sm8250.h
+ Qualcomm video clock control module provides the clocks, resets and power
+ domains on Qualcomm SoCs.
+
+ See also::
+ include/dt-bindings/clock/qcom,videocc-sc7180.h
+ include/dt-bindings/clock/qcom,videocc-sc7280.h
+ include/dt-bindings/clock/qcom,videocc-sdm845.h
+ include/dt-bindings/clock/qcom,videocc-sm8150.h
+ include/dt-bindings/clock/qcom,videocc-sm8250.h
properties:
compatible:
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] dt-bindings: clock: qcom: cleanup
2022-10-28 14:03 ` [PATCH 2/2] dt-bindings: clock: qcom: cleanup Krzysztof Kozlowski
@ 2022-10-28 14:14 ` Jeffrey Hugo
2022-10-31 19:01 ` Rob Herring
1 sibling, 0 replies; 10+ messages in thread
From: Jeffrey Hugo @ 2022-10-28 14:14 UTC (permalink / raw)
To: Krzysztof Kozlowski, Bjorn Andersson, Andy Gross, Konrad Dybcio,
Michael Turquette, Stephen Boyd, Rob Herring,
Krzysztof Kozlowski, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Lars Povlsen, Steen Hegelund,
Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Govind Singh, Loic Poulain, Vladimir Zapolskiy,
Dmitry Baryshkov, Oleksij Rempel, Horatiu Vultur,
Vladimir Oltean, Claudiu Manoil, Alexandre Belloni,
linux-arm-msm, linux-clk, devicetree, linux-kernel, netdev,
linux-arm-kernel, linux-renesas-soc
On 10/28/2022 8:03 AM, Krzysztof Kozlowski wrote:
> Clean the Qualcomm SoCs clock bindings:
> 1. Drop redundant "bindings" in title.
> 2. Correct language grammar "<independent clause without verb>, which
> supports" -> "provides".
> 3. Use full path to the bindings header, so tools can validate it.
> 4. Drop quotes where not needed.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
For 8998 bits -
Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
For MMCC bit -
Acked-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports
2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
@ 2022-10-30 17:04 ` Oleksij Rempel
2022-10-31 18:57 ` Rob Herring
1 sibling, 0 replies; 10+ messages in thread
From: Oleksij Rempel @ 2022-10-30 17:04 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Rob Herring, Krzysztof Kozlowski, David S. Miller,
Eric Dumazet, Jakub Kicinski, Paolo Abeni, Lars Povlsen,
Steen Hegelund, Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
On Fri, Oct 28, 2022 at 10:03:25AM -0400, Krzysztof Kozlowski wrote:
> 'reg' without any constraints allows multiple items which is not the
> intention for Ethernet controller's port number.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
For asix,ax88178.yaml and microchip,lan95xx.yaml
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
>
> ---
>
> Please give it a time for Rob's bot to process this.
> ---
> Documentation/devicetree/bindings/net/asix,ax88178.yaml | 4 +++-
> Documentation/devicetree/bindings/net/microchip,lan95xx.yaml | 4 +++-
> .../devicetree/bindings/net/microchip,lan966x-switch.yaml | 4 ++--
> .../devicetree/bindings/net/microchip,sparx5-switch.yaml | 3 ++-
> .../devicetree/bindings/net/mscc,vsc7514-switch.yaml | 3 ++-
> .../bindings/net/renesas,r8a779f0-ether-switch.yaml | 4 ++--
> 6 files changed, 14 insertions(+), 8 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/asix,ax88178.yaml b/Documentation/devicetree/bindings/net/asix,ax88178.yaml
> index 1af52358de4c..a81dbc4792f6 100644
> --- a/Documentation/devicetree/bindings/net/asix,ax88178.yaml
> +++ b/Documentation/devicetree/bindings/net/asix,ax88178.yaml
> @@ -27,7 +27,9 @@ properties:
> - usbb95,772b # ASIX AX88772B
> - usbb95,7e2b # ASIX AX88772B
>
> - reg: true
> + reg:
> + maxItems: 1
> +
> local-mac-address: true
> mac-address: true
>
> diff --git a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
> index cf91fecd8909..3715c5f8f0e0 100644
> --- a/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
> +++ b/Documentation/devicetree/bindings/net/microchip,lan95xx.yaml
> @@ -39,7 +39,9 @@ properties:
> - usb424,9e08 # SMSC LAN89530 USB Ethernet Device
> - usb424,ec00 # SMSC9512/9514 USB Hub & Ethernet Device
>
> - reg: true
> + reg:
> + maxItems: 1
> +
> local-mac-address: true
> mac-address: true
>
> diff --git a/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml b/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
> index dc116f14750e..583d70c51be6 100644
> --- a/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
> +++ b/Documentation/devicetree/bindings/net/microchip,lan966x-switch.yaml
> @@ -83,8 +83,8 @@ properties:
> const: 0
>
> reg:
> - description:
> - Switch port number
> + items:
> + - description: Switch port number
>
> phys:
> description:
> diff --git a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
> index 57ffeb8fc876..ccb912561446 100644
> --- a/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
> +++ b/Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
> @@ -89,7 +89,8 @@ properties:
>
> properties:
> reg:
> - description: Switch port number
> + items:
> + - description: Switch port number
>
> phys:
> maxItems: 1
> diff --git a/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml b/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
> index ee0a504bdb24..1cf82955d75e 100644
> --- a/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
> +++ b/Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml
> @@ -109,7 +109,8 @@ properties:
>
> properties:
> reg:
> - description: Switch port number
> + items:
> + - description: Switch port number
>
> phy-handle: true
>
> diff --git a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
> index 581fff8902f4..0eba66a29c6c 100644
> --- a/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
> +++ b/Documentation/devicetree/bindings/net/renesas,r8a779f0-ether-switch.yaml
> @@ -106,8 +106,8 @@ properties:
>
> properties:
> reg:
> - description:
> - Port number of ETHA (TSNA).
> + items:
> + - description: Port number of ETHA (TSNA).
>
> phys:
> maxItems: 1
> --
> 2.34.1
>
>
--
Pengutronix e.K. | |
Steuerwalder Str. 21 | http://www.pengutronix.de/ |
31137 Hildesheim, Germany | Phone: +49-5121-206917-0 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema
2022-10-28 14:03 [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema Krzysztof Kozlowski
2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
2022-10-28 14:03 ` [PATCH 2/2] dt-bindings: clock: qcom: cleanup Krzysztof Kozlowski
@ 2022-10-31 18:51 ` Rob Herring
[not found] ` <20221101194805.9EE0EC433C1@smtp.kernel.org>
3 siblings, 0 replies; 10+ messages in thread
From: Rob Herring @ 2022-10-31 18:51 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Daniel Machon, David S. Miller, Srinivas Kandagatla, Robert Foss,
devicetree, Rob Herring, linux-renesas-soc, Vladimir Zapolskiy,
Krzysztof Kozlowski, Del Regno, linux-arm-msm, Stephan Gerhold,
Iskren Chernev, Oleksij Rempel, Manivannan Sadhasivam,
Alexandre Belloni, Michael Turquette, Shawn Guo, Loic Poulain,
Steen Hegelund, Eric Dumazet, Konrad Dybcio, Taniya Das,
Bjorn Andersson, Jeffrey Hugo, Martin Botka, Paolo Abeni,
Lars Povlsen, UNGLinuxDriver, Jonathan Marek, Sergey Shtylyov,
Christian Marangi, Andy Gross, Dmitry Baryshkov, linux-kernel,
Vladimir Oltean, Horatiu Vultur, Jakub Kicinski, Claudiu Manoil,
Stephen Boyd, netdev, linux-arm-kernel, linux-clk, krishna Lanka,
Govind Singh, Vinod Koul
On Fri, 28 Oct 2022 10:03:24 -0400, Krzysztof Kozlowski wrote:
> Reference common Qualcomm GCC schema to remove common pieces.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../bindings/clock/qcom,gcc-ipq8074.yaml | 25 +++----------------
> 1 file changed, 4 insertions(+), 21 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports
2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
2022-10-30 17:04 ` Oleksij Rempel
@ 2022-10-31 18:57 ` Rob Herring
2022-11-02 15:48 ` Krzysztof Kozlowski
1 sibling, 1 reply; 10+ messages in thread
From: Rob Herring @ 2022-10-31 18:57 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Krzysztof Kozlowski, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Lars Povlsen, Steen Hegelund,
Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
On Fri, Oct 28, 2022 at 10:03:25AM -0400, Krzysztof Kozlowski wrote:
> 'reg' without any constraints allows multiple items which is not the
> intention for Ethernet controller's port number.
>
Shouldn't this constrained by dsa-port.yaml (or the under review
ethernet switch schemas that split out the DSA parts)?
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Please give it a time for Rob's bot to process this.
> ---
> Documentation/devicetree/bindings/net/asix,ax88178.yaml | 4 +++-
> Documentation/devicetree/bindings/net/microchip,lan95xx.yaml | 4 +++-
> .../devicetree/bindings/net/microchip,lan966x-switch.yaml | 4 ++--
> .../devicetree/bindings/net/microchip,sparx5-switch.yaml | 3 ++-
> .../devicetree/bindings/net/mscc,vsc7514-switch.yaml | 3 ++-
> .../bindings/net/renesas,r8a779f0-ether-switch.yaml | 4 ++--
> 6 files changed, 14 insertions(+), 8 deletions(-)
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 2/2] dt-bindings: clock: qcom: cleanup
2022-10-28 14:03 ` [PATCH 2/2] dt-bindings: clock: qcom: cleanup Krzysztof Kozlowski
2022-10-28 14:14 ` Jeffrey Hugo
@ 2022-10-31 19:01 ` Rob Herring
1 sibling, 0 replies; 10+ messages in thread
From: Rob Herring @ 2022-10-31 19:01 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Krzysztof Kozlowski, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Lars Povlsen, Steen Hegelund,
Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
On Fri, Oct 28, 2022 at 10:03:26AM -0400, Krzysztof Kozlowski wrote:
> Clean the Qualcomm SoCs clock bindings:
Perhaps at least 'Clean-up titles and descriptions' for the subject.
> 1. Drop redundant "bindings" in title.
> 2. Correct language grammar "<independent clause without verb>, which
> supports" -> "provides".
> 3. Use full path to the bindings header, so tools can validate it.
> 4. Drop quotes where not needed.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../bindings/clock/qcom,a53pll.yaml | 2 +-
> .../devicetree/bindings/clock/qcom,a7pll.yaml | 2 +-
> .../bindings/clock/qcom,aoncc-sm8250.yaml | 2 +-
> .../bindings/clock/qcom,audiocc-sm8250.yaml | 2 +-
> .../bindings/clock/qcom,camcc-sm8250.yaml | 6 ++--
> .../bindings/clock/qcom,dispcc-sm6125.yaml | 9 +++---
> .../bindings/clock/qcom,dispcc-sm6350.yaml | 8 ++---
> .../bindings/clock/qcom,dispcc-sm8x50.yaml | 14 ++++-----
> .../bindings/clock/qcom,gcc-apq8064.yaml | 18 +++++------
> .../bindings/clock/qcom,gcc-apq8084.yaml | 10 +++----
> .../bindings/clock/qcom,gcc-ipq8064.yaml | 18 +++++------
> .../bindings/clock/qcom,gcc-ipq8074.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-msm8660.yaml | 12 ++++----
> .../bindings/clock/qcom,gcc-msm8909.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-msm8916.yaml | 16 +++++-----
> .../bindings/clock/qcom,gcc-msm8976.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-msm8994.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-msm8996.yaml | 7 ++---
> .../bindings/clock/qcom,gcc-msm8998.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-other.yaml | 30 +++++++++----------
> .../bindings/clock/qcom,gcc-qcm2290.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-qcs404.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sc7180.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sc7280.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sc8180x.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sc8280xp.yaml | 7 ++---
> .../bindings/clock/qcom,gcc-sdm660.yaml | 8 ++---
> .../bindings/clock/qcom,gcc-sdm845.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sdx55.yaml | 7 ++---
> .../bindings/clock/qcom,gcc-sdx65.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm6115.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm6125.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm6350.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm8150.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm8250.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm8350.yaml | 9 +++---
> .../bindings/clock/qcom,gcc-sm8450.yaml | 9 +++---
> .../devicetree/bindings/clock/qcom,gcc.yaml | 6 ++--
> .../bindings/clock/qcom,gpucc-sdm660.yaml | 4 +--
> .../bindings/clock/qcom,gpucc-sm8350.yaml | 9 +++---
> .../devicetree/bindings/clock/qcom,gpucc.yaml | 22 +++++++-------
> .../devicetree/bindings/clock/qcom,mmcc.yaml | 4 +--
> .../bindings/clock/qcom,msm8998-gpucc.yaml | 8 ++---
> .../bindings/clock/qcom,q6sstopcc.yaml | 2 +-
> .../bindings/clock/qcom,qcm2290-dispcc.yaml | 8 ++---
> .../bindings/clock/qcom,sc7180-camcc.yaml | 9 +++---
> .../bindings/clock/qcom,sc7180-dispcc.yaml | 8 ++---
> .../clock/qcom,sc7180-lpasscorecc.yaml | 9 +++---
> .../bindings/clock/qcom,sc7180-mss.yaml | 7 ++---
> .../bindings/clock/qcom,sc7280-camcc.yaml | 6 ++--
> .../bindings/clock/qcom,sc7280-dispcc.yaml | 8 ++---
> .../bindings/clock/qcom,sc7280-lpasscc.yaml | 9 +++---
> .../clock/qcom,sc7280-lpasscorecc.yaml | 12 ++++----
> .../bindings/clock/qcom,sdm845-camcc.yaml | 8 ++---
> .../bindings/clock/qcom,sdm845-dispcc.yaml | 8 ++---
> .../bindings/clock/qcom,sm6115-dispcc.yaml | 7 ++---
> .../bindings/clock/qcom,sm6375-gcc.yaml | 9 +++---
> .../bindings/clock/qcom,sm8450-camcc.yaml | 8 ++---
> .../bindings/clock/qcom,sm8450-dispcc.yaml | 7 ++---
> .../bindings/clock/qcom,videocc.yaml | 20 ++++++-------
> 60 files changed, 258 insertions(+), 289 deletions(-)
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports
2022-10-31 18:57 ` Rob Herring
@ 2022-11-02 15:48 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-02 15:48 UTC (permalink / raw)
To: Rob Herring
Cc: Bjorn Andersson, Andy Gross, Konrad Dybcio, Michael Turquette,
Stephen Boyd, Krzysztof Kozlowski, David S. Miller, Eric Dumazet,
Jakub Kicinski, Paolo Abeni, Lars Povlsen, Steen Hegelund,
Daniel Machon, UNGLinuxDriver, Sergey Shtylyov,
Manivannan Sadhasivam, Srinivas Kandagatla, Jonathan Marek,
Martin Botka, Taniya Das, Christian Marangi, Stephan Gerhold,
Shawn Guo, Vinod Koul, krishna Lanka, Iskren Chernev, Del Regno,
Robert Foss, Jeffrey Hugo, Govind Singh, Loic Poulain,
Vladimir Zapolskiy, Dmitry Baryshkov, Oleksij Rempel,
Horatiu Vultur, Vladimir Oltean, Claudiu Manoil,
Alexandre Belloni, linux-arm-msm, linux-clk, devicetree,
linux-kernel, netdev, linux-arm-kernel, linux-renesas-soc
On 31/10/2022 14:57, Rob Herring wrote:
> On Fri, Oct 28, 2022 at 10:03:25AM -0400, Krzysztof Kozlowski wrote:
>> 'reg' without any constraints allows multiple items which is not the
>> intention for Ethernet controller's port number.
>>
>
> Shouldn't this constrained by dsa-port.yaml (or the under review
> ethernet switch schemas that split out the DSA parts)?
dsa-port should indeed have such change (I'll send one), but these
schemas do not reference it.
They reference only ethernet-controller, which does not even mention
'reg' port. I'll describe it better in commit msg.
ethernet-switch is not yet referenced in the schemas changed here. It
would not be applicable to asix,ax88178.yaml and microchip,lan95xx.yaml.
To others - probably it would be applicable.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema
[not found] ` <20221101194805.9EE0EC433C1@smtp.kernel.org>
@ 2022-11-02 16:28 ` Krzysztof Kozlowski
0 siblings, 0 replies; 10+ messages in thread
From: Krzysztof Kozlowski @ 2022-11-02 16:28 UTC (permalink / raw)
To: Stephen Boyd, Alexandre Belloni, Andy Gross, Bjorn Andersson,
Christian Marangi, Claudiu Manoil, Daniel Machon,
David S. Miller, Del Regno, Dmitry Baryshkov, Eric Dumazet,
Govind Singh, Horatiu Vultur, Iskren Chernev, Jakub Kicinski,
Jeffrey Hugo, Jonathan Marek, Konrad Dybcio, Krzysztof Kozlowski,
Lars Povlsen, Loic Poulain, Manivannan Sadhasivam, Martin Botka,
Mic hael Turquette, Oleksij Rempel, Paolo Abeni, Rob Herring,
Robert Foss, Sergey Shtylyov, Shawn Guo, Srinivas Kandagatla,
Steen Hegelund, Stephan Gerhold, Taniya Das, UNGLinuxDriver,
Vinod Koul, Vladimir Oltean, Vladimir Zapolskiy, devicetree,
krishna Lanka, linux-arm-kernel, linux-arm-msm, linux-clk,
linux-kernel, linux-renesas-soc, netdev
On 01/11/2022 15:48, Stephen Boyd wrote:
> Quoting Krzysztof Kozlowski (2022-10-28 07:03:24)
>> Reference common Qualcomm GCC schema to remove common pieces.
>>
>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> ---
>
> Should I pick this up into clk tree? Or are you going to apply it to
> binding tree?
I'll send v2 with subject fix pointed out by Rob and then please pick
them up via clk.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-11-02 16:33 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
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2022-10-28 14:03 ` [PATCH] dt-bindings: net: constrain number of 'reg' in ethernet ports Krzysztof Kozlowski
2022-10-30 17:04 ` Oleksij Rempel
2022-10-31 18:57 ` Rob Herring
2022-11-02 15:48 ` Krzysztof Kozlowski
2022-10-28 14:03 ` [PATCH 2/2] dt-bindings: clock: qcom: cleanup Krzysztof Kozlowski
2022-10-28 14:14 ` Jeffrey Hugo
2022-10-31 19:01 ` Rob Herring
2022-10-31 18:51 ` [PATCH 1/2] dt-bindings: clock: qcom,gcc-ipq8074: use common GCC schema Rob Herring
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