* [PATCH v2 1/7] dt-bindings: cpufreq: cpufreq-qcom-hw: Add cpufreq clock provider
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 2/7] arm64: dts: qcom: sm8450: Supply clock from cpufreq node to CPUs Manivannan Sadhasivam
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam, Rob Herring
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. Document the same in the binding to reflect the actual
implementation.
CPUFreq HW will become the clock provider and CPU cores will become the
clock consumers.
The clock index for each CPU core is based on the frequency domain index.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
.../devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index cbba8979fe0e..2e0336163ffb 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -57,6 +57,9 @@ properties:
'#freq-domain-cells':
const: 1
+ '#clock-cells':
+ const: 1
+
required:
- compatible
- reg
@@ -84,6 +87,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_0>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ clocks = <&cpufreq_hw 0>;
L2_0: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -100,6 +104,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_100>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ clocks = <&cpufreq_hw 0>;
L2_100: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -113,6 +118,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_200>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ clocks = <&cpufreq_hw 0>;
L2_200: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -126,6 +132,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_300>;
qcom,freq-domain = <&cpufreq_hw 0>;
+ clocks = <&cpufreq_hw 0>;
L2_300: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -139,6 +146,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_400>;
qcom,freq-domain = <&cpufreq_hw 1>;
+ clocks = <&cpufreq_hw 1>;
L2_400: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -152,6 +160,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_500>;
qcom,freq-domain = <&cpufreq_hw 1>;
+ clocks = <&cpufreq_hw 1>;
L2_500: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -165,6 +174,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_600>;
qcom,freq-domain = <&cpufreq_hw 1>;
+ clocks = <&cpufreq_hw 1>;
L2_600: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -178,6 +188,7 @@ examples:
enable-method = "psci";
next-level-cache = <&L2_700>;
qcom,freq-domain = <&cpufreq_hw 1>;
+ clocks = <&cpufreq_hw 1>;
L2_700: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -198,6 +209,7 @@ examples:
clock-names = "xo", "alternate";
#freq-domain-cells = <1>;
+ #clock-cells = <1>;
};
};
...
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 2/7] arm64: dts: qcom: sm8450: Supply clock from cpufreq node to CPUs
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 1/7] dt-bindings: cpufreq: cpufreq-qcom-hw: Add cpufreq clock provider Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 3/7] cpufreq: qcom-hw: Remove un-necessary cpumask_empty() check Manivannan Sadhasivam
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. But this relationship is not represented in DTS so far.
So let's make cpufreq node as the clock provider and CPU nodes as the
consumers. The clock index for each CPU node is based on the frequency
domain index.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 6c18cfca9a34..8f26cf9aad01 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -52,6 +52,7 @@ CPU0: cpu@0 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 0>;
L2_0: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -71,6 +72,7 @@ CPU1: cpu@100 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 0>;
L2_100: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -87,6 +89,7 @@ CPU2: cpu@200 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 0>;
L2_200: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -103,6 +106,7 @@ CPU3: cpu@300 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 0>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 0>;
L2_300: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -119,6 +123,7 @@ CPU4: cpu@400 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 1>;
L2_400: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -135,6 +140,7 @@ CPU5: cpu@500 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 1>;
L2_500: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -152,6 +158,7 @@ CPU6: cpu@600 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 1>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 1>;
L2_600: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -168,6 +175,7 @@ CPU7: cpu@700 {
power-domain-names = "psci";
qcom,freq-domain = <&cpufreq_hw 2>;
#cooling-cells = <2>;
+ clocks = <&cpufreq_hw 2>;
L2_700: l2-cache {
compatible = "cache";
next-level-cache = <&L3_0>;
@@ -3804,6 +3812,7 @@ cpufreq_hw: cpufreq@17d91000 {
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
#freq-domain-cells = <1>;
+ #clock-cells = <1>;
};
gem_noc: interconnect@19100000 {
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 3/7] cpufreq: qcom-hw: Remove un-necessary cpumask_empty() check
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 1/7] dt-bindings: cpufreq: cpufreq-qcom-hw: Add cpufreq clock provider Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 2/7] arm64: dts: qcom: sm8450: Supply clock from cpufreq node to CPUs Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-11-02 6:50 ` Viresh Kumar
2022-10-25 7:32 ` [PATCH v2 4/7] cpufreq: qcom-hw: Allocate qcom_cpufreq_data during probe Manivannan Sadhasivam
` (3 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
CPUFreq core will always set the "policy->cpus" bitmask with the bitfield
of the CPU that goes first per domain/policy. So there is no way the
"policy->cpus" bitmask will be empty during qcom_cpufreq_hw_cpu_init().
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-hw.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index d5ef3c66c762..a5b3b8d0e164 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -552,11 +552,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
data->per_core_dcvs = true;
qcom_get_related_cpus(index, policy->cpus);
- if (cpumask_empty(policy->cpus)) {
- dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
- ret = -ENOENT;
- goto error;
- }
policy->driver_data = data;
policy->dvfs_possible_from_any_cpu = true;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 3/7] cpufreq: qcom-hw: Remove un-necessary cpumask_empty() check
2022-10-25 7:32 ` [PATCH v2 3/7] cpufreq: qcom-hw: Remove un-necessary cpumask_empty() check Manivannan Sadhasivam
@ 2022-11-02 6:50 ` Viresh Kumar
0 siblings, 0 replies; 11+ messages in thread
From: Viresh Kumar @ 2022-11-02 6:50 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: andersson, krzysztof.kozlowski+dt, rafael, robh+dt, johan,
devicetree, linux-arm-msm, linux-kernel, linux-pm
On 25-10-22, 13:02, Manivannan Sadhasivam wrote:
> CPUFreq core will always set the "policy->cpus" bitmask with the bitfield
> of the CPU that goes first per domain/policy. So there is no way the
> "policy->cpus" bitmask will be empty during qcom_cpufreq_hw_cpu_init().
>
> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
> ---
> drivers/cpufreq/qcom-cpufreq-hw.c | 5 -----
> 1 file changed, 5 deletions(-)
>
> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
> index d5ef3c66c762..a5b3b8d0e164 100644
> --- a/drivers/cpufreq/qcom-cpufreq-hw.c
> +++ b/drivers/cpufreq/qcom-cpufreq-hw.c
> @@ -552,11 +552,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
> data->per_core_dcvs = true;
>
> qcom_get_related_cpus(index, policy->cpus);
> - if (cpumask_empty(policy->cpus)) {
> - dev_err(dev, "Domain-%d failed to get related CPUs\n", index);
> - ret = -ENOENT;
> - goto error;
> - }
>
> policy->driver_data = data;
> policy->dvfs_possible_from_any_cpu = true;
Applied. Thanks.
I tried applying 4-6 as well, but git am failed. You can send such
cleanups separately, so they don't need to wait for others to reviews.
--
viresh
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 4/7] cpufreq: qcom-hw: Allocate qcom_cpufreq_data during probe
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
` (2 preceding siblings ...)
2022-10-25 7:32 ` [PATCH v2 3/7] cpufreq: qcom-hw: Remove un-necessary cpumask_empty() check Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 5/7] cpufreq: qcom-hw: Use cached dev pointer in probe() Manivannan Sadhasivam
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
qcom_cpufreq_data is allocated based on the number of frequency domains
defined in DT which is static and won't change during runtime. There is
no real reason to allocate it during the CPU init() callback and deallocate
it during exit(). Hence, move the allocation to probe() and use the
allocated memory during init().
This also allows us to use devm_platform_get_and_ioremap_resource() helper
for acquiring the freq-domain resources from DT.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-hw.c | 86 +++++++++++++------------------
1 file changed, 37 insertions(+), 49 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index a5b3b8d0e164..1842e9facaa1 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -58,6 +58,10 @@ struct qcom_cpufreq_data {
bool per_core_dcvs;
};
+static struct {
+ struct qcom_cpufreq_data *data;
+} qcom_cpufreq;
+
static unsigned long cpu_hw_rate, xo_rate;
static bool icc_scaling_enabled;
@@ -489,8 +493,6 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
struct of_phandle_args args;
struct device_node *cpu_np;
struct device *cpu_dev;
- struct resource *res;
- void __iomem *base;
struct qcom_cpufreq_data *data;
int ret, index;
@@ -512,43 +514,16 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
return ret;
index = args.args[0];
-
- res = platform_get_resource(pdev, IORESOURCE_MEM, index);
- if (!res) {
- dev_err(dev, "failed to get mem resource %d\n", index);
- return -ENODEV;
- }
-
- if (!request_mem_region(res->start, resource_size(res), res->name)) {
- dev_err(dev, "failed to request resource %pR\n", res);
- return -EBUSY;
- }
-
- base = ioremap(res->start, resource_size(res));
- if (!base) {
- dev_err(dev, "failed to map resource %pR\n", res);
- ret = -ENOMEM;
- goto release_region;
- }
-
- data = kzalloc(sizeof(*data), GFP_KERNEL);
- if (!data) {
- ret = -ENOMEM;
- goto unmap_base;
- }
-
data->soc_data = of_device_get_match_data(&pdev->dev);
- data->base = base;
- data->res = res;
+ data = &qcom_cpufreq.data[index];
/* HW should be in enabled state to proceed */
- if (!(readl_relaxed(base + data->soc_data->reg_enable) & 0x1)) {
+ if (!(readl_relaxed(data->base + data->soc_data->reg_enable) & 0x1)) {
dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
- ret = -ENODEV;
- goto error;
+ return -ENODEV;
}
- if (readl_relaxed(base + data->soc_data->reg_dcvs_ctrl) & 0x1)
+ if (readl_relaxed(data->base + data->soc_data->reg_dcvs_ctrl) & 0x1)
data->per_core_dcvs = true;
qcom_get_related_cpus(index, policy->cpus);
@@ -559,14 +534,13 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
ret = qcom_cpufreq_hw_read_lut(cpu_dev, policy);
if (ret) {
dev_err(dev, "Domain-%d failed to read LUT\n", index);
- goto error;
+ return ret;
}
ret = dev_pm_opp_get_opp_count(cpu_dev);
if (ret <= 0) {
dev_err(cpu_dev, "Failed to add OPPs\n");
- ret = -ENODEV;
- goto error;
+ return -ENODEV;
}
if (policy_has_boost_freq(policy)) {
@@ -575,18 +549,7 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
dev_warn(cpu_dev, "failed to enable boost: %d\n", ret);
}
- ret = qcom_cpufreq_hw_lmh_init(policy, index);
- if (ret)
- goto error;
-
- return 0;
-error:
- kfree(data);
-unmap_base:
- iounmap(base);
-release_region:
- release_mem_region(res->start, resource_size(res));
- return ret;
+ return qcom_cpufreq_hw_lmh_init(policy, index);
}
static int qcom_cpufreq_hw_cpu_exit(struct cpufreq_policy *policy)
@@ -643,7 +606,7 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
{
struct device *cpu_dev;
struct clk *clk;
- int ret;
+ int ret, i, num_domains;
clk = clk_get(&pdev->dev, "xo");
if (IS_ERR(clk))
@@ -670,6 +633,31 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
if (ret)
return ret;
+ /* Allocate qcom_cpufreq_data based on the available frequency domains in DT */
+ num_domains = of_property_count_elems_of_size(pdev->dev.of_node, "reg", sizeof(u32) * 4);
+ if (num_domains <= 0)
+ return num_domains;
+
+ qcom_cpufreq.data = devm_kzalloc(&pdev->dev, sizeof(struct qcom_cpufreq_data) * num_domains,
+ GFP_KERNEL);
+ if (!qcom_cpufreq.data)
+ return -ENOMEM;
+
+ for (i = 0; i < num_domains; i++) {
+ struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i];
+ struct resource *res;
+ void __iomem *base;
+
+ base = devm_platform_get_and_ioremap_resource(pdev, i, &res);
+ if (IS_ERR(base)) {
+ dev_err(&pdev->dev, "Failed to map resource %pR\n", res);
+ return PTR_ERR(base);
+ }
+
+ data->base = base;
+ data->res = res;
+ }
+
ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
if (ret)
dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 5/7] cpufreq: qcom-hw: Use cached dev pointer in probe()
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
` (3 preceding siblings ...)
2022-10-25 7:32 ` [PATCH v2 4/7] cpufreq: qcom-hw: Allocate qcom_cpufreq_data during probe Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 6/7] cpufreq: qcom-hw: Move soc_data to struct qcom_cpufreq Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support Manivannan Sadhasivam
6 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
There are multiple instances of dev pointer used in the probe() function.
Instead of referencing pdev->dev all the time, let's use a cached dev
pointer to simplify the code.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-hw.c | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index 1842e9facaa1..bc991ef10c05 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -604,18 +604,19 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = {
static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
{
+ struct device *dev = &pdev->dev;
struct device *cpu_dev;
struct clk *clk;
int ret, i, num_domains;
- clk = clk_get(&pdev->dev, "xo");
+ clk = clk_get(dev, "xo");
if (IS_ERR(clk))
return PTR_ERR(clk);
xo_rate = clk_get_rate(clk);
clk_put(clk);
- clk = clk_get(&pdev->dev, "alternate");
+ clk = clk_get(dev, "alternate");
if (IS_ERR(clk))
return PTR_ERR(clk);
@@ -634,11 +635,11 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
return ret;
/* Allocate qcom_cpufreq_data based on the available frequency domains in DT */
- num_domains = of_property_count_elems_of_size(pdev->dev.of_node, "reg", sizeof(u32) * 4);
+ num_domains = of_property_count_elems_of_size(dev->of_node, "reg", sizeof(u32) * 4);
if (num_domains <= 0)
return num_domains;
- qcom_cpufreq.data = devm_kzalloc(&pdev->dev, sizeof(struct qcom_cpufreq_data) * num_domains,
+ qcom_cpufreq.data = devm_kzalloc(dev, sizeof(struct qcom_cpufreq_data) * num_domains,
GFP_KERNEL);
if (!qcom_cpufreq.data)
return -ENOMEM;
@@ -650,7 +651,7 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
base = devm_platform_get_and_ioremap_resource(pdev, i, &res);
if (IS_ERR(base)) {
- dev_err(&pdev->dev, "Failed to map resource %pR\n", res);
+ dev_err(dev, "Failed to map resource %pR\n", res);
return PTR_ERR(base);
}
@@ -660,9 +661,9 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
if (ret)
- dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");
+ dev_err(dev, "CPUFreq HW driver failed to register\n");
else
- dev_dbg(&pdev->dev, "QCOM CPUFreq HW driver initialized\n");
+ dev_dbg(dev, "QCOM CPUFreq HW driver initialized\n");
return ret;
}
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 6/7] cpufreq: qcom-hw: Move soc_data to struct qcom_cpufreq
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
` (4 preceding siblings ...)
2022-10-25 7:32 ` [PATCH v2 5/7] cpufreq: qcom-hw: Use cached dev pointer in probe() Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-10-25 7:32 ` [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support Manivannan Sadhasivam
6 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
soc_data is a static info of the driver and thus no need to cache it inside
the qcom_cpufreq_data struct which is allocated per frequency domain. So,
move it inside qcom_cpufreq struct.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-hw.c | 27 ++++++++++++++-------------
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index bc991ef10c05..76f840636828 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -42,7 +42,6 @@ struct qcom_cpufreq_soc_data {
struct qcom_cpufreq_data {
void __iomem *base;
struct resource *res;
- const struct qcom_cpufreq_soc_data *soc_data;
/*
* Mutex to synchronize between de-init sequence and re-starting LMh
@@ -60,6 +59,7 @@ struct qcom_cpufreq_data {
static struct {
struct qcom_cpufreq_data *data;
+ const struct qcom_cpufreq_soc_data *soc_data;
} qcom_cpufreq;
static unsigned long cpu_hw_rate, xo_rate;
@@ -110,7 +110,7 @@ static int qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy,
unsigned int index)
{
struct qcom_cpufreq_data *data = policy->driver_data;
- const struct qcom_cpufreq_soc_data *soc_data = data->soc_data;
+ const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
unsigned long freq = policy->freq_table[index].frequency;
unsigned int i;
@@ -138,7 +138,7 @@ static unsigned int qcom_cpufreq_hw_get(unsigned int cpu)
return 0;
data = policy->driver_data;
- soc_data = data->soc_data;
+ soc_data = qcom_cpufreq.soc_data;
index = readl_relaxed(data->base + soc_data->reg_perf_state);
index = min(index, LUT_MAX_ENTRIES - 1);
@@ -150,7 +150,7 @@ static unsigned int qcom_cpufreq_hw_fast_switch(struct cpufreq_policy *policy,
unsigned int target_freq)
{
struct qcom_cpufreq_data *data = policy->driver_data;
- const struct qcom_cpufreq_soc_data *soc_data = data->soc_data;
+ const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
unsigned int index;
unsigned int i;
@@ -174,7 +174,7 @@ static int qcom_cpufreq_hw_read_lut(struct device *cpu_dev,
unsigned long rate;
int ret;
struct qcom_cpufreq_data *drv_data = policy->driver_data;
- const struct qcom_cpufreq_soc_data *soc_data = drv_data->soc_data;
+ const struct qcom_cpufreq_soc_data *soc_data = qcom_cpufreq.soc_data;
table = kcalloc(LUT_MAX_ENTRIES + 1, sizeof(*table), GFP_KERNEL);
if (!table)
@@ -291,10 +291,10 @@ static unsigned long qcom_lmh_get_throttle_freq(struct qcom_cpufreq_data *data)
{
unsigned int lval;
- if (data->soc_data->reg_current_vote)
- lval = readl_relaxed(data->base + data->soc_data->reg_current_vote) & 0x3ff;
+ if (qcom_cpufreq.soc_data->reg_current_vote)
+ lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_current_vote) & 0x3ff;
else
- lval = readl_relaxed(data->base + data->soc_data->reg_domain_state) & 0xff;
+ lval = readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_domain_state) & 0xff;
return lval * xo_rate;
}
@@ -366,9 +366,9 @@ static irqreturn_t qcom_lmh_dcvs_handle_irq(int irq, void *data)
disable_irq_nosync(c_data->throttle_irq);
schedule_delayed_work(&c_data->throttle_work, 0);
- if (c_data->soc_data->reg_intr_clr)
+ if (qcom_cpufreq.soc_data->reg_intr_clr)
writel_relaxed(GT_IRQ_STATUS,
- c_data->base + c_data->soc_data->reg_intr_clr);
+ c_data->base + qcom_cpufreq.soc_data->reg_intr_clr);
return IRQ_HANDLED;
}
@@ -514,16 +514,15 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
return ret;
index = args.args[0];
- data->soc_data = of_device_get_match_data(&pdev->dev);
data = &qcom_cpufreq.data[index];
/* HW should be in enabled state to proceed */
- if (!(readl_relaxed(data->base + data->soc_data->reg_enable) & 0x1)) {
+ if (!(readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_enable) & 0x1)) {
dev_err(dev, "Domain-%d cpufreq hardware not enabled\n", index);
return -ENODEV;
}
- if (readl_relaxed(data->base + data->soc_data->reg_dcvs_ctrl) & 0x1)
+ if (readl_relaxed(data->base + qcom_cpufreq.soc_data->reg_dcvs_ctrl) & 0x1)
data->per_core_dcvs = true;
qcom_get_related_cpus(index, policy->cpus);
@@ -644,6 +643,8 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
if (!qcom_cpufreq.data)
return -ENOMEM;
+ qcom_cpufreq.soc_data = of_device_get_match_data(dev);
+
for (i = 0; i < num_domains; i++) {
struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i];
struct resource *res;
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support
2022-10-25 7:32 [PATCH v2 0/7] qcom-cpufreq-hw: Add CPU clock provider support Manivannan Sadhasivam
` (5 preceding siblings ...)
2022-10-25 7:32 ` [PATCH v2 6/7] cpufreq: qcom-hw: Move soc_data to struct qcom_cpufreq Manivannan Sadhasivam
@ 2022-10-25 7:32 ` Manivannan Sadhasivam
2022-11-02 4:28 ` Viresh Kumar
6 siblings, 1 reply; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-10-25 7:32 UTC (permalink / raw)
To: andersson, viresh.kumar, krzysztof.kozlowski+dt, rafael, robh+dt
Cc: johan, devicetree, linux-arm-msm, linux-kernel, linux-pm,
Manivannan Sadhasivam
Qcom CPUFreq hardware (EPSS/OSM) controls clock and voltage to the CPU
cores. But this relationship is not represented with the clk framework
so far.
So, let's make the qcom-cpufreq-hw driver a clock provider. This makes the
clock producer/consumer relationship cleaner and is also useful for CPU
related frameworks like OPP to know the frequency at which the CPUs are
running.
The clock frequency provided by the driver is for each frequency domain.
We cannot get the frequency of each CPU core because, not all platforms
support per-core DCVS feature.
Also the frequency supplied by the driver is the actual frequency that
comes out of the EPSS/OSM block after the DCVS operation. This frequency is
not same as what the CPUFreq framework has set but it is the one that gets
supplied to the CPUs after throttling by LMh.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
drivers/cpufreq/qcom-cpufreq-hw.c | 43 +++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c
index 76f840636828..66677db3e267 100644
--- a/drivers/cpufreq/qcom-cpufreq-hw.c
+++ b/drivers/cpufreq/qcom-cpufreq-hw.c
@@ -4,6 +4,7 @@
*/
#include <linux/bitfield.h>
+#include <linux/clk-provider.h>
#include <linux/cpufreq.h>
#include <linux/init.h>
#include <linux/interconnect.h>
@@ -53,6 +54,7 @@ struct qcom_cpufreq_data {
bool cancel_throttle;
struct delayed_work throttle_work;
struct cpufreq_policy *policy;
+ struct clk_hw cpu_clk;
bool per_core_dcvs;
};
@@ -601,8 +603,20 @@ static struct cpufreq_driver cpufreq_qcom_hw_driver = {
.ready = qcom_cpufreq_ready,
};
+static unsigned long qcom_cpufreq_hw_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
+{
+ struct qcom_cpufreq_data *data = container_of(hw, struct qcom_cpufreq_data, cpu_clk);
+
+ return qcom_lmh_get_throttle_freq(data) / HZ_PER_KHZ;
+}
+
+static const struct clk_ops qcom_cpufreq_hw_clk_ops = {
+ .recalc_rate = qcom_cpufreq_hw_recalc_rate,
+};
+
static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
{
+ struct clk_hw_onecell_data *clk_data;
struct device *dev = &pdev->dev;
struct device *cpu_dev;
struct clk *clk;
@@ -645,8 +659,16 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
qcom_cpufreq.soc_data = of_device_get_match_data(dev);
+ clk_data = devm_kzalloc(dev, struct_size(clk_data, hws, num_domains), GFP_KERNEL);
+ if (!clk_data)
+ return -ENOMEM;
+
+ clk_data->num = num_domains;
+
for (i = 0; i < num_domains; i++) {
struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i];
+ static struct clk_init_data init = {};
+ const char *clk_name;
struct resource *res;
void __iomem *base;
@@ -658,6 +680,27 @@ static int qcom_cpufreq_hw_driver_probe(struct platform_device *pdev)
data->base = base;
data->res = res;
+
+ /* Register CPU clock for each frequency domain */
+ clk_name = devm_kasprintf(dev, GFP_KERNEL, "qcom_cpufreq%d", i);
+ init.name = clk_name;
+ init.flags = CLK_GET_RATE_NOCACHE;
+ init.ops = &qcom_cpufreq_hw_clk_ops;
+ data->cpu_clk.init = &init;
+
+ ret = devm_clk_hw_register(dev, &data->cpu_clk);
+ if (ret < 0) {
+ dev_err(dev, "Failed to register Qcom CPUFreq clock\n");
+ return ret;
+ }
+
+ clk_data->hws[i] = &data->cpu_clk;
+ }
+
+ ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, clk_data);
+ if (ret < 0) {
+ dev_err(dev, "Failed to add Qcom CPUFreq clock provider\n");
+ return ret;
}
ret = cpufreq_register_driver(&cpufreq_qcom_hw_driver);
--
2.25.1
^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support
2022-10-25 7:32 ` [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support Manivannan Sadhasivam
@ 2022-11-02 4:28 ` Viresh Kumar
2022-11-02 6:54 ` Manivannan Sadhasivam
0 siblings, 1 reply; 11+ messages in thread
From: Viresh Kumar @ 2022-11-02 4:28 UTC (permalink / raw)
To: Manivannan Sadhasivam
Cc: andersson, krzysztof.kozlowski+dt, rafael, robh+dt, johan,
devicetree, linux-arm-msm, linux-kernel, linux-pm
On 25-10-22, 13:02, Manivannan Sadhasivam wrote:
> for (i = 0; i < num_domains; i++) {
> struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i];
> + static struct clk_init_data init = {};
Why not make this part of a driver level structure instead of static ?
And what will {} do ? Initialize to 0 ? static would have already done
that.
--
viresh
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 7/7] cpufreq: qcom-hw: Add CPU clock provider support
2022-11-02 4:28 ` Viresh Kumar
@ 2022-11-02 6:54 ` Manivannan Sadhasivam
0 siblings, 0 replies; 11+ messages in thread
From: Manivannan Sadhasivam @ 2022-11-02 6:54 UTC (permalink / raw)
To: Viresh Kumar
Cc: andersson, krzysztof.kozlowski+dt, rafael, robh+dt, johan,
devicetree, linux-arm-msm, linux-kernel, linux-pm
On Wed, Nov 02, 2022 at 09:58:49AM +0530, Viresh Kumar wrote:
> On 25-10-22, 13:02, Manivannan Sadhasivam wrote:
> > for (i = 0; i < num_domains; i++) {
> > struct qcom_cpufreq_data *data = &qcom_cpufreq.data[i];
> > + static struct clk_init_data init = {};
>
> Why not make this part of a driver level structure instead of static ?
> And what will {} do ? Initialize to 0 ? static would have already done
> that.
>
Good catch! "static" is not needed here.
Thanks,
Mani
> --
> viresh
--
மணிவண்ணன் சதாசிவம்
^ permalink raw reply [flat|nested] 11+ messages in thread