* [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table
@ 2022-11-03 21:21 Christian Marangi
2022-11-03 21:21 ` [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table Christian Marangi
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Christian Marangi @ 2022-11-03 21:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Vinod Koul, Kishon Vijay Abraham I,
Dmitry Baryshkov, linux-arm-msm, devicetree, linux-kernel,
linux-phy
Cc: Christian Marangi, Robert Marko
Commit af6643242d3a ("phy: qcom-qmp-pcie: split pcs_misc region for ipq6018
pcie gen3") reworked the pcs regs values and removed the 0x400 offset
for each pcs_misc regs.
This change caused the malfunction of ipq8074 downstream since it still
has the legacy pcs table where pcs_misc are not placed on a different
table and instead put together assuming the offset of 0x400 for the
related pcs_misc regs.
Split pcs_misc init cfg from the ipq8074 pcs init table to be handled
correctly to prepare for actual support for gen3 pcie for ipq8074.
Fixes: af6643242d3a ("phy: qcom-qmp-pcie: split pcs_misc region for ipq6018 pcie gen3")
Reported-by: Robert Marko <robimarko@gmail.com>
Tested-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 13 +++++++++----
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
index 7c81667dd968..d699fb4f7436 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
@@ -485,6 +485,13 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_V4_PCS_FLL_CNTRL1, 0x01),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_P2U3_WAKEUP_DLY_TIME_AUXCLK_H, 0x0),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_P2U3_WAKEUP_DLY_TIME_AUXCLK_L, 0x1),
+ QMP_PHY_INIT_CFG(QPHY_V4_PCS_G12S1_TXDEEMPH_M3P5DB, 0x10),
+ QMP_PHY_INIT_CFG(QPHY_V4_PCS_RX_DCC_CAL_CONFIG, 0x01),
+ QMP_PHY_INIT_CFG(QPHY_V4_PCS_RX_SIGDET_LVL, 0xaa),
+ QMP_PHY_INIT_CFG(QPHY_V4_PCS_REFGEN_REQ_CONFIG1, 0x0d),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_misc_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_OSC_DTCT_ACTIONS, 0x0),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H, 0x00),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L, 0x01),
@@ -497,11 +504,7 @@ static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_tbl[] = {
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2, 0x50),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4, 0x1a),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5, 0x6),
- QMP_PHY_INIT_CFG(QPHY_V4_PCS_G12S1_TXDEEMPH_M3P5DB, 0x10),
QMP_PHY_INIT_CFG(QPHY_V4_PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1),
- QMP_PHY_INIT_CFG(QPHY_V4_PCS_RX_DCC_CAL_CONFIG, 0x01),
- QMP_PHY_INIT_CFG(QPHY_V4_PCS_RX_SIGDET_LVL, 0xaa),
- QMP_PHY_INIT_CFG(QPHY_V4_PCS_REFGEN_REQ_CONFIG1, 0x0d),
};
static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] = {
@@ -1506,6 +1509,8 @@ static const struct qmp_phy_cfg ipq8074_pciephy_gen3_cfg = {
.rx_num = ARRAY_SIZE(ipq8074_pcie_gen3_rx_tbl),
.pcs = ipq8074_pcie_gen3_pcs_tbl,
.pcs_num = ARRAY_SIZE(ipq8074_pcie_gen3_pcs_tbl),
+ .pcs_misc = ipq8074_pcie_gen3_pcs_misc_tbl,
+ .pcs_misc_num = ARRAY_SIZE(ipq8074_pcie_gen3_pcs_misc_tbl),
},
.clk_list = ipq8074_pciephy_clk_l,
.num_clks = ARRAY_SIZE(ipq8074_pciephy_clk_l),
--
2.37.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table
2022-11-03 21:21 [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Christian Marangi
@ 2022-11-03 21:21 ` Christian Marangi
2022-11-10 7:08 ` Vinod Koul
2022-11-10 7:08 ` [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Vinod Koul
2022-12-06 18:18 ` (subset) " Bjorn Andersson
2 siblings, 1 reply; 5+ messages in thread
From: Christian Marangi @ 2022-11-03 21:21 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Vinod Koul, Kishon Vijay Abraham I,
Dmitry Baryshkov, linux-arm-msm, devicetree, linux-kernel,
linux-phy
Cc: Christian Marangi
This is not a fix on its own but more a cleanup. Phy qmp pcie driver
currently have a workaround to handle pcs_misc not declared and add
0x400 offset to the pcs reg if pcs_misc is not declared.
Correctly declare pcs_misc reg and reduce PCS size to the common value
of 0x1f0 as done for every other qmp based pcie phy device.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 9ebb9e2371b1..95d7f49bc61a 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -406,7 +406,8 @@ pcie_phy: phy@84000 {
pcie_phy0: phy@84200 {
reg = <0x0 0x84200 0x0 0x16c>, /* Serdes Tx */
<0x0 0x84400 0x0 0x200>, /* Serdes Rx */
- <0x0 0x84800 0x0 0x4f4>; /* PCS: Lane0, COM, PCIE */
+ <0x0 0x84800 0x0 0x1f0>; /* PCS: Lane0, COM, PCIE */
+ <0x0 0x84c00 0x0 0xf4>; /* pcs_misc */
#phy-cells = <0>;
clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
--
2.37.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table
2022-11-03 21:21 [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Christian Marangi
2022-11-03 21:21 ` [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table Christian Marangi
@ 2022-11-10 7:08 ` Vinod Koul
2022-12-06 18:18 ` (subset) " Bjorn Andersson
2 siblings, 0 replies; 5+ messages in thread
From: Vinod Koul @ 2022-11-10 7:08 UTC (permalink / raw)
To: Christian Marangi
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Kishon Vijay Abraham I, Dmitry Baryshkov,
linux-arm-msm, devicetree, linux-kernel, linux-phy, Robert Marko
On 03-11-22, 22:21, Christian Marangi wrote:
> Commit af6643242d3a ("phy: qcom-qmp-pcie: split pcs_misc region for ipq6018
> pcie gen3") reworked the pcs regs values and removed the 0x400 offset
> for each pcs_misc regs.
>
> This change caused the malfunction of ipq8074 downstream since it still
> has the legacy pcs table where pcs_misc are not placed on a different
> table and instead put together assuming the offset of 0x400 for the
> related pcs_misc regs.
>
> Split pcs_misc init cfg from the ipq8074 pcs init table to be handled
> correctly to prepare for actual support for gen3 pcie for ipq8074.
Applied, thanks
--
~Vinod
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table
2022-11-03 21:21 ` [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table Christian Marangi
@ 2022-11-10 7:08 ` Vinod Koul
0 siblings, 0 replies; 5+ messages in thread
From: Vinod Koul @ 2022-11-10 7:08 UTC (permalink / raw)
To: Christian Marangi
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Kishon Vijay Abraham I, Dmitry Baryshkov,
linux-arm-msm, devicetree, linux-kernel, linux-phy
On 03-11-22, 22:21, Christian Marangi wrote:
> This is not a fix on its own but more a cleanup. Phy qmp pcie driver
> currently have a workaround to handle pcs_misc not declared and add
> 0x400 offset to the pcs reg if pcs_misc is not declared.
>
> Correctly declare pcs_misc reg and reduce PCS size to the common value
> of 0x1f0 as done for every other qmp based pcie phy device.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
--
~Vinod
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: (subset) [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table
2022-11-03 21:21 [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Christian Marangi
2022-11-03 21:21 ` [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table Christian Marangi
2022-11-10 7:08 ` [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Vinod Koul
@ 2022-12-06 18:18 ` Bjorn Andersson
2 siblings, 0 replies; 5+ messages in thread
From: Bjorn Andersson @ 2022-12-06 18:18 UTC (permalink / raw)
To: robh+dt, konrad.dybcio, krzysztof.kozlowski+dt, linux-arm-msm,
linux-kernel, kishon, dmitry.baryshkov, devicetree,
Christian Marangi, Andy Gross, vkoul, linux-phy
Cc: robimarko
On Thu, 3 Nov 2022 22:21:24 +0100, Christian Marangi wrote:
> Commit af6643242d3a ("phy: qcom-qmp-pcie: split pcs_misc region for ipq6018
> pcie gen3") reworked the pcs regs values and removed the 0x400 offset
> for each pcs_misc regs.
>
> This change caused the malfunction of ipq8074 downstream since it still
> has the legacy pcs table where pcs_misc are not placed on a different
> table and instead put together assuming the offset of 0x400 for the
> related pcs_misc regs.
>
> [...]
Applied, thanks!
[2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table
commit: 08f399a818b0eff552b1f23c3171950a58aea78f
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-12-06 18:20 UTC | newest]
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2022-11-03 21:21 [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Christian Marangi
2022-11-03 21:21 ` [PATCH 2/2] arm64: dts: qcom: ipq6018: improve pcie phy pcs reg table Christian Marangi
2022-11-10 7:08 ` Vinod Koul
2022-11-10 7:08 ` [PATCH 1/2] phy: qcom-qmp-pcie: split pcs_misc init cfg for ipq8074 pcs table Vinod Koul
2022-12-06 18:18 ` (subset) " Bjorn Andersson
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