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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>,
	Will Deacon <will@kernel.org>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Jason Gunthorpe <jgg@mellanox.com>,
	Dave Jiang <dave.jiang@intel.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	Kevin Tian <kevin.tian@intel.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Logan Gunthorpe <logang@deltatee.com>,
	Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>,
	Allen Hubbe <allenbh@gmail.com>,
	"Ahmed S. Darwish" <darwi@linutronix.de>,
	Reinette Chatre <reinette.chatre@intel.com>
Subject: [patch 16/33] iommu/amd: Switch to MSI base domains
Date: Fri, 11 Nov 2022 14:58:36 +0100 (CET)	[thread overview]
Message-ID: <20221111135206.176832734@linutronix.de> (raw)
In-Reply-To: 20221111133158.196269823@linutronix.de

Remove the global PCI/MSI irqdomain implementation and provide the required
MSI parent ops so the PCI/MSI code can detect the new parent and setup per
device domains.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 arch/x86/kernel/apic/msi.c          |    1 +
 drivers/iommu/amd/amd_iommu_types.h |    1 -
 drivers/iommu/amd/iommu.c           |   19 +++++++++++++------
 include/linux/irqdomain_defs.h      |    1 +
 4 files changed, 15 insertions(+), 7 deletions(-)

--- a/arch/x86/kernel/apic/msi.c
+++ b/arch/x86/kernel/apic/msi.c
@@ -218,6 +218,7 @@ static bool x86_init_dev_msi_info(struct
 		info->flags |= MSI_FLAG_NOMASK_QUIRK;
 		break;
 	case DOMAIN_BUS_DMAR:
+	case DOMAIN_BUS_AMDVI:
 		break;
 	default:
 		WARN_ON_ONCE(1);
--- a/drivers/iommu/amd/amd_iommu_types.h
+++ b/drivers/iommu/amd/amd_iommu_types.h
@@ -734,7 +734,6 @@ struct amd_iommu {
 	u8 max_counters;
 #ifdef CONFIG_IRQ_REMAP
 	struct irq_domain *ir_domain;
-	struct irq_domain *msi_domain;
 
 	struct amd_irte_ops *irte_ops;
 #endif
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -815,7 +815,7 @@ amd_iommu_set_pci_msi_domain(struct devi
 	    !pci_dev_has_default_msi_parent_domain(to_pci_dev(dev)))
 		return;
 
-	dev_set_msi_domain(dev, iommu->msi_domain);
+	dev_set_msi_domain(dev, iommu->ir_domain);
 }
 
 #else /* CONFIG_IRQ_REMAP */
@@ -3648,6 +3648,12 @@ static struct irq_chip amd_ir_chip = {
 	.irq_compose_msi_msg	= ir_compose_msi_msg,
 };
 
+static const struct msi_parent_ops amdvi_msi_parent_ops = {
+	.supported_flags	= X86_VECTOR_MSI_FLAGS_SUPPORTED | MSI_FLAG_MULTI_PCI_MSI,
+	.prefix			= "IR-",
+	.init_dev_msi_info	= msi_parent_init_dev_msi_info,
+};
+
 int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
 {
 	struct fwnode_handle *fn;
@@ -3655,16 +3661,17 @@ int amd_iommu_create_irq_domain(struct a
 	fn = irq_domain_alloc_named_id_fwnode("AMD-IR", iommu->index);
 	if (!fn)
 		return -ENOMEM;
-	iommu->ir_domain = irq_domain_create_tree(fn, &amd_ir_domain_ops, iommu);
+	iommu->ir_domain = irq_domain_create_hierarchy(arch_get_ir_parent_domain(), 0, 0,
+						       fn, &amd_ir_domain_ops, iommu);
 	if (!iommu->ir_domain) {
 		irq_domain_free_fwnode(fn);
 		return -ENOMEM;
 	}
 
-	iommu->ir_domain->parent = arch_get_ir_parent_domain();
-	iommu->msi_domain = arch_create_remap_msi_irq_domain(iommu->ir_domain,
-							     "AMD-IR-MSI",
-							     iommu->index);
+	irq_domain_update_bus_token(iommu->ir_domain,  DOMAIN_BUS_AMDVI);
+	iommu->ir_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT;
+	iommu->ir_domain->msi_parent_ops = &amdvi_msi_parent_ops;
+
 	return 0;
 }
 
--- a/include/linux/irqdomain_defs.h
+++ b/include/linux/irqdomain_defs.h
@@ -24,6 +24,7 @@ enum irq_domain_bus_token {
 	DOMAIN_BUS_PCI_DEVICE_MSI,
 	DOMAIN_BUS_PCI_DEVICE_MSIX,
 	DOMAIN_BUS_DMAR,
+	DOMAIN_BUS_AMDVI,
 };
 
 #endif /* _LINUX_IRQDOMAIN_DEFS_H */


  parent reply	other threads:[~2022-11-11 14:06 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-11 13:58 [patch 00/33] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation Thomas Gleixner
2022-11-11 13:58 ` [patch 01/33] genirq/msi: Rearrange MSI domain flags Thomas Gleixner
2022-11-16 18:41   ` Jason Gunthorpe
2022-11-11 13:58 ` [patch 02/33] genirq/msi: Provide struct msi_parent_ops Thomas Gleixner
2022-11-16 18:57   ` Jason Gunthorpe
2022-11-17 15:58     ` Thomas Gleixner
2022-11-18 13:52       ` Thomas Gleixner
2022-11-11 13:58 ` [patch 03/33] genirq/msi: Provide data structs for per device domains Thomas Gleixner
2022-11-11 13:58 ` [patch 04/33] genirq/msi: Add size info to struct msi_domain_info Thomas Gleixner
2022-11-11 13:58 ` [patch 05/33] genirq/msi: Split msi_create_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 06/33] genirq/irqdomain: Add irq_domain::dev for per device MSI domains Thomas Gleixner
2022-11-11 13:58 ` [patch 07/33] genirq/msi: Provide msi_create/free_device_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 08/33] genirq/msi: Provide msi_match_device_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 09/33] genirq/msi: Add range checking to msi_insert_desc() Thomas Gleixner
2022-11-11 13:58 ` [patch 10/33] PCI/MSI: Split __pci_write_msi_msg() Thomas Gleixner
2022-11-16 20:10   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 11/33] genirq/msi: Provide BUS_DEVICE_PCI_MSI[X] Thomas Gleixner
2022-11-11 13:58 ` [patch 12/33] PCI/MSI: Add support for per device MSI[X] domains Thomas Gleixner
2022-11-16 19:13   ` Jason Gunthorpe
2022-11-16 22:38     ` Thomas Gleixner
2022-11-17  0:22       ` Jason Gunthorpe
2022-11-17  8:45         ` Thomas Gleixner
2022-11-16 20:22   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 13/33] x86/apic/vector: Provide MSI parent domain Thomas Gleixner
2022-11-16 19:18   ` Jason Gunthorpe
2022-11-17 20:06     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 14/33] PCI/MSI: Remove unused pci_dev_has_special_msi_domain() Thomas Gleixner
2022-11-16 20:13   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 15/33] iommu/vt-d: Switch to MSI parent domains Thomas Gleixner
2022-11-11 13:58 ` Thomas Gleixner [this message]
2022-11-11 13:58 ` [patch 17/33] x86/apic/msi: Remove arch_create_remap_msi_irq_domain() Thomas Gleixner
2022-11-11 13:58 ` [patch 18/33] genirq/msi: Provide struct msi_map Thomas Gleixner
2022-11-11 13:58 ` [patch 19/33] genirq/msi: Provide msi_desc::msi_data Thomas Gleixner
2022-11-16 19:28   ` Jason Gunthorpe
2022-11-17  8:48     ` Thomas Gleixner
2022-11-17 13:33       ` Jason Gunthorpe
2022-11-18 22:08     ` Thomas Gleixner
2022-11-21 17:20       ` Jason Gunthorpe
2022-11-21 19:40         ` Thomas Gleixner
2022-11-22  1:52           ` Jason Gunthorpe
2022-11-22 20:49             ` Thomas Gleixner
2022-11-23 16:58               ` Jason Gunthorpe
2022-11-23 18:38                 ` Thomas Gleixner
2022-12-01 12:24                   ` Thomas Gleixner
2022-12-02  0:35                     ` Jason Gunthorpe
2022-12-02  2:14                       ` Thomas Gleixner
2022-11-11 13:58 ` [patch 20/33] genirq/msi: Provide msi_domain_ops::prepare_desc() Thomas Gleixner
2022-11-11 13:58 ` [patch 21/33] genirq/msi: Provide msi_domain_alloc_irq_at() Thomas Gleixner
2022-11-16 19:36   ` Jason Gunthorpe
2022-11-17  9:40     ` Thomas Gleixner
2022-11-17 23:33   ` Reinette Chatre
2022-11-18  0:58     ` Thomas Gleixner
2022-11-18  9:15       ` Thomas Gleixner
2022-11-18 11:05         ` Thomas Gleixner
2022-11-18 18:18           ` Reinette Chatre
2022-11-18 22:31             ` Thomas Gleixner
2022-11-18 22:59               ` Reinette Chatre
2022-11-19  0:19                 ` Reinette Chatre
2022-11-11 13:58 ` [patch 22/33] genirq/msi: Provide MSI_FLAG_MSIX_ALLOC_DYN Thomas Gleixner
2022-11-16 19:36   ` Jason Gunthorpe
2022-11-11 13:58 ` [patch 23/33] PCI/MSI: Split MSIX descriptor setup Thomas Gleixner
2022-11-16 20:13   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 24/33] PCI/MSI: Provide prepare_desc() MSI domain op Thomas Gleixner
2022-11-16 19:40   ` Jason Gunthorpe
2022-11-16 20:26   ` Bjorn Helgaas
2022-11-16 22:42     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 25/33] PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-X Thomas Gleixner
2022-11-16 20:19   ` Bjorn Helgaas
2022-11-16 22:43     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 26/33] x86/apic/msi: Enable MSI_FLAG_PCI_MSIX_ALLOC_DYN Thomas Gleixner
2022-11-11 13:58 ` [patch 27/33] genirq/msi: Provide constants for PCI/IMS support Thomas Gleixner
2022-11-16 19:54   ` Jason Gunthorpe
2022-11-17  9:46     ` Thomas Gleixner
2022-11-11 13:58 ` [patch 28/33] PCI/MSI: Provide IMS (Interrupt Message Store) support Thomas Gleixner
2022-11-16 20:17   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 29/33] PCI/MSI: Provide pci_ims_alloc/free_irq() Thomas Gleixner
2022-11-16 20:14   ` Bjorn Helgaas
2022-11-11 13:58 ` [patch 30/33] x86/apic/msi: Enable PCI/IMS Thomas Gleixner
2022-11-11 13:59 ` [patch 31/33] iommu/vt-d: " Thomas Gleixner
2022-11-11 13:59 ` [patch 32/33] iommu/amd: " Thomas Gleixner
2022-11-11 13:59 ` [patch 33/33] irqchip: Add IDXD Interrupt Message Store driver Thomas Gleixner
2022-12-02 17:55   ` Reinette Chatre
2022-12-02 19:51     ` Thomas Gleixner
2022-12-02 21:16       ` Reinette Chatre
2022-12-05 15:20       ` Thomas Gleixner
2022-12-05 17:19         ` Reinette Chatre

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