From: Jisheng Zhang <jszhang@kernel.org>
To: "Rob Herring" <robh+dt@kernel.org>,
"Conor Dooley" <conor@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: [PATCH v2 8/9] MAINTAINERS: riscv: add entry for Bouffalolab SoC
Date: Sun, 27 Nov 2022 21:24:47 +0800 [thread overview]
Message-ID: <20221127132448.4034-9-jszhang@kernel.org> (raw)
In-Reply-To: <20221127132448.4034-1-jszhang@kernel.org>
Add Jisheng Zhang as Bouffalolab SoC maintainer.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
MAINTAINERS | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 00ff4a2949b8..a6b04249853c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17729,6 +17729,15 @@ F: arch/riscv/
N: riscv
K: riscv
+RISC-V BOUFFALOLAB SOC SUPPORT
+M: Jisheng Zhang <jszhang@kernel.org>
+L: linux-riscv@lists.infradead.org
+S: Maintained
+F: Documentation/devicetree/bindings/riscv/bouffalolab.yaml
+F: Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
+F: arch/riscv/boot/dts/bouffalolab/
+F: drivers/tty/serial/bflb_uart.c
+
RISC-V MICROCHIP FPGA SUPPORT
M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
--
2.38.1
next prev parent reply other threads:[~2022-11-27 13:35 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-27 13:24 [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Jisheng Zhang
2022-11-27 13:24 ` [PATCH v2 1/9] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2022-11-30 5:45 ` Samuel Holland
2022-12-01 11:02 ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 2/9] serial: bflb_uart: add " Jisheng Zhang
2022-11-28 6:10 ` Jiri Slaby
2022-11-28 14:21 ` Jisheng Zhang
2022-11-28 16:01 ` Ilpo Järvinen
2022-11-28 23:20 ` Jisheng Zhang
2022-11-29 6:32 ` Jiri Slaby
2022-12-05 20:03 ` kernel test robot
2022-11-27 13:24 ` [PATCH v2 3/9] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2022-11-30 6:48 ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 4/9] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2022-11-27 17:23 ` Conor Dooley
2022-12-01 11:03 ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 5/9] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2022-11-27 16:25 ` Rob Herring
2022-11-27 17:29 ` Conor Dooley
2022-12-01 11:05 ` Krzysztof Kozlowski
2022-12-01 11:14 ` Conor Dooley
2022-12-01 11:41 ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 6/9] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2022-11-27 17:21 ` Conor Dooley
2022-11-28 9:52 ` Icenowy Zheng
2022-11-28 14:52 ` Conor Dooley
2022-11-30 7:21 ` Samuel Holland
2022-12-05 8:17 ` Icenowy Zheng
2022-12-05 10:29 ` Conor Dooley
2023-01-04 8:32 ` Michael Walle
2022-11-27 13:24 ` [PATCH v2 7/9] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2022-11-27 17:32 ` Conor Dooley
2022-11-30 7:25 ` Samuel Holland
2022-12-05 8:15 ` Icenowy Zheng
2022-11-27 13:24 ` Jisheng Zhang [this message]
2022-11-27 17:35 ` [PATCH v2 8/9] MAINTAINERS: riscv: add entry for Bouffalolab SoC Conor Dooley
2022-11-27 17:36 ` Conor Dooley
2022-11-28 14:30 ` Jisheng Zhang
2022-11-28 14:34 ` Jisheng Zhang
2022-11-28 14:50 ` Conor Dooley
2022-11-30 7:27 ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 9/9] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
2022-11-27 17:36 ` Conor Dooley
2022-12-02 17:54 ` [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Palmer Dabbelt
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