From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Conor Dooley <conor.dooley@microchip.com>
Cc: "Jisheng Zhang" <jszhang@kernel.org>,
"Rob Herring" <robh+dt@kernel.org>,
"Conor Dooley" <conor@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Jiri Slaby" <jirislaby@kernel.org>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v2 5/9] dt-bindings: riscv: Add bouffalolab bl808 board compatibles
Date: Thu, 1 Dec 2022 12:41:45 +0100 [thread overview]
Message-ID: <a1d8197e-33fa-e853-ab73-81b167ec45ec@linaro.org> (raw)
In-Reply-To: <Y4iMrKjLAHpkCygo@wendy>
On 01/12/2022 12:14, Conor Dooley wrote:
> Hey Krzysztof,
>
> On Thu, Dec 01, 2022 at 12:05:04PM +0100, Krzysztof Kozlowski wrote:
>> On 27/11/2022 14:24, Jisheng Zhang wrote:
>>> Several SoMs and boards are available that feature the Bouffalolab
>>> bl808 SoC. Document the compatible strings.
>>>
>>> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
>>> ---
>>> .../bindings/riscv/bouffalolab.yaml | 34 +++++++++++++++++++
>>> 1 file changed, 34 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/riscv/bouffalolab.yaml
>>>
>>> diff --git a/Documentation/devicetree/bindings/riscv/bouffalolab.yaml b/Documentation/devicetree/bindings/riscv/bouffalolab.yaml
>>> new file mode 100644
>>> index 000000000000..91ca9dbdc798
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/riscv/bouffalolab.yaml
>>> @@ -0,0 +1,34 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/riscv/bouffalolab.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Bouffalo Lab Technology SoC-based boards
>>> +
>>> +maintainers:
>>> + - Jisheng Zhang <jszhang@kernel.org>
>>> +
>>> +description:
>>> + Bouffalo Lab Technology SoC-based boards
>>> +
>>> +properties:
>>> + $nodename:
>>> + const: '/'
>>> + compatible:
>>> + oneOf:
>>> + - description: Sipeed M1s SoM:
>>> + items:
>>> + - const: sipeed,m1s
>>> + - const: bouffalolab,bl808
>>
>> I don't think that SoM is usable alone. It always needs a carrier, so
>> drop this entry.
>
> For my own information, if a SoM is not capable of functioning without a
> carrier there is no merit in it having a compatible?
> Does this also apply if there are multiple possible carriers from
> different vendors?
Compatible makes sense anyway. There will be different boards using this
SoM (not only carriers, but final products) and they all will have
common piece - the SoM. It's the same for other SoM designs (e.g. for iMX).
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-12-01 11:42 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-27 13:24 [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Jisheng Zhang
2022-11-27 13:24 ` [PATCH v2 1/9] dt-bindings: serial: add documentation for Bouffalolab UART Driver Jisheng Zhang
2022-11-30 5:45 ` Samuel Holland
2022-12-01 11:02 ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 2/9] serial: bflb_uart: add " Jisheng Zhang
2022-11-28 6:10 ` Jiri Slaby
2022-11-28 14:21 ` Jisheng Zhang
2022-11-28 16:01 ` Ilpo Järvinen
2022-11-28 23:20 ` Jisheng Zhang
2022-11-29 6:32 ` Jiri Slaby
2022-12-05 20:03 ` kernel test robot
2022-11-27 13:24 ` [PATCH v2 3/9] riscv: add the Bouffalolab SoC family Kconfig option Jisheng Zhang
2022-11-30 6:48 ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 4/9] dt-bindings: vendor-prefixes: add bouffalolab Jisheng Zhang
2022-11-27 17:23 ` Conor Dooley
2022-12-01 11:03 ` Krzysztof Kozlowski
2022-11-27 13:24 ` [PATCH v2 5/9] dt-bindings: riscv: Add bouffalolab bl808 board compatibles Jisheng Zhang
2022-11-27 16:25 ` Rob Herring
2022-11-27 17:29 ` Conor Dooley
2022-12-01 11:05 ` Krzysztof Kozlowski
2022-12-01 11:14 ` Conor Dooley
2022-12-01 11:41 ` Krzysztof Kozlowski [this message]
2022-11-27 13:24 ` [PATCH v2 6/9] riscv: dts: bouffalolab: add the bl808 SoC base device tree Jisheng Zhang
2022-11-27 17:21 ` Conor Dooley
2022-11-28 9:52 ` Icenowy Zheng
2022-11-28 14:52 ` Conor Dooley
2022-11-30 7:21 ` Samuel Holland
2022-12-05 8:17 ` Icenowy Zheng
2022-12-05 10:29 ` Conor Dooley
2023-01-04 8:32 ` Michael Walle
2022-11-27 13:24 ` [PATCH v2 7/9] riscv: dts: bouffalolab: add Sipeed M1s SoM and Dock devicetree Jisheng Zhang
2022-11-27 17:32 ` Conor Dooley
2022-11-30 7:25 ` Samuel Holland
2022-12-05 8:15 ` Icenowy Zheng
2022-11-27 13:24 ` [PATCH v2 8/9] MAINTAINERS: riscv: add entry for Bouffalolab SoC Jisheng Zhang
2022-11-27 17:35 ` Conor Dooley
2022-11-27 17:36 ` Conor Dooley
2022-11-28 14:30 ` Jisheng Zhang
2022-11-28 14:34 ` Jisheng Zhang
2022-11-28 14:50 ` Conor Dooley
2022-11-30 7:27 ` Samuel Holland
2022-11-27 13:24 ` [PATCH v2 9/9] riscv: defconfig: enable BOUFFALOLAB SoC Jisheng Zhang
2022-11-27 17:36 ` Conor Dooley
2022-12-02 17:54 ` [PATCH v2 0/9] riscv: add Bouffalolab bl808 support Palmer Dabbelt
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