From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: andersson@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, bp@alien8.de,
tony.luck@intel.com
Cc: quic_saipraka@quicinc.com, konrad.dybcio@linaro.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
james.morse@arm.com, mchehab@kernel.org, rric@kernel.org,
linux-edac@vger.kernel.org, quic_ppareek@quicinc.com,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 01/12] dt-bindings: arm: msm: Update the maintainers for LLCC
Date: Wed, 7 Dec 2022 19:29:10 +0530 [thread overview]
Message-ID: <20221207135922.314827-2-manivannan.sadhasivam@linaro.org> (raw)
In-Reply-To: <20221207135922.314827-1-manivannan.sadhasivam@linaro.org>
Rishabh Bhatnagar has left Qualcomm, and there is no evidence of him
maintaining with a new identity. So his entry needs to be removed.
Also, Sai Prakash Ranjan's email address should be updated to use
quicinc domain.
Cc: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
index 38efcad56dbd..d1df49ffcc1b 100644
--- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml
@@ -7,8 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Last Level Cache Controller
maintainers:
- - Rishabh Bhatnagar <rishabhb@codeaurora.org>
- - Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
+ - Sai Prakash Ranjan <quic_saipraka@quicinc.com>
description: |
LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
--
2.25.1
next prev parent reply other threads:[~2022-12-07 14:00 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-07 13:59 [PATCH 00/12] Qcom: LLCC/EDAC: Fix base address used for LLCC banks Manivannan Sadhasivam
2022-12-07 13:59 ` Manivannan Sadhasivam [this message]
2022-12-08 3:15 ` [PATCH 01/12] dt-bindings: arm: msm: Update the maintainers for LLCC Sai Prakash Ranjan
2022-12-12 5:54 ` Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 02/12] dt-bindings: arm: msm: Fix register regions used for LLCC banks Manivannan Sadhasivam
2022-12-07 16:08 ` Bjorn Andersson
2022-12-07 16:53 ` Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 03/12] arm64: dts: qcom: sdm845: Fix the base addresses of " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 04/12] arm64: dts: qcom: sc7180: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 05/12] arm64: dts: qcom: sc7280: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 06/12] arm64: dts: qcom: sc8280xp: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 07/12] arm64: dts: qcom: sm8150: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 08/12] arm64: dts: qcom: sm8250: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 09/12] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 10/12] arm64: dts: qcom: sm8450: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 11/12] arm64: dts: qcom: sm6350: " Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 12/12] llcc/edac: Fix the base address used for accessing " Manivannan Sadhasivam
2022-12-07 14:06 ` Manivannan Sadhasivam
2022-12-07 13:59 ` [PATCH 12/12] qcom: " Manivannan Sadhasivam
2022-12-07 16:17 ` Bjorn Andersson
2022-12-08 9:16 ` [PATCH 00/12] Qcom: LLCC/EDAC: Fix base address used for " Luca Weiss
2022-12-12 8:31 ` Manivannan Sadhasivam
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