* [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs
@ 2022-12-12 10:54 Vignesh Raghavendra
2022-12-12 10:54 ` [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX Vignesh Raghavendra
` (4 more replies)
0 siblings, 5 replies; 7+ messages in thread
From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw)
To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski
Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra,
linux-arm-kernel
This series introduces support for various DMAs on TI's AM62A SoC under
K3 family of devices.
Apart from usual BCDMA and PKTDMA thats present on K3 family, AM62A has
a dedicated BCDMA for camera (CSI) with only RX DMA Channels.
Patch 1 adds bindings for this new DMA instance
Patch 2 fixes a bug that gets exposed due to RX only DMA
Patch 3 and 4 add base support for AM62A DMA
Patch 5 does BCDMA CSI RX specific enhancements.
v2:
Fix k3-bcdma.yaml as per Krzysztof 's comments
Address's Peter's comment on 2/5
v1: https://lore.kernel.org/dmaengine/20221206043554.1521522-1-vigneshr@ti.com/
Jai Luthra (1):
dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data
Vignesh Raghavendra (4):
dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX
dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN
dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC
dmaengine: ti: k3-udma: Add support for BCDMA CSI RX
.../devicetree/bindings/dma/ti/k3-bcdma.yaml | 67 ++++--
drivers/dma/ti/Makefile | 3 +-
drivers/dma/ti/k3-psil-am62a.c | 196 ++++++++++++++++++
drivers/dma/ti/k3-psil-priv.h | 1 +
drivers/dma/ti/k3-psil.c | 1 +
drivers/dma/ti/k3-udma.c | 41 +++-
6 files changed, 285 insertions(+), 24 deletions(-)
create mode 100644 drivers/dma/ti/k3-psil-am62a.c
--
2.38.1
^ permalink raw reply [flat|nested] 7+ messages in thread* [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra @ 2022-12-12 10:54 ` Vignesh Raghavendra 2022-12-12 11:59 ` Krzysztof Kozlowski 2022-12-12 10:54 ` [PATCH v2 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN Vignesh Raghavendra ` (3 subsequent siblings) 4 siblings, 1 reply; 7+ messages in thread From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw) To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra, linux-arm-kernel AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface (CSI) IP. Add new compatible for the same. Unlike system BCDMA, this instance only has RX DMA channels and lack TX or block copy channel. Thus make those properties optional. Additionally CSI RX has independent power domain, add the binding for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- v2: reorder compatibles alphabetically Fix reg defintion to min 3 and max 5 Keep top level constraints as is and further restrict variants within "if-else" blocks .../devicetree/bindings/dma/ti/k3-bcdma.yaml | 67 ++++++++++++++----- 1 file changed, 49 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml index 08627d91e607..86e8bebce3f2 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml @@ -28,13 +28,15 @@ description: | PDMAs can be configured via BCDMA split channel's peer registers to match with the configuration of the legacy peripheral. -allOf: - - $ref: /schemas/dma/dma-controller.yaml# - - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# - properties: compatible: - const: ti,am64-dmss-bcdma + enum: + - ti,am62a-dmss-bcdma-csirx + - ti,am64-dmss-bcdma + + reg: + minItems: 3 + maxItems: 5 "#dma-cells": const: 3 @@ -65,19 +67,13 @@ properties: cell 3: ASEL value for the channel - reg: - maxItems: 5 - - reg-names: - items: - - const: gcfg - - const: bchanrt - - const: rchanrt - - const: tchanrt - - const: ringrt - msi-parent: true + power-domains: + description: + Power domain if available + maxItems: 1 + ti,asel: $ref: /schemas/types.yaml#/definitions/uint32 description: ASEL value for non slave channels @@ -123,10 +119,45 @@ required: - msi-parent - ti,sci - ti,sci-dev-id - - ti,sci-rm-range-bchan - - ti,sci-rm-range-tchan - ti,sci-rm-range-rchan +allOf: + - $ref: /schemas/dma/dma-controller.yaml# + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# + + - if: + properties: + compatible: + contains: + const: ti,am62a-dmss-bcdma-csirx + then: + properties: + ti,sci-rm-range-bchan: false + ti,sci-rm-range-tchan: false + + reg-names: + items: + - const: gcfg + - const: rchanrt + - const: ringrt + + required: + - power-domains + + else: + properties: + reg-names: + items: + - const: gcfg + - const: bchanrt + - const: rchanrt + - const: tchanrt + - const: ringrt + + required: + - ti,sci-rm-range-bchan + - ti,sci-rm-range-tchan + unevaluatedProperties: false examples: -- 2.38.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX 2022-12-12 10:54 ` [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX Vignesh Raghavendra @ 2022-12-12 11:59 ` Krzysztof Kozlowski 0 siblings, 0 replies; 7+ messages in thread From: Krzysztof Kozlowski @ 2022-12-12 11:59 UTC (permalink / raw) To: Vignesh Raghavendra, Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, linux-arm-kernel On 12/12/2022 11:54, Vignesh Raghavendra wrote: > AM62A SoC has a dedicated BCDMA that serves Camera Serial Interface > (CSI) IP. Add new compatible for the same. Unlike system > BCDMA, this instance only has RX DMA channels and lack TX or block copy > channel. Thus make those properties optional. Additionally CSI RX has > independent power domain, add the binding for the same. > > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> > --- > > v2: > reorder compatibles alphabetically > Fix reg defintion to min 3 and max 5 > Keep top level constraints as is and further restrict > variants within "if-else" blocks > > .../devicetree/bindings/dma/ti/k3-bcdma.yaml | 67 ++++++++++++++----- > 1 file changed, 49 insertions(+), 18 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml > index 08627d91e607..86e8bebce3f2 100644 > --- a/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml > +++ b/Documentation/devicetree/bindings/dma/ti/k3-bcdma.yaml > @@ -28,13 +28,15 @@ description: | > PDMAs can be configured via BCDMA split channel's peer registers to match with > the configuration of the legacy peripheral. > > -allOf: > - - $ref: /schemas/dma/dma-controller.yaml# > - - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# > - > properties: > compatible: > - const: ti,am64-dmss-bcdma > + enum: > + - ti,am62a-dmss-bcdma-csirx > + - ti,am64-dmss-bcdma > + > + reg: > + minItems: 3 > + maxItems: 5 > > "#dma-cells": > const: 3 > @@ -65,19 +67,13 @@ properties: > > cell 3: ASEL value for the channel > > - reg: > - maxItems: 5 > - > - reg-names: > - items: reg-names with min/max items should also stay. > - - const: gcfg > - - const: bchanrt > - - const: rchanrt > - - const: tchanrt > - - const: ringrt > - > msi-parent: true > > + power-domains: > + description: > + Power domain if available > + maxItems: 1 > + > ti,asel: > $ref: /schemas/types.yaml#/definitions/uint32 > description: ASEL value for non slave channels > @@ -123,10 +119,45 @@ required: > - msi-parent > - ti,sci > - ti,sci-dev-id > - - ti,sci-rm-range-bchan > - - ti,sci-rm-range-tchan > - ti,sci-rm-range-rchan > > +allOf: > + - $ref: /schemas/dma/dma-controller.yaml# > + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# > + > + - if: > + properties: > + compatible: > + contains: > + const: ti,am62a-dmss-bcdma-csirx > + then: > + properties: > + ti,sci-rm-range-bchan: false > + ti,sci-rm-range-tchan: false > + missing constraints for reg > + reg-names: > + items: > + - const: gcfg > + - const: rchanrt > + - const: ringrt > + > + required: > + - power-domains > + > + else: > + properties: missing constraints for reg > + reg-names: > + items: > + - const: gcfg > + - const: bchanrt > + - const: rchanrt > + - const: tchanrt > + - const: ringrt > + > + required: > + - ti,sci-rm-range-bchan > + - ti,sci-rm-range-tchan > + > unevaluatedProperties: false > > examples: Best regards, Krzysztof ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v2 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX Vignesh Raghavendra @ 2022-12-12 10:54 ` Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 3/5] dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data Vignesh Raghavendra ` (2 subsequent siblings) 4 siblings, 0 replies; 7+ messages in thread From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw) To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra, linux-arm-kernel Reusing loop iterator fails if BCHAN is not present as iterator is uninitialized Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- drivers/dma/ti/k3-udma.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index ce8b80bb34d7..aa50d46fa856 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -4774,7 +4774,10 @@ static int bcdma_setup_resources(struct udma_dev *ud) irq_res.desc[i].num = rm_res->desc[i].num; } } + } else { + i = 0; } + if (ud->tchan_cnt) { rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN]; if (IS_ERR(rm_res)) { -- 2.38.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 3/5] dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN Vignesh Raghavendra @ 2022-12-12 10:54 ` Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 4/5] dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX Vignesh Raghavendra 4 siblings, 0 replies; 7+ messages in thread From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw) To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra, linux-arm-kernel From: Jai Luthra <j-luthra@ti.com> Add PSIL and PDMA data for AM62Ax SoC. Signed-off-by: Jai Luthra <j-luthra@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- drivers/dma/ti/Makefile | 3 +- drivers/dma/ti/k3-psil-am62a.c | 196 +++++++++++++++++++++++++++++++++ drivers/dma/ti/k3-psil-priv.h | 1 + drivers/dma/ti/k3-psil.c | 1 + 4 files changed, 200 insertions(+), 1 deletion(-) create mode 100644 drivers/dma/ti/k3-psil-am62a.c diff --git a/drivers/dma/ti/Makefile b/drivers/dma/ti/Makefile index b53d05b11ca5..bd1e07fda559 100644 --- a/drivers/dma/ti/Makefile +++ b/drivers/dma/ti/Makefile @@ -10,6 +10,7 @@ k3-psil-lib-objs := k3-psil.o \ k3-psil-j7200.o \ k3-psil-am64.o \ k3-psil-j721s2.o \ - k3-psil-am62.o + k3-psil-am62.o \ + k3-psil-am62a.o obj-$(CONFIG_TI_K3_PSIL) += k3-psil-lib.o obj-$(CONFIG_TI_DMA_CROSSBAR) += dma-crossbar.o diff --git a/drivers/dma/ti/k3-psil-am62a.c b/drivers/dma/ti/k3-psil-am62a.c new file mode 100644 index 000000000000..ca9d71f91422 --- /dev/null +++ b/drivers/dma/ti/k3-psil-am62a.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com + */ + +#include <linux/kernel.h> + +#include "k3-psil-priv.h" + +#define PSIL_PDMA_XY_TR(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_PDMA_XY, \ + .mapped_channel_id = -1, \ + .default_flow_id = -1, \ + }, \ + } + +#define PSIL_PDMA_XY_PKT(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_PDMA_XY, \ + .mapped_channel_id = -1, \ + .default_flow_id = -1, \ + .pkt_mode = 1, \ + }, \ + } + +#define PSIL_ETHERNET(x, ch, flow_base, flow_cnt) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + .pkt_mode = 1, \ + .needs_epib = 1, \ + .psd_size = 16, \ + .mapped_channel_id = ch, \ + .flow_start = flow_base, \ + .flow_num = flow_cnt, \ + .default_flow_id = flow_base, \ + }, \ + } + +#define PSIL_SAUL(x, ch, flow_base, flow_cnt, default_flow, tx) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + .pkt_mode = 1, \ + .needs_epib = 1, \ + .psd_size = 64, \ + .mapped_channel_id = ch, \ + .flow_start = flow_base, \ + .flow_num = flow_cnt, \ + .default_flow_id = default_flow, \ + .notdpkt = tx, \ + }, \ + } + +#define PSIL_PDMA_MCASP(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_PDMA_XY, \ + .pdma_acc32 = 1, \ + .pdma_burst = 1, \ + }, \ + } + +#define PSIL_CSI2RX(x) \ + { \ + .thread_id = x, \ + .ep_config = { \ + .ep_type = PSIL_EP_NATIVE, \ + }, \ + } + +/* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */ +static struct psil_ep am62a_src_ep_map[] = { + /* SAUL */ + PSIL_SAUL(0x7504, 20, 35, 8, 35, 0), + PSIL_SAUL(0x7505, 21, 35, 8, 36, 0), + PSIL_SAUL(0x7506, 22, 43, 8, 43, 0), + PSIL_SAUL(0x7507, 23, 43, 8, 44, 0), + /* PDMA_MAIN0 - SPI0-3 */ + PSIL_PDMA_XY_PKT(0x4302), + PSIL_PDMA_XY_PKT(0x4303), + PSIL_PDMA_XY_PKT(0x4304), + PSIL_PDMA_XY_PKT(0x4305), + PSIL_PDMA_XY_PKT(0x4306), + PSIL_PDMA_XY_PKT(0x4307), + PSIL_PDMA_XY_PKT(0x4308), + PSIL_PDMA_XY_PKT(0x4309), + PSIL_PDMA_XY_PKT(0x430a), + PSIL_PDMA_XY_PKT(0x430b), + PSIL_PDMA_XY_PKT(0x430c), + PSIL_PDMA_XY_PKT(0x430d), + /* PDMA_MAIN1 - UART0-6 */ + PSIL_PDMA_XY_PKT(0x4400), + PSIL_PDMA_XY_PKT(0x4401), + PSIL_PDMA_XY_PKT(0x4402), + PSIL_PDMA_XY_PKT(0x4403), + PSIL_PDMA_XY_PKT(0x4404), + PSIL_PDMA_XY_PKT(0x4405), + PSIL_PDMA_XY_PKT(0x4406), + /* PDMA_MAIN2 - MCASP0-2 */ + PSIL_PDMA_MCASP(0x4500), + PSIL_PDMA_MCASP(0x4501), + PSIL_PDMA_MCASP(0x4502), + /* CPSW3G */ + PSIL_ETHERNET(0x4600, 19, 19, 16), + /* CSI2RX */ + PSIL_CSI2RX(0x5000), + PSIL_CSI2RX(0x5001), + PSIL_CSI2RX(0x5002), + PSIL_CSI2RX(0x5003), + PSIL_CSI2RX(0x5004), + PSIL_CSI2RX(0x5005), + PSIL_CSI2RX(0x5006), + PSIL_CSI2RX(0x5007), + PSIL_CSI2RX(0x5008), + PSIL_CSI2RX(0x5009), + PSIL_CSI2RX(0x500a), + PSIL_CSI2RX(0x500b), + PSIL_CSI2RX(0x500c), + PSIL_CSI2RX(0x500d), + PSIL_CSI2RX(0x500e), + PSIL_CSI2RX(0x500f), + PSIL_CSI2RX(0x5010), + PSIL_CSI2RX(0x5011), + PSIL_CSI2RX(0x5012), + PSIL_CSI2RX(0x5013), + PSIL_CSI2RX(0x5014), + PSIL_CSI2RX(0x5015), + PSIL_CSI2RX(0x5016), + PSIL_CSI2RX(0x5017), + PSIL_CSI2RX(0x5018), + PSIL_CSI2RX(0x5019), + PSIL_CSI2RX(0x501a), + PSIL_CSI2RX(0x501b), + PSIL_CSI2RX(0x501c), + PSIL_CSI2RX(0x501d), + PSIL_CSI2RX(0x501e), + PSIL_CSI2RX(0x501f), +}; + +/* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ +static struct psil_ep am62a_dst_ep_map[] = { + /* SAUL */ + PSIL_SAUL(0xf500, 27, 83, 8, 83, 1), + PSIL_SAUL(0xf501, 28, 91, 8, 91, 1), + /* PDMA_MAIN0 - SPI0-3 */ + PSIL_PDMA_XY_PKT(0xc302), + PSIL_PDMA_XY_PKT(0xc303), + PSIL_PDMA_XY_PKT(0xc304), + PSIL_PDMA_XY_PKT(0xc305), + PSIL_PDMA_XY_PKT(0xc306), + PSIL_PDMA_XY_PKT(0xc307), + PSIL_PDMA_XY_PKT(0xc308), + PSIL_PDMA_XY_PKT(0xc309), + PSIL_PDMA_XY_PKT(0xc30a), + PSIL_PDMA_XY_PKT(0xc30b), + PSIL_PDMA_XY_PKT(0xc30c), + PSIL_PDMA_XY_PKT(0xc30d), + /* PDMA_MAIN1 - UART0-6 */ + PSIL_PDMA_XY_PKT(0xc400), + PSIL_PDMA_XY_PKT(0xc401), + PSIL_PDMA_XY_PKT(0xc402), + PSIL_PDMA_XY_PKT(0xc403), + PSIL_PDMA_XY_PKT(0xc404), + PSIL_PDMA_XY_PKT(0xc405), + PSIL_PDMA_XY_PKT(0xc406), + /* PDMA_MAIN2 - MCASP0-2 */ + PSIL_PDMA_MCASP(0xc500), + PSIL_PDMA_MCASP(0xc501), + PSIL_PDMA_MCASP(0xc502), + /* CPSW3G */ + PSIL_ETHERNET(0xc600, 19, 19, 8), + PSIL_ETHERNET(0xc601, 20, 27, 8), + PSIL_ETHERNET(0xc602, 21, 35, 8), + PSIL_ETHERNET(0xc603, 22, 43, 8), + PSIL_ETHERNET(0xc604, 23, 51, 8), + PSIL_ETHERNET(0xc605, 24, 59, 8), + PSIL_ETHERNET(0xc606, 25, 67, 8), + PSIL_ETHERNET(0xc607, 26, 75, 8), +}; + +struct psil_ep_map am62a_ep_map = { + .name = "am62a", + .src = am62a_src_ep_map, + .src_count = ARRAY_SIZE(am62a_src_ep_map), + .dst = am62a_dst_ep_map, + .dst_count = ARRAY_SIZE(am62a_dst_ep_map), +}; diff --git a/drivers/dma/ti/k3-psil-priv.h b/drivers/dma/ti/k3-psil-priv.h index 74fa9ec02968..abd650bb7600 100644 --- a/drivers/dma/ti/k3-psil-priv.h +++ b/drivers/dma/ti/k3-psil-priv.h @@ -43,5 +43,6 @@ extern struct psil_ep_map j7200_ep_map; extern struct psil_ep_map am64_ep_map; extern struct psil_ep_map j721s2_ep_map; extern struct psil_ep_map am62_ep_map; +extern struct psil_ep_map am62a_ep_map; #endif /* K3_PSIL_PRIV_H_ */ diff --git a/drivers/dma/ti/k3-psil.c b/drivers/dma/ti/k3-psil.c index 8b6533a1eeeb..2da6988a0e7b 100644 --- a/drivers/dma/ti/k3-psil.c +++ b/drivers/dma/ti/k3-psil.c @@ -24,6 +24,7 @@ static const struct soc_device_attribute k3_soc_devices[] = { { .family = "AM64X", .data = &am64_ep_map }, { .family = "J721S2", .data = &j721s2_ep_map }, { .family = "AM62X", .data = &am62_ep_map }, + { .family = "AM62AX", .data = &am62a_ep_map }, { /* sentinel */ } }; -- 2.38.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 4/5] dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra ` (2 preceding siblings ...) 2022-12-12 10:54 ` [PATCH v2 3/5] dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data Vignesh Raghavendra @ 2022-12-12 10:54 ` Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX Vignesh Raghavendra 4 siblings, 0 replies; 7+ messages in thread From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw) To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra, linux-arm-kernel AM62A SoC has a BCDMA and PKTDMA as systems DMAs for service various peripherals similar to AM64 SoC. Add support for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- drivers/dma/ti/k3-udma.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index aa50d46fa856..c1005d17b42e 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -4386,6 +4386,7 @@ static const struct soc_device_attribute k3_soc_devices[] = { { .family = "AM64X", .data = &am64_soc_data }, { .family = "J721S2", .data = &j721e_soc_data}, { .family = "AM62X", .data = &am64_soc_data }, + { .family = "AM62AX", .data = &am64_soc_data }, { /* sentinel */ } }; -- 2.38.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v2 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra ` (3 preceding siblings ...) 2022-12-12 10:54 ` [PATCH v2 4/5] dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC Vignesh Raghavendra @ 2022-12-12 10:54 ` Vignesh Raghavendra 4 siblings, 0 replies; 7+ messages in thread From: Vignesh Raghavendra @ 2022-12-12 10:54 UTC (permalink / raw) To: Peter Ujfalusi, Vinod Koul, Rob Herring, Krzysztof Kozlowski Cc: dmaengine, devicetree, linux-kernel, Vignesh Raghavendra, linux-arm-kernel BCDMA CSI RX present on AM62Ax SoC is a dedicated DMA for servicing Camera Serial Interface (CSI) IP. Add support for the same. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> --- drivers/dma/ti/k3-udma.c | 37 ++++++++++++++++++++++++++++++++----- 1 file changed, 32 insertions(+), 5 deletions(-) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index c1005d17b42e..1d3d1b387b96 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -135,6 +135,7 @@ struct udma_match_data { u32 flags; u32 statictr_z_mask; u8 burst_size[3]; + struct udma_soc_data *soc_data; }; struct udma_soc_data { @@ -4295,6 +4296,25 @@ static struct udma_match_data j721e_mcu_data = { }, }; +static struct udma_soc_data am62a_dmss_csi_soc_data = { + .oes = { + .bcdma_rchan_data = 0xe00, + .bcdma_rchan_ring = 0x1000, + }, +}; + +static struct udma_match_data am62a_bcdma_csirx_data = { + .type = DMA_TYPE_BCDMA, + .psil_base = 0x3100, + .enable_memcpy_support = false, + .burst_size = { + TI_SCI_RM_UDMAP_CHAN_BURST_SIZE_64_BYTES, /* Normal Channels */ + 0, /* No H Channels */ + 0, /* No UH Channels */ + }, + .soc_data = &am62a_dmss_csi_soc_data, +}; + static struct udma_match_data am64_bcdma_data = { .type = DMA_TYPE_BCDMA, .psil_base = 0x2000, /* for tchan and rchan, not applicable to bchan */ @@ -4344,6 +4364,10 @@ static const struct of_device_id udma_of_match[] = { .compatible = "ti,am64-dmss-pktdma", .data = &am64_pktdma_data, }, + { + .compatible = "ti,am62a-dmss-bcdma-csirx", + .data = &am62a_bcdma_csirx_data, + }, { /* Sentinel */ }, }; @@ -5274,12 +5298,15 @@ static int udma_probe(struct platform_device *pdev) } ud->match_data = match->data; - soc = soc_device_match(k3_soc_devices); - if (!soc) { - dev_err(dev, "No compatible SoC found\n"); - return -ENODEV; + ud->soc_data = ud->match_data->soc_data; + if (!ud->soc_data) { + soc = soc_device_match(k3_soc_devices); + if (!soc) { + dev_err(dev, "No compatible SoC found\n"); + return -ENODEV; + } + ud->soc_data = soc->data; } - ud->soc_data = soc->data; ret = udma_get_mmrs(pdev, ud); if (ret) -- 2.38.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-12-12 11:59 UTC | newest] Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-12-12 10:54 [PATCH v2 0/5] dmaengine: Add support for AM62A SoC DMAs Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 1/5] dt-bindings: dma: ti: k3-bcdma: Add bindings for BCDMA CSI RX Vignesh Raghavendra 2022-12-12 11:59 ` Krzysztof Kozlowski 2022-12-12 10:54 ` [PATCH v2 2/5] dmaengine: ti: k3-udma: Fix BCDMA for case w/o BCHAN Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 3/5] dmaengine: ti: k3-psil-am62a: Add AM62Ax PSIL and PDMA data Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 4/5] dmaengine: ti: k3-udma: Add support for DMAs on AM62A SoC Vignesh Raghavendra 2022-12-12 10:54 ` [PATCH v2 5/5] dmaengine: ti: k3-udma: Add support for BCDMA CSI RX Vignesh Raghavendra
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