From: Dario Binacchi <dario.binacchi@amarulasolutions.com>
To: linux-kernel@vger.kernel.org
Cc: angelo@amarulasolutions.com, michael@amarulasolutions.com,
tommaso.merciai@amarulasolutions.com,
Chen-Yu Tsai <wenst@chromium.org>,
linux-amarula@amarulasolutions.com, anthony@amarulasolutions.com,
jagan@amarulasolutions.com,
Dario Binacchi <dario.binacchi@amarulasolutions.com>,
kernel test robot <lkp@intel.com>,
Abel Vesa <abelvesa@kernel.org>,
Fabio Estevam <festevam@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Sascha Hauer <s.hauer@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: [RFC PATCH v2 07/11] clk: imx: composite-8m: add device tree support
Date: Sun, 1 Jan 2023 18:57:36 +0100 [thread overview]
Message-ID: <20230101175740.1010258-8-dario.binacchi@amarulasolutions.com> (raw)
In-Reply-To: <20230101175740.1010258-1-dario.binacchi@amarulasolutions.com>
The patch, backwards compatible, extends the driver to initialize the
clock directly from the device tree.
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reported-by: kernel test robot <lkp@intel.com>
---
Changes in v2:
- Fix compiler warnings reported by kernel test robot.
drivers/clk/imx/clk-composite-8m.c | 84 ++++++++++++++++++++++++++++++
1 file changed, 84 insertions(+)
diff --git a/drivers/clk/imx/clk-composite-8m.c b/drivers/clk/imx/clk-composite-8m.c
index cbf0d7955a00..fa5fdfff0b2d 100644
--- a/drivers/clk/imx/clk-composite-8m.c
+++ b/drivers/clk/imx/clk-composite-8m.c
@@ -7,6 +7,8 @@
#include <linux/errno.h>
#include <linux/export.h>
#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/slab.h>
#include "clk.h"
@@ -25,6 +27,9 @@
#define PCG_CGC_SHIFT 28
+#undef pr_fmt
+#define pr_fmt(fmt) "%s: " fmt, __func__
+
static unsigned long imx8m_clk_composite_divider_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -250,3 +255,82 @@ struct clk_hw *__imx8m_clk_hw_composite(const char *name,
return ERR_CAST(hw);
}
EXPORT_SYMBOL_GPL(__imx8m_clk_hw_composite);
+
+static void __init _of_imx_composite_clk_setup(struct device_node *node,
+ u32 type)
+{
+ void __iomem *reg;
+ struct clk_hw *hw;
+ const char *name = node->name;
+ unsigned int num_parents;
+ const char **parent_names;
+ unsigned long flags = IMX_COMPOSITE_CLK_FLAGS_DEFAULT;
+
+ reg = of_iomap(node, 0);
+ if (IS_ERR(reg)) {
+ pr_err("failed to get reg address for %pOFn\n", node);
+ return;
+ }
+
+ num_parents = of_clk_get_parent_count(node);
+ if (num_parents < 2) {
+ pr_err("%pOFn must have parents\n", node);
+ return;
+ }
+
+ parent_names = kzalloc((sizeof(char *) * num_parents), GFP_KERNEL);
+ if (!parent_names)
+ return;
+
+ of_clk_parent_fill(node, parent_names, num_parents);
+ of_property_read_string(node, "clock-output-names", &name);
+
+ if (of_property_read_bool(node, "fsl,get-rate-nocache"))
+ flags |= CLK_GET_RATE_NOCACHE;
+
+ if (of_property_read_bool(node, "fsl,is-critical"))
+ flags |= CLK_IS_CRITICAL;
+
+ hw = __imx8m_clk_hw_composite(name, parent_names, num_parents, reg,
+ type, flags);
+ if (!IS_ERR(hw))
+ of_clk_add_hw_provider(node, of_clk_hw_simple_get, hw);
+
+ kfree(parent_names);
+}
+
+/**
+ * of_imx_composite_clk_setup() - Setup function for imx composite clock
+ * @node: device node for the clock
+ */
+static void __init of_imx_composite_clk_setup(struct device_node *node)
+{
+ _of_imx_composite_clk_setup(node, IMX_COMPOSITE_CORE);
+}
+CLK_OF_DECLARE(fsl_composite_8m_clk, "fsl,imx8m-composite-clock",
+ of_imx_composite_clk_setup);
+
+/**
+ * of_imx_composite_bus_clk_setup() - Setup function for imx composite clock
+ * @node: device node for the clock
+ */
+static void __init of_imx_composite_bus_clk_setup(struct device_node *node)
+{
+ _of_imx_composite_clk_setup(node, IMX_COMPOSITE_BUS);
+}
+CLK_OF_DECLARE(fsl_composite_bus_8m_clk, "fsl,imx8m-composite-bus-clock",
+ of_imx_composite_bus_clk_setup);
+
+/**
+ * of_imx_composite_fw_managed_clk_setup() - Setup function for imx
+ * composite fw managed clock
+ * @node: device node for the clock
+ */
+static void __init
+of_imx_composite_fw_managed_clk_setup(struct device_node *node)
+{
+ _of_imx_composite_clk_setup(node, IMX_COMPOSITE_FW_MANAGED);
+}
+CLK_OF_DECLARE(fsl_composite_fw_managed_8m_clk,
+ "fsl,imx8m-composite-fw-managed-clock",
+ of_imx_composite_fw_managed_clk_setup);
--
2.32.0
next prev parent reply other threads:[~2023-01-01 17:58 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-01 17:57 [RFC PATCH v2 00/11] clk: imx8mn: setup clocks from the device tree Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 01/11] clk: imx: add structure to extend register accesses Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 02/11] clk: imx: add clk_hw based API imx_get_clk_hw_from_dt() Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 03/11] clk: imx8mn: add gate driver Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 04/11] clk: imx8mn: add mux driver Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 05/11] clk: imx8mn: add divider driver Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 06/11] clk: imx: pll14xx: add device tree support Dario Binacchi
2023-01-01 17:57 ` Dario Binacchi [this message]
2023-01-01 17:57 ` [RFC PATCH v2 08/11] clk: imx: gate2: " Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 09/11] clk: imx: cpu: " Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 10/11] arm64: dts: imx8mn: add dumy clock Dario Binacchi
2023-01-01 17:57 ` [RFC PATCH v2 11/11] arm64: dts: imx8mn: add clocks description Dario Binacchi
2023-01-16 14:35 ` Abel Vesa
2023-01-20 17:47 ` Dario Binacchi
2023-01-02 23:04 ` [RFC PATCH v2 00/11] clk: imx8mn: setup clocks from the device tree Marek Vasut
2023-01-04 16:09 ` Dario Binacchi
2023-01-25 21:10 ` Stephen Boyd
2023-01-26 10:49 ` Michael Nazzareno Trimarchi
2023-02-10 22:49 ` Stephen Boyd
2023-02-11 9:19 ` Michael Nazzareno Trimarchi
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