* [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-22 2:31 ` Bjorn Andersson
2023-03-21 13:21 ` [PATCH v5 02/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible Neil Armstrong
` (11 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Introduce the UCSI PMIC Glink aux driver that communicates
with the aDSP firmware with the UCSI protocol which handles
the USB-C Port(s) Power Delivery.
The UCSI messaging is necessary on newer Qualcomm SoCs to
provide USB role switch and altmode notifications.
Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/usb/typec/ucsi/Kconfig | 10 ++
drivers/usb/typec/ucsi/Makefile | 1 +
drivers/usb/typec/ucsi/ucsi_glink.c | 345 ++++++++++++++++++++++++++++++++++++
3 files changed, 356 insertions(+)
diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
index 8f9c4b9f31f7..b3bb0191987e 100644
--- a/drivers/usb/typec/ucsi/Kconfig
+++ b/drivers/usb/typec/ucsi/Kconfig
@@ -58,4 +58,14 @@ config UCSI_STM32G0
To compile the driver as a module, choose M here: the module will be
called ucsi_stm32g0.
+config UCSI_PMIC_GLINK
+ tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
+ depends on QCOM_PMIC_GLINK
+ help
+ This driver enables UCSI support on platforms that expose UCSI
+ interface as PMIC GLINK device.
+
+ To compile the driver as a module, choose M here: the module will be
+ called ucsi_glink.
+
endif
diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile
index 480d533d762f..77f09e136956 100644
--- a/drivers/usb/typec/ucsi/Makefile
+++ b/drivers/usb/typec/ucsi/Makefile
@@ -18,3 +18,4 @@ endif
obj-$(CONFIG_UCSI_ACPI) += ucsi_acpi.o
obj-$(CONFIG_UCSI_CCG) += ucsi_ccg.o
obj-$(CONFIG_UCSI_STM32G0) += ucsi_stm32g0.o
+obj-$(CONFIG_UCSI_PMIC_GLINK) += ucsi_glink.o
diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
new file mode 100644
index 000000000000..b454a5159896
--- /dev/null
+++ b/drivers/usb/typec/ucsi/ucsi_glink.c
@@ -0,0 +1,345 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2023, Linaro Ltd
+ */
+#include <linux/auxiliary_bus.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/mutex.h>
+#include <linux/property.h>
+#include <linux/soc/qcom/pdr.h>
+#include <linux/soc/qcom/pmic_glink.h>
+#include "ucsi.h"
+
+#define UCSI_BUF_SIZE 48
+
+#define MSG_TYPE_REQ_RESP 1
+#define UCSI_BUF_SIZE 48
+
+#define UC_NOTIFY_RECEIVER_UCSI 0x0
+#define UC_UCSI_READ_BUF_REQ 0x11
+#define UC_UCSI_WRITE_BUF_REQ 0x12
+#define UC_UCSI_USBC_NOTIFY_IND 0x13
+
+struct ucsi_read_buf_req_msg {
+ struct pmic_glink_hdr hdr;
+};
+
+struct ucsi_read_buf_resp_msg {
+ struct pmic_glink_hdr hdr;
+ u8 buf[UCSI_BUF_SIZE];
+ u32 ret_code;
+};
+
+struct ucsi_write_buf_req_msg {
+ struct pmic_glink_hdr hdr;
+ u8 buf[UCSI_BUF_SIZE];
+ u32 reserved;
+};
+
+struct ucsi_write_buf_resp_msg {
+ struct pmic_glink_hdr hdr;
+ u32 ret_code;
+};
+
+struct ucsi_notify_ind_msg {
+ struct pmic_glink_hdr hdr;
+ u32 notification;
+ u32 receiver;
+ u32 reserved;
+};
+
+struct pmic_glink_ucsi {
+ struct device *dev;
+
+ struct pmic_glink_client *client;
+
+ struct ucsi *ucsi;
+ struct completion read_ack;
+ struct completion write_ack;
+ struct completion sync_ack;
+ bool sync_pending;
+ struct mutex lock; /* protects concurrent access to PMIC Glink interface */
+
+ int sync_val;
+
+ struct work_struct notify_work;
+ struct work_struct register_work;
+
+ u8 read_buf[UCSI_BUF_SIZE];
+};
+
+static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset,
+ void *val, size_t val_len)
+{
+ struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+ struct ucsi_read_buf_req_msg req = {};
+ unsigned long left;
+ int ret;
+
+ req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+ req.hdr.type = MSG_TYPE_REQ_RESP;
+ req.hdr.opcode = UC_UCSI_READ_BUF_REQ;
+
+ mutex_lock(&ucsi->lock);
+ memset(ucsi->read_buf, 0, sizeof(ucsi->read_buf));
+ reinit_completion(&ucsi->read_ack);
+
+ ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+ if (ret < 0) {
+ dev_err(ucsi->dev, "failed to send UCSI read request: %d\n", ret);
+ goto out_unlock;
+ }
+
+ left = wait_for_completion_timeout(&ucsi->read_ack, 5 * HZ);
+ if (!left) {
+ dev_err(ucsi->dev, "timeout waiting for UCSI read response\n");
+ ret = -ETIMEDOUT;
+ goto out_unlock;
+ }
+
+ memcpy(val, &ucsi->read_buf[offset], val_len);
+ ret = 0;
+
+out_unlock:
+ mutex_unlock(&ucsi->lock);
+
+ return ret;
+}
+
+static int pmic_glink_ucsi_locked_write(struct pmic_glink_ucsi *ucsi, unsigned int offset,
+ const void *val, size_t val_len)
+{
+ struct ucsi_write_buf_req_msg req = {};
+ unsigned long left;
+ int ret;
+
+ req.hdr.owner = PMIC_GLINK_OWNER_USBC;
+ req.hdr.type = MSG_TYPE_REQ_RESP;
+ req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ;
+ memcpy(&req.buf[offset], val, val_len);
+
+ reinit_completion(&ucsi->write_ack);
+
+ ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
+ if (ret < 0) {
+ dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret);
+ return ret;
+ }
+
+ left = wait_for_completion_timeout(&ucsi->write_ack, 5 * HZ);
+ if (!left) {
+ dev_err(ucsi->dev, "timeout waiting for UCSI write response\n");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+static int pmic_glink_ucsi_async_write(struct ucsi *__ucsi, unsigned int offset,
+ const void *val, size_t val_len)
+{
+ struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+ int ret;
+
+ mutex_lock(&ucsi->lock);
+ ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+ mutex_unlock(&ucsi->lock);
+
+ return ret;
+}
+
+static int pmic_glink_ucsi_sync_write(struct ucsi *__ucsi, unsigned int offset,
+ const void *val, size_t val_len)
+{
+ struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
+ unsigned long left;
+ int ret;
+
+ /* TOFIX: Downstream forces recipient to CON when UCSI_GET_ALTERNATE_MODES command */
+
+ mutex_lock(&ucsi->lock);
+ ucsi->sync_val = 0;
+ reinit_completion(&ucsi->sync_ack);
+ ucsi->sync_pending = true;
+ ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
+ mutex_unlock(&ucsi->lock);
+
+ left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ);
+ if (!left) {
+ dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n");
+ ret = -ETIMEDOUT;
+ } else if (ucsi->sync_val) {
+ dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val);
+ }
+
+ ucsi->sync_pending = false;
+
+ return ret;
+}
+
+static const struct ucsi_operations pmic_glink_ucsi_ops = {
+ .read = pmic_glink_ucsi_read,
+ .sync_write = pmic_glink_ucsi_sync_write,
+ .async_write = pmic_glink_ucsi_async_write
+};
+
+static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+ const struct ucsi_read_buf_resp_msg *resp = data;
+
+ if (resp->ret_code)
+ return;
+
+ memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE);
+ complete(&ucsi->read_ack);
+}
+
+static void pmic_glink_ucsi_write_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
+{
+ const struct ucsi_write_buf_resp_msg *resp = data;
+
+ if (resp->ret_code)
+ return;
+
+ ucsi->sync_val = resp->ret_code;
+ complete(&ucsi->write_ack);
+}
+
+static void pmic_glink_ucsi_notify(struct work_struct *work)
+{
+ struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, notify_work);
+ unsigned int con_num;
+ u32 cci;
+ int ret;
+
+ ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci));
+ if (ret) {
+ dev_err(ucsi->dev, "failed to read CCI on notification\n");
+ return;
+ }
+
+ con_num = UCSI_CCI_CONNECTOR(cci);
+ if (con_num)
+ ucsi_connector_change(ucsi->ucsi, con_num);
+
+ if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) {
+ ucsi->sync_val = -EBUSY;
+ complete(&ucsi->sync_ack);
+ } else if (ucsi->sync_pending &&
+ (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) {
+ complete(&ucsi->sync_ack);
+ }
+}
+
+static void pmic_glink_ucsi_register(struct work_struct *work)
+{
+ struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work);
+
+ ucsi_register(ucsi->ucsi);
+}
+
+static void pmic_glink_ucsi_callback(const void *data, size_t len, void *priv)
+{
+ struct pmic_glink_ucsi *ucsi = priv;
+ const struct pmic_glink_hdr *hdr = data;
+
+ switch (hdr->opcode) {
+ case UC_UCSI_READ_BUF_REQ:
+ pmic_glink_ucsi_read_ack(ucsi, data, len);
+ break;
+ case UC_UCSI_WRITE_BUF_REQ:
+ pmic_glink_ucsi_write_ack(ucsi, data, len);
+ break;
+ case UC_UCSI_USBC_NOTIFY_IND:
+ schedule_work(&ucsi->notify_work);
+ break;
+ };
+}
+
+static void pmic_glink_ucsi_pdr_notify(void *priv, int state)
+{
+ struct pmic_glink_ucsi *ucsi = priv;
+
+ if (state == SERVREG_SERVICE_STATE_UP)
+ schedule_work(&ucsi->register_work);
+ else if (state == SERVREG_SERVICE_STATE_DOWN)
+ ucsi_unregister(ucsi->ucsi);
+}
+
+static void pmic_glink_ucsi_destroy(void *data)
+{
+ struct pmic_glink_ucsi *ucsi = data;
+
+ /* Protect to make sure we're not in a middle of a transaction from a glink callback */
+ mutex_lock(&ucsi->lock);
+ ucsi_destroy(ucsi->ucsi);
+ mutex_unlock(&ucsi->lock);
+}
+
+static int pmic_glink_ucsi_probe(struct auxiliary_device *adev,
+ const struct auxiliary_device_id *id)
+{
+ struct pmic_glink_ucsi *ucsi;
+ struct device *dev = &adev->dev;
+ int ret;
+
+ ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL);
+ if (!ucsi)
+ return -ENOMEM;
+
+ ucsi->dev = dev;
+ dev_set_drvdata(dev, ucsi);
+
+ INIT_WORK(&ucsi->notify_work, pmic_glink_ucsi_notify);
+ INIT_WORK(&ucsi->register_work, pmic_glink_ucsi_register);
+ init_completion(&ucsi->read_ack);
+ init_completion(&ucsi->write_ack);
+ init_completion(&ucsi->sync_ack);
+ mutex_init(&ucsi->lock);
+
+ ucsi->ucsi = ucsi_create(dev, &pmic_glink_ucsi_ops);
+ if (IS_ERR(ucsi->ucsi))
+ return PTR_ERR(ucsi->ucsi);
+
+ /* Make sure we destroy *after* pmic_glink unregister */
+ ret = devm_add_action_or_reset(dev, pmic_glink_ucsi_destroy, ucsi);
+ if (ret)
+ return ret;
+
+ ucsi_set_drvdata(ucsi->ucsi, ucsi);
+
+ ucsi->client = devm_pmic_glink_register_client(dev,
+ PMIC_GLINK_OWNER_USBC,
+ pmic_glink_ucsi_callback,
+ pmic_glink_ucsi_pdr_notify,
+ ucsi);
+ return PTR_ERR_OR_ZERO(ucsi->client);
+}
+
+static void pmic_glink_ucsi_remove(struct auxiliary_device *adev)
+{
+ struct pmic_glink_ucsi *ucsi = dev_get_drvdata(&adev->dev);
+
+ /* Unregister first to stop having read & writes */
+ ucsi_unregister(ucsi->ucsi);
+}
+
+static const struct auxiliary_device_id pmic_glink_ucsi_id_table[] = {
+ { .name = "pmic_glink.ucsi", },
+ {},
+};
+MODULE_DEVICE_TABLE(auxiliary, pmic_glink_ucsi_id_table);
+
+static struct auxiliary_driver pmic_glink_ucsi_driver = {
+ .name = "pmic_glink_ucsi",
+ .probe = pmic_glink_ucsi_probe,
+ .remove = pmic_glink_ucsi_remove,
+ .id_table = pmic_glink_ucsi_id_table,
+};
+
+module_auxiliary_driver(pmic_glink_ucsi_driver);
+
+MODULE_DESCRIPTION("Qualcomm PMIC GLINK UCSI driver");
+MODULE_LICENSE("GPL");
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver
2023-03-21 13:21 ` [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver Neil Armstrong
@ 2023-03-22 2:31 ` Bjorn Andersson
2023-03-23 16:33 ` Greg Kroah-Hartman
0 siblings, 1 reply; 19+ messages in thread
From: Bjorn Andersson @ 2023-03-22 2:31 UTC (permalink / raw)
To: Neil Armstrong, Greg Kroah-Hartman
Cc: Heikki Krogerus, Andy Gross, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Catalin Marinas, Will Deacon, linux-kernel,
linux-usb, linux-arm-msm, devicetree, linux-arm-kernel
On Tue, Mar 21, 2023 at 02:21:41PM +0100, Neil Armstrong wrote:
> Introduce the UCSI PMIC Glink aux driver that communicates
> with the aDSP firmware with the UCSI protocol which handles
> the USB-C Port(s) Power Delivery.
>
> The UCSI messaging is necessary on newer Qualcomm SoCs to
> provide USB role switch and altmode notifications.
>
> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Greg, this has no build time dependencies to the remainder of the
series, so can you pick this patch 1 and patch 5 (dt-bindings: usb:
snps,dwc3: document HS & SS OF graph ports) through your tree?
I'll pick up the remainder through the Qualcomm tree.
Regards,
Bjorn
> ---
> drivers/usb/typec/ucsi/Kconfig | 10 ++
> drivers/usb/typec/ucsi/Makefile | 1 +
> drivers/usb/typec/ucsi/ucsi_glink.c | 345 ++++++++++++++++++++++++++++++++++++
> 3 files changed, 356 insertions(+)
>
> diff --git a/drivers/usb/typec/ucsi/Kconfig b/drivers/usb/typec/ucsi/Kconfig
> index 8f9c4b9f31f7..b3bb0191987e 100644
> --- a/drivers/usb/typec/ucsi/Kconfig
> +++ b/drivers/usb/typec/ucsi/Kconfig
> @@ -58,4 +58,14 @@ config UCSI_STM32G0
> To compile the driver as a module, choose M here: the module will be
> called ucsi_stm32g0.
>
> +config UCSI_PMIC_GLINK
> + tristate "UCSI Qualcomm PMIC GLINK Interface Driver"
> + depends on QCOM_PMIC_GLINK
> + help
> + This driver enables UCSI support on platforms that expose UCSI
> + interface as PMIC GLINK device.
> +
> + To compile the driver as a module, choose M here: the module will be
> + called ucsi_glink.
> +
> endif
> diff --git a/drivers/usb/typec/ucsi/Makefile b/drivers/usb/typec/ucsi/Makefile
> index 480d533d762f..77f09e136956 100644
> --- a/drivers/usb/typec/ucsi/Makefile
> +++ b/drivers/usb/typec/ucsi/Makefile
> @@ -18,3 +18,4 @@ endif
> obj-$(CONFIG_UCSI_ACPI) += ucsi_acpi.o
> obj-$(CONFIG_UCSI_CCG) += ucsi_ccg.o
> obj-$(CONFIG_UCSI_STM32G0) += ucsi_stm32g0.o
> +obj-$(CONFIG_UCSI_PMIC_GLINK) += ucsi_glink.o
> diff --git a/drivers/usb/typec/ucsi/ucsi_glink.c b/drivers/usb/typec/ucsi/ucsi_glink.c
> new file mode 100644
> index 000000000000..b454a5159896
> --- /dev/null
> +++ b/drivers/usb/typec/ucsi/ucsi_glink.c
> @@ -0,0 +1,345 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
> + * Copyright (c) 2023, Linaro Ltd
> + */
> +#include <linux/auxiliary_bus.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/mutex.h>
> +#include <linux/property.h>
> +#include <linux/soc/qcom/pdr.h>
> +#include <linux/soc/qcom/pmic_glink.h>
> +#include "ucsi.h"
> +
> +#define UCSI_BUF_SIZE 48
> +
> +#define MSG_TYPE_REQ_RESP 1
> +#define UCSI_BUF_SIZE 48
> +
> +#define UC_NOTIFY_RECEIVER_UCSI 0x0
> +#define UC_UCSI_READ_BUF_REQ 0x11
> +#define UC_UCSI_WRITE_BUF_REQ 0x12
> +#define UC_UCSI_USBC_NOTIFY_IND 0x13
> +
> +struct ucsi_read_buf_req_msg {
> + struct pmic_glink_hdr hdr;
> +};
> +
> +struct ucsi_read_buf_resp_msg {
> + struct pmic_glink_hdr hdr;
> + u8 buf[UCSI_BUF_SIZE];
> + u32 ret_code;
> +};
> +
> +struct ucsi_write_buf_req_msg {
> + struct pmic_glink_hdr hdr;
> + u8 buf[UCSI_BUF_SIZE];
> + u32 reserved;
> +};
> +
> +struct ucsi_write_buf_resp_msg {
> + struct pmic_glink_hdr hdr;
> + u32 ret_code;
> +};
> +
> +struct ucsi_notify_ind_msg {
> + struct pmic_glink_hdr hdr;
> + u32 notification;
> + u32 receiver;
> + u32 reserved;
> +};
> +
> +struct pmic_glink_ucsi {
> + struct device *dev;
> +
> + struct pmic_glink_client *client;
> +
> + struct ucsi *ucsi;
> + struct completion read_ack;
> + struct completion write_ack;
> + struct completion sync_ack;
> + bool sync_pending;
> + struct mutex lock; /* protects concurrent access to PMIC Glink interface */
> +
> + int sync_val;
> +
> + struct work_struct notify_work;
> + struct work_struct register_work;
> +
> + u8 read_buf[UCSI_BUF_SIZE];
> +};
> +
> +static int pmic_glink_ucsi_read(struct ucsi *__ucsi, unsigned int offset,
> + void *val, size_t val_len)
> +{
> + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
> + struct ucsi_read_buf_req_msg req = {};
> + unsigned long left;
> + int ret;
> +
> + req.hdr.owner = PMIC_GLINK_OWNER_USBC;
> + req.hdr.type = MSG_TYPE_REQ_RESP;
> + req.hdr.opcode = UC_UCSI_READ_BUF_REQ;
> +
> + mutex_lock(&ucsi->lock);
> + memset(ucsi->read_buf, 0, sizeof(ucsi->read_buf));
> + reinit_completion(&ucsi->read_ack);
> +
> + ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
> + if (ret < 0) {
> + dev_err(ucsi->dev, "failed to send UCSI read request: %d\n", ret);
> + goto out_unlock;
> + }
> +
> + left = wait_for_completion_timeout(&ucsi->read_ack, 5 * HZ);
> + if (!left) {
> + dev_err(ucsi->dev, "timeout waiting for UCSI read response\n");
> + ret = -ETIMEDOUT;
> + goto out_unlock;
> + }
> +
> + memcpy(val, &ucsi->read_buf[offset], val_len);
> + ret = 0;
> +
> +out_unlock:
> + mutex_unlock(&ucsi->lock);
> +
> + return ret;
> +}
> +
> +static int pmic_glink_ucsi_locked_write(struct pmic_glink_ucsi *ucsi, unsigned int offset,
> + const void *val, size_t val_len)
> +{
> + struct ucsi_write_buf_req_msg req = {};
> + unsigned long left;
> + int ret;
> +
> + req.hdr.owner = PMIC_GLINK_OWNER_USBC;
> + req.hdr.type = MSG_TYPE_REQ_RESP;
> + req.hdr.opcode = UC_UCSI_WRITE_BUF_REQ;
> + memcpy(&req.buf[offset], val, val_len);
> +
> + reinit_completion(&ucsi->write_ack);
> +
> + ret = pmic_glink_send(ucsi->client, &req, sizeof(req));
> + if (ret < 0) {
> + dev_err(ucsi->dev, "failed to send UCSI write request: %d\n", ret);
> + return ret;
> + }
> +
> + left = wait_for_completion_timeout(&ucsi->write_ack, 5 * HZ);
> + if (!left) {
> + dev_err(ucsi->dev, "timeout waiting for UCSI write response\n");
> + return -ETIMEDOUT;
> + }
> +
> + return 0;
> +}
> +
> +static int pmic_glink_ucsi_async_write(struct ucsi *__ucsi, unsigned int offset,
> + const void *val, size_t val_len)
> +{
> + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
> + int ret;
> +
> + mutex_lock(&ucsi->lock);
> + ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
> + mutex_unlock(&ucsi->lock);
> +
> + return ret;
> +}
> +
> +static int pmic_glink_ucsi_sync_write(struct ucsi *__ucsi, unsigned int offset,
> + const void *val, size_t val_len)
> +{
> + struct pmic_glink_ucsi *ucsi = ucsi_get_drvdata(__ucsi);
> + unsigned long left;
> + int ret;
> +
> + /* TOFIX: Downstream forces recipient to CON when UCSI_GET_ALTERNATE_MODES command */
> +
> + mutex_lock(&ucsi->lock);
> + ucsi->sync_val = 0;
> + reinit_completion(&ucsi->sync_ack);
> + ucsi->sync_pending = true;
> + ret = pmic_glink_ucsi_locked_write(ucsi, offset, val, val_len);
> + mutex_unlock(&ucsi->lock);
> +
> + left = wait_for_completion_timeout(&ucsi->sync_ack, 5 * HZ);
> + if (!left) {
> + dev_err(ucsi->dev, "timeout waiting for UCSI sync write response\n");
> + ret = -ETIMEDOUT;
> + } else if (ucsi->sync_val) {
> + dev_err(ucsi->dev, "sync write returned: %d\n", ucsi->sync_val);
> + }
> +
> + ucsi->sync_pending = false;
> +
> + return ret;
> +}
> +
> +static const struct ucsi_operations pmic_glink_ucsi_ops = {
> + .read = pmic_glink_ucsi_read,
> + .sync_write = pmic_glink_ucsi_sync_write,
> + .async_write = pmic_glink_ucsi_async_write
> +};
> +
> +static void pmic_glink_ucsi_read_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
> +{
> + const struct ucsi_read_buf_resp_msg *resp = data;
> +
> + if (resp->ret_code)
> + return;
> +
> + memcpy(ucsi->read_buf, resp->buf, UCSI_BUF_SIZE);
> + complete(&ucsi->read_ack);
> +}
> +
> +static void pmic_glink_ucsi_write_ack(struct pmic_glink_ucsi *ucsi, const void *data, int len)
> +{
> + const struct ucsi_write_buf_resp_msg *resp = data;
> +
> + if (resp->ret_code)
> + return;
> +
> + ucsi->sync_val = resp->ret_code;
> + complete(&ucsi->write_ack);
> +}
> +
> +static void pmic_glink_ucsi_notify(struct work_struct *work)
> +{
> + struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, notify_work);
> + unsigned int con_num;
> + u32 cci;
> + int ret;
> +
> + ret = pmic_glink_ucsi_read(ucsi->ucsi, UCSI_CCI, &cci, sizeof(cci));
> + if (ret) {
> + dev_err(ucsi->dev, "failed to read CCI on notification\n");
> + return;
> + }
> +
> + con_num = UCSI_CCI_CONNECTOR(cci);
> + if (con_num)
> + ucsi_connector_change(ucsi->ucsi, con_num);
> +
> + if (ucsi->sync_pending && cci & UCSI_CCI_BUSY) {
> + ucsi->sync_val = -EBUSY;
> + complete(&ucsi->sync_ack);
> + } else if (ucsi->sync_pending &&
> + (cci & (UCSI_CCI_ACK_COMPLETE | UCSI_CCI_COMMAND_COMPLETE))) {
> + complete(&ucsi->sync_ack);
> + }
> +}
> +
> +static void pmic_glink_ucsi_register(struct work_struct *work)
> +{
> + struct pmic_glink_ucsi *ucsi = container_of(work, struct pmic_glink_ucsi, register_work);
> +
> + ucsi_register(ucsi->ucsi);
> +}
> +
> +static void pmic_glink_ucsi_callback(const void *data, size_t len, void *priv)
> +{
> + struct pmic_glink_ucsi *ucsi = priv;
> + const struct pmic_glink_hdr *hdr = data;
> +
> + switch (hdr->opcode) {
> + case UC_UCSI_READ_BUF_REQ:
> + pmic_glink_ucsi_read_ack(ucsi, data, len);
> + break;
> + case UC_UCSI_WRITE_BUF_REQ:
> + pmic_glink_ucsi_write_ack(ucsi, data, len);
> + break;
> + case UC_UCSI_USBC_NOTIFY_IND:
> + schedule_work(&ucsi->notify_work);
> + break;
> + };
> +}
> +
> +static void pmic_glink_ucsi_pdr_notify(void *priv, int state)
> +{
> + struct pmic_glink_ucsi *ucsi = priv;
> +
> + if (state == SERVREG_SERVICE_STATE_UP)
> + schedule_work(&ucsi->register_work);
> + else if (state == SERVREG_SERVICE_STATE_DOWN)
> + ucsi_unregister(ucsi->ucsi);
> +}
> +
> +static void pmic_glink_ucsi_destroy(void *data)
> +{
> + struct pmic_glink_ucsi *ucsi = data;
> +
> + /* Protect to make sure we're not in a middle of a transaction from a glink callback */
> + mutex_lock(&ucsi->lock);
> + ucsi_destroy(ucsi->ucsi);
> + mutex_unlock(&ucsi->lock);
> +}
> +
> +static int pmic_glink_ucsi_probe(struct auxiliary_device *adev,
> + const struct auxiliary_device_id *id)
> +{
> + struct pmic_glink_ucsi *ucsi;
> + struct device *dev = &adev->dev;
> + int ret;
> +
> + ucsi = devm_kzalloc(dev, sizeof(*ucsi), GFP_KERNEL);
> + if (!ucsi)
> + return -ENOMEM;
> +
> + ucsi->dev = dev;
> + dev_set_drvdata(dev, ucsi);
> +
> + INIT_WORK(&ucsi->notify_work, pmic_glink_ucsi_notify);
> + INIT_WORK(&ucsi->register_work, pmic_glink_ucsi_register);
> + init_completion(&ucsi->read_ack);
> + init_completion(&ucsi->write_ack);
> + init_completion(&ucsi->sync_ack);
> + mutex_init(&ucsi->lock);
> +
> + ucsi->ucsi = ucsi_create(dev, &pmic_glink_ucsi_ops);
> + if (IS_ERR(ucsi->ucsi))
> + return PTR_ERR(ucsi->ucsi);
> +
> + /* Make sure we destroy *after* pmic_glink unregister */
> + ret = devm_add_action_or_reset(dev, pmic_glink_ucsi_destroy, ucsi);
> + if (ret)
> + return ret;
> +
> + ucsi_set_drvdata(ucsi->ucsi, ucsi);
> +
> + ucsi->client = devm_pmic_glink_register_client(dev,
> + PMIC_GLINK_OWNER_USBC,
> + pmic_glink_ucsi_callback,
> + pmic_glink_ucsi_pdr_notify,
> + ucsi);
> + return PTR_ERR_OR_ZERO(ucsi->client);
> +}
> +
> +static void pmic_glink_ucsi_remove(struct auxiliary_device *adev)
> +{
> + struct pmic_glink_ucsi *ucsi = dev_get_drvdata(&adev->dev);
> +
> + /* Unregister first to stop having read & writes */
> + ucsi_unregister(ucsi->ucsi);
> +}
> +
> +static const struct auxiliary_device_id pmic_glink_ucsi_id_table[] = {
> + { .name = "pmic_glink.ucsi", },
> + {},
> +};
> +MODULE_DEVICE_TABLE(auxiliary, pmic_glink_ucsi_id_table);
> +
> +static struct auxiliary_driver pmic_glink_ucsi_driver = {
> + .name = "pmic_glink_ucsi",
> + .probe = pmic_glink_ucsi_probe,
> + .remove = pmic_glink_ucsi_remove,
> + .id_table = pmic_glink_ucsi_id_table,
> +};
> +
> +module_auxiliary_driver(pmic_glink_ucsi_driver);
> +
> +MODULE_DESCRIPTION("Qualcomm PMIC GLINK UCSI driver");
> +MODULE_LICENSE("GPL");
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver
2023-03-22 2:31 ` Bjorn Andersson
@ 2023-03-23 16:33 ` Greg Kroah-Hartman
0 siblings, 0 replies; 19+ messages in thread
From: Greg Kroah-Hartman @ 2023-03-23 16:33 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Neil Armstrong, Heikki Krogerus, Andy Gross, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel
On Tue, Mar 21, 2023 at 07:31:02PM -0700, Bjorn Andersson wrote:
> On Tue, Mar 21, 2023 at 02:21:41PM +0100, Neil Armstrong wrote:
> > Introduce the UCSI PMIC Glink aux driver that communicates
> > with the aDSP firmware with the UCSI protocol which handles
> > the USB-C Port(s) Power Delivery.
> >
> > The UCSI messaging is necessary on newer Qualcomm SoCs to
> > provide USB role switch and altmode notifications.
> >
> > Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
> > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
>
> Reviewed-by: Bjorn Andersson <andersson@kernel.org>
>
>
> Greg, this has no build time dependencies to the remainder of the
> series, so can you pick this patch 1 and patch 5 (dt-bindings: usb:
> snps,dwc3: document HS & SS OF graph ports) through your tree?
Yes, will do so, thanks!
greg k-h
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 02/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 03/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible Neil Armstrong
` (10 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong, Rob Herring
Document the SM8450 compatible used to describe the pmic glink
on this platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index cf863683c21a..a85bc14de065 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -25,6 +25,7 @@ properties:
- qcom,sc8180x-pmic-glink
- qcom,sc8280xp-pmic-glink
- qcom,sm8350-pmic-glink
+ - qcom,sm8450-pmic-glink
- const: qcom,pmic-glink
'#address-cells':
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 03/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 01/12] usb: typec: ucsi: add PMIC Glink UCSI driver Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 02/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 04/12] soc: qcom: pmic_glink: register ucsi aux device Neil Armstrong
` (9 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong, Rob Herring
Document the SM8550 compatible used to describe the pmic glink
on this platform.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
index a85bc14de065..6440dc801387 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml
@@ -26,6 +26,7 @@ properties:
- qcom,sc8280xp-pmic-glink
- qcom,sm8350-pmic-glink
- qcom,sm8450-pmic-glink
+ - qcom,sm8550-pmic-glink
- const: qcom,pmic-glink
'#address-cells':
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 04/12] soc: qcom: pmic_glink: register ucsi aux device
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (2 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 03/12] dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 15:38 ` Dmitry Baryshkov
2023-03-21 13:21 ` [PATCH v5 05/12] dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports Neil Armstrong
` (8 subsequent siblings)
12 siblings, 1 reply; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Only register UCSI on know working devices, like on the SM8450
or SM8550 which requires UCSI to get USB mode switch events.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/soc/qcom/pmic_glink.c | 65 +++++++++++++++++++++++++++++++++++--------
1 file changed, 54 insertions(+), 11 deletions(-)
diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c
index bb3fb57abcc6..8bf95df0a56a 100644
--- a/drivers/soc/qcom/pmic_glink.c
+++ b/drivers/soc/qcom/pmic_glink.c
@@ -4,6 +4,7 @@
* Copyright (c) 2022, Linaro Ltd
*/
#include <linux/auxiliary_bus.h>
+#include <linux/of_device.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/rpmsg.h>
@@ -11,12 +12,23 @@
#include <linux/soc/qcom/pdr.h>
#include <linux/soc/qcom/pmic_glink.h>
+enum {
+ PMIC_GLINK_CLIENT_BATT = 0,
+ PMIC_GLINK_CLIENT_ALTMODE,
+ PMIC_GLINK_CLIENT_UCSI,
+};
+
+#define PMIC_GLINK_CLIENT_DEFAULT (BIT(PMIC_GLINK_CLIENT_BATT) | \
+ BIT(PMIC_GLINK_CLIENT_ALTMODE))
+
struct pmic_glink {
struct device *dev;
struct pdr_handle *pdr;
struct rpmsg_endpoint *ept;
+ unsigned long client_mask;
+
struct auxiliary_device altmode_aux;
struct auxiliary_device ps_aux;
struct auxiliary_device ucsi_aux;
@@ -233,6 +245,7 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = {
static int pmic_glink_probe(struct platform_device *pdev)
{
+ const unsigned long *match_data;
struct pdr_service *service;
struct pmic_glink *pg;
int ret;
@@ -249,12 +262,27 @@ static int pmic_glink_probe(struct platform_device *pdev)
mutex_init(&pg->client_lock);
mutex_init(&pg->state_lock);
- ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
- if (ret)
- return ret;
- ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
- if (ret)
- goto out_release_altmode_aux;
+ match_data = (unsigned long *)of_device_get_match_data(&pdev->dev);
+ if (match_data)
+ pg->client_mask = *match_data;
+ else
+ pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT;
+
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) {
+ ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi");
+ if (ret)
+ return ret;
+ }
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) {
+ ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
+ if (ret)
+ goto out_release_ucsi_aux;
+ }
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) {
+ ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
+ if (ret)
+ goto out_release_altmode_aux;
+ }
pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg);
if (IS_ERR(pg->pdr)) {
@@ -278,9 +306,14 @@ static int pmic_glink_probe(struct platform_device *pdev)
out_release_pdr_handle:
pdr_handle_release(pg->pdr);
out_release_aux_devices:
- pmic_glink_del_aux_device(pg, &pg->ps_aux);
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+ pmic_glink_del_aux_device(pg, &pg->ps_aux);
out_release_altmode_aux:
- pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+ pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+out_release_ucsi_aux:
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+ pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
return ret;
}
@@ -291,8 +324,12 @@ static int pmic_glink_remove(struct platform_device *pdev)
pdr_handle_release(pg->pdr);
- pmic_glink_del_aux_device(pg, &pg->ps_aux);
- pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
+ pmic_glink_del_aux_device(pg, &pg->ps_aux);
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
+ pmic_glink_del_aux_device(pg, &pg->altmode_aux);
+ if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
+ pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
mutex_lock(&__pmic_glink_lock);
__pmic_glink = NULL;
@@ -301,8 +338,14 @@ static int pmic_glink_remove(struct platform_device *pdev)
return 0;
}
+/* Do not handle altmode for now on those platforms */
+static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
+ BIT(PMIC_GLINK_CLIENT_UCSI);
+
static const struct of_device_id pmic_glink_of_match[] = {
- { .compatible = "qcom,pmic-glink", },
+ { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+ { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
+ { .compatible = "qcom,pmic-glink" },
{}
};
MODULE_DEVICE_TABLE(of, pmic_glink_of_match);
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v5 04/12] soc: qcom: pmic_glink: register ucsi aux device
2023-03-21 13:21 ` [PATCH v5 04/12] soc: qcom: pmic_glink: register ucsi aux device Neil Armstrong
@ 2023-03-21 15:38 ` Dmitry Baryshkov
0 siblings, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-03-21 15:38 UTC (permalink / raw)
To: Neil Armstrong, Heikki Krogerus, Greg Kroah-Hartman, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Catalin Marinas, Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree, linux-arm-kernel
On 21/03/2023 15:21, Neil Armstrong wrote:
> Only register UCSI on know working devices, like on the SM8450
> or SM8550 which requires UCSI to get USB mode switch events.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Two nits below:
> ---
> drivers/soc/qcom/pmic_glink.c | 65 +++++++++++++++++++++++++++++++++++--------
> 1 file changed, 54 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/soc/qcom/pmic_glink.c b/drivers/soc/qcom/pmic_glink.c
> index bb3fb57abcc6..8bf95df0a56a 100644
> --- a/drivers/soc/qcom/pmic_glink.c
> +++ b/drivers/soc/qcom/pmic_glink.c
> @@ -4,6 +4,7 @@
> * Copyright (c) 2022, Linaro Ltd
> */
> #include <linux/auxiliary_bus.h>
> +#include <linux/of_device.h>
> #include <linux/module.h>
> #include <linux/platform_device.h>
> #include <linux/rpmsg.h>
> @@ -11,12 +12,23 @@
> #include <linux/soc/qcom/pdr.h>
> #include <linux/soc/qcom/pmic_glink.h>
>
> +enum {
> + PMIC_GLINK_CLIENT_BATT = 0,
> + PMIC_GLINK_CLIENT_ALTMODE,
> + PMIC_GLINK_CLIENT_UCSI,
> +};
> +
> +#define PMIC_GLINK_CLIENT_DEFAULT (BIT(PMIC_GLINK_CLIENT_BATT) | \
> + BIT(PMIC_GLINK_CLIENT_ALTMODE))
> +
> struct pmic_glink {
> struct device *dev;
> struct pdr_handle *pdr;
>
> struct rpmsg_endpoint *ept;
>
> + unsigned long client_mask;
> +
> struct auxiliary_device altmode_aux;
> struct auxiliary_device ps_aux;
> struct auxiliary_device ucsi_aux;
> @@ -233,6 +245,7 @@ static struct rpmsg_driver pmic_glink_rpmsg_driver = {
>
> static int pmic_glink_probe(struct platform_device *pdev)
> {
> + const unsigned long *match_data;
> struct pdr_service *service;
> struct pmic_glink *pg;
> int ret;
> @@ -249,12 +262,27 @@ static int pmic_glink_probe(struct platform_device *pdev)
> mutex_init(&pg->client_lock);
> mutex_init(&pg->state_lock);
>
> - ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
> - if (ret)
> - return ret;
> - ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
> - if (ret)
> - goto out_release_altmode_aux;
> + match_data = (unsigned long *)of_device_get_match_data(&pdev->dev);
Nit: type cast should not be necessary here.
> + if (match_data)
> + pg->client_mask = *match_data;
> + else
> + pg->client_mask = PMIC_GLINK_CLIENT_DEFAULT;
> +
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI)) {
> + ret = pmic_glink_add_aux_device(pg, &pg->ucsi_aux, "ucsi");
> + if (ret)
> + return ret;
> + }
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE)) {
> + ret = pmic_glink_add_aux_device(pg, &pg->altmode_aux, "altmode");
> + if (ret)
> + goto out_release_ucsi_aux;
> + }
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT)) {
> + ret = pmic_glink_add_aux_device(pg, &pg->ps_aux, "power-supply");
> + if (ret)
> + goto out_release_altmode_aux;
> + }
>
> pg->pdr = pdr_handle_alloc(pmic_glink_pdr_callback, pg);
> if (IS_ERR(pg->pdr)) {
> @@ -278,9 +306,14 @@ static int pmic_glink_probe(struct platform_device *pdev)
> out_release_pdr_handle:
> pdr_handle_release(pg->pdr);
> out_release_aux_devices:
> - pmic_glink_del_aux_device(pg, &pg->ps_aux);
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
> + pmic_glink_del_aux_device(pg, &pg->ps_aux);
> out_release_altmode_aux:
> - pmic_glink_del_aux_device(pg, &pg->altmode_aux);
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
> + pmic_glink_del_aux_device(pg, &pg->altmode_aux);
> +out_release_ucsi_aux:
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
> + pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
>
> return ret;
> }
> @@ -291,8 +324,12 @@ static int pmic_glink_remove(struct platform_device *pdev)
>
> pdr_handle_release(pg->pdr);
>
> - pmic_glink_del_aux_device(pg, &pg->ps_aux);
> - pmic_glink_del_aux_device(pg, &pg->altmode_aux);
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_BATT))
> + pmic_glink_del_aux_device(pg, &pg->ps_aux);
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_ALTMODE))
> + pmic_glink_del_aux_device(pg, &pg->altmode_aux);
> + if (pg->client_mask & BIT(PMIC_GLINK_CLIENT_UCSI))
> + pmic_glink_del_aux_device(pg, &pg->ucsi_aux);
>
> mutex_lock(&__pmic_glink_lock);
> __pmic_glink = NULL;
> @@ -301,8 +338,14 @@ static int pmic_glink_remove(struct platform_device *pdev)
> return 0;
> }
>
> +/* Do not handle altmode for now on those platforms */
> +static const unsigned long pmic_glink_sm8450_client_mask = BIT(PMIC_GLINK_CLIENT_BATT) |
> + BIT(PMIC_GLINK_CLIENT_UCSI);
> +
> static const struct of_device_id pmic_glink_of_match[] = {
> - { .compatible = "qcom,pmic-glink", },
Nit: one can leave comma in place to remove noise.
> + { .compatible = "qcom,sm8450-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
> + { .compatible = "qcom,sm8550-pmic-glink", .data = &pmic_glink_sm8450_client_mask },
> + { .compatible = "qcom,pmic-glink" },
> {}
> };
> MODULE_DEVICE_TABLE(of, pmic_glink_of_match);
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 05/12] dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (3 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 04/12] soc: qcom: pmic_glink: register ucsi aux device Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 06/12] arm64: dts: qcom: sm8350: add port subnodes in dwc3 node Neil Armstrong
` (7 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong, Rob Herring
Document the optional ports subnode to describe the High-Speed
and Super-Speed connections as separate OF graph links.
The ports property is an alternative to the already documented
single port subnode property.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
Documentation/devicetree/bindings/usb/snps,dwc3.yaml | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
index 16c7d06c9172..cce74c59bf0e 100644
--- a/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/snps,dwc3.yaml
@@ -379,6 +379,22 @@ properties:
This port is used with the 'usb-role-switch' property to connect the
dwc3 to type C connector.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description:
+ Those ports should be used with any connector to the data bus of this
+ controller using the OF graph bindings specified if the "usb-role-switch"
+ property is used.
+
+ properties:
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: High Speed (HS) data bus.
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: Super Speed (SS) data bus.
+
wakeup-source:
$ref: /schemas/types.yaml#/definitions/flag
description:
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 06/12] arm64: dts: qcom: sm8350: add port subnodes in dwc3 node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (4 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 05/12] dt-bindings: usb: snps,dwc3: document HS & SS OF graph ports Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 07/12] arm64: dts: qcom: sm8450: " Neil Armstrong
` (6 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add ports subnodes in dwc3 node to avoid repeating the
same description in each board DT.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index 1afc4311796e..6c3a82c63585 100644
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -2270,6 +2270,25 @@ usb_1_dwc3: usb@a600000 {
snps,dis_enblslpm_quirk;
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss: endpoint {
+ };
+ };
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 07/12] arm64: dts: qcom: sm8450: add port subnodes in dwc3 node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (5 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 06/12] arm64: dts: qcom: sm8350: add port subnodes in dwc3 node Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 08/12] arm64: dts: qcom: sm8550: " Neil Armstrong
` (5 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add ports subnodes in dwc3 node to avoid repeating the
same description in each board DT.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 69695eb83897..d92d49a1ca2c 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -4170,6 +4170,25 @@ usb_1_dwc3: usb@a600000 {
snps,dis_enblslpm_quirk;
phys = <&usb_1_hsphy>, <&usb_1_ssphy>;
phy-names = "usb2-phy", "usb3-phy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss: endpoint {
+ };
+ };
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 08/12] arm64: dts: qcom: sm8550: add port subnodes in dwc3 node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (6 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 07/12] arm64: dts: qcom: sm8450: " Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node Neil Armstrong
` (4 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add ports subnodes in dwc3 node to avoid repeating the
same description in each board DT.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 6af4079c9a35..da32f6bc34ab 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2460,6 +2460,25 @@ usb_1_dwc3: usb@a600000 {
phys = <&usb_1_hsphy>,
<&usb_dp_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ usb_1_dwc3_hs: endpoint {
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ usb_1_dwc3_ss: endpoint {
+ };
+ };
+ };
};
};
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (7 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 08/12] arm64: dts: qcom: sm8550: " Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 14:26 ` Konrad Dybcio
2023-03-21 15:38 ` Dmitry Baryshkov
2023-03-21 13:21 ` [PATCH v5 10/12] arm64: dts: qcom: sm8450-hdk: " Neil Armstrong
` (3 subsequent siblings)
12 siblings, 2 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 46 +++++++++++++++++++++++++++++++--
1 file changed, 44 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 09baf6959c71..a10bf7c8764f 100644
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -31,6 +31,40 @@ hdmi_con: endpoint {
};
};
+ pmic-glink {
+ compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
+ };
+ };
+ };
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@@ -674,8 +708,16 @@ &usb_1 {
};
&usb_1_dwc3 {
- /* TODO: Define USB-C connector properly */
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in>;
+};
+
+&usb_1_dwc3_ss {
+ remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node
2023-03-21 13:21 ` [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node Neil Armstrong
@ 2023-03-21 14:26 ` Konrad Dybcio
2023-03-21 15:38 ` Dmitry Baryshkov
1 sibling, 0 replies; 19+ messages in thread
From: Konrad Dybcio @ 2023-03-21 14:26 UTC (permalink / raw)
To: Neil Armstrong, Heikki Krogerus, Greg Kroah-Hartman, Andy Gross,
Bjorn Andersson, Rob Herring, Krzysztof Kozlowski,
Catalin Marinas, Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree, linux-arm-kernel
On 21.03.2023 14:21, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 46 +++++++++++++++++++++++++++++++--
> 1 file changed, 44 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
> index 09baf6959c71..a10bf7c8764f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
> +++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
> @@ -31,6 +31,40 @@ hdmi_con: endpoint {
> };
> };
>
> + pmic-glink {
> + compatible = "qcom,sm8350-pmic-glink", "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + pmic_glink_hs_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_hs>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + pmic_glink_ss_in: endpoint {
> + remote-endpoint = <&usb_1_dwc3_ss>;
> + };
> + };
> + };
> + };
> + };
> +
> vph_pwr: vph-pwr-regulator {
> compatible = "regulator-fixed";
> regulator-name = "vph_pwr";
> @@ -674,8 +708,16 @@ &usb_1 {
> };
>
> &usb_1_dwc3 {
> - /* TODO: Define USB-C connector properly */
> - dr_mode = "peripheral";
> + dr_mode = "otg";
> + usb-role-switch;
> +};
> +
> +&usb_1_dwc3_hs {
> + remote-endpoint = <&pmic_glink_hs_in>;
> +};
> +
> +&usb_1_dwc3_ss {
> + remote-endpoint = <&pmic_glink_ss_in>;
> };
>
> &usb_1_hsphy {
>
^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node
2023-03-21 13:21 ` [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node Neil Armstrong
2023-03-21 14:26 ` Konrad Dybcio
@ 2023-03-21 15:38 ` Dmitry Baryshkov
1 sibling, 0 replies; 19+ messages in thread
From: Dmitry Baryshkov @ 2023-03-21 15:38 UTC (permalink / raw)
To: Neil Armstrong, Heikki Krogerus, Greg Kroah-Hartman, Andy Gross,
Bjorn Andersson, Konrad Dybcio, Rob Herring, Krzysztof Kozlowski,
Catalin Marinas, Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree, linux-arm-kernel
On 21/03/2023 15:21, Neil Armstrong wrote:
> Add the pmic glink node linked with the DWC3 USB controller
> switched to OTG mode and tagged with usb-role-switch.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 46 +++++++++++++++++++++++++++++++--
> 1 file changed, 44 insertions(+), 2 deletions(-)
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 19+ messages in thread
* [PATCH v5 10/12] arm64: dts: qcom: sm8450-hdk: add pmic glink node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (8 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 09/12] arm64: dts: qcom: sm8350-hdk: add pmic glink node Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 11/12] arm64: dts: qcom: sm8550-mtp: " Neil Armstrong
` (2 subsequent siblings)
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 45 ++++++++++++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
index feef3837e4cd..1755ee3aa04c 100644
--- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
@@ -87,6 +87,40 @@ lt9611_3v3: lt9611-3v3-regulator {
enable-active-high;
};
+ pmic-glink {
+ compatible = "qcom,sm8450-pmic-glink", "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
+ };
+ };
+ };
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@@ -724,7 +758,16 @@ &usb_1 {
};
&usb_1_dwc3 {
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in>;
+};
+
+&usb_1_dwc3_ss {
+ remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 11/12] arm64: dts: qcom: sm8550-mtp: add pmic glink node
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (9 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 10/12] arm64: dts: qcom: sm8450-hdk: " Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-21 13:21 ` [PATCH v5 12/12] arm64: defconfig: add PMIC GLINK modules Neil Armstrong
2023-03-22 14:45 ` (subset) [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Bjorn Andersson
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Add the pmic glink node linked with the DWC3 USB controller
switched to OTG mode and tagged with usb-role-switch.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/boot/dts/qcom/sm8550-mtp.dts | 45 ++++++++++++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
index 9d4ddb883a70..e2b9bb6b1e27 100644
--- a/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
+++ b/arch/arm64/boot/dts/qcom/sm8550-mtp.dts
@@ -27,6 +27,40 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ pmic-glink {
+ compatible = "qcom,sm8550-pmic-glink", "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_hs_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss_in: endpoint {
+ remote-endpoint = <&usb_1_dwc3_ss>;
+ };
+ };
+ };
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
regulator-name = "vph_pwr";
@@ -561,7 +595,16 @@ &usb_1 {
};
&usb_1_dwc3 {
- dr_mode = "peripheral";
+ dr_mode = "otg";
+ usb-role-switch;
+};
+
+&usb_1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_hs_in>;
+};
+
+&usb_1_dwc3_ss {
+ remote-endpoint = <&pmic_glink_ss_in>;
};
&usb_1_hsphy {
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* [PATCH v5 12/12] arm64: defconfig: add PMIC GLINK modules
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (10 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 11/12] arm64: dts: qcom: sm8550-mtp: " Neil Armstrong
@ 2023-03-21 13:21 ` Neil Armstrong
2023-03-22 14:45 ` (subset) [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Bjorn Andersson
12 siblings, 0 replies; 19+ messages in thread
From: Neil Armstrong @ 2023-03-21 13:21 UTC (permalink / raw)
To: Heikki Krogerus, Greg Kroah-Hartman, Andy Gross, Bjorn Andersson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Catalin Marinas,
Will Deacon
Cc: linux-kernel, linux-usb, linux-arm-msm, devicetree,
linux-arm-kernel, Neil Armstrong
Enable the PMIC GLINK core, altmode, battery and UCSI
aux drivers as module to enable USB Type-C management
over the PMIC GLINK protocol on modern Qcom platforms.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
arch/arm64/configs/defconfig | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 3a6d995384d9..d849fa2ca852 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -273,6 +273,10 @@ CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_NVME=m
CONFIG_QCOM_COINCELL=m
CONFIG_QCOM_FASTRPC=m
+CONFIG_BATTERY_QCOM_BATTMGR=m
+CONFIG_QCOM_PMIC_GLINK=m
+CONFIG_TYPEC_UCSI=m
+CONFIG_UCSI_PMIC_GLINK=m
CONFIG_SRAM=y
CONFIG_PCI_ENDPOINT_TEST=m
CONFIG_EEPROM_AT24=m
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: (subset) [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK
2023-03-21 13:21 [PATCH v5 00/12] soc: qcom: add UCSI function to PMIC GLINK Neil Armstrong
` (11 preceding siblings ...)
2023-03-21 13:21 ` [PATCH v5 12/12] arm64: defconfig: add PMIC GLINK modules Neil Armstrong
@ 2023-03-22 14:45 ` Bjorn Andersson
12 siblings, 0 replies; 19+ messages in thread
From: Bjorn Andersson @ 2023-03-22 14:45 UTC (permalink / raw)
To: Catalin Marinas, Heikki Krogerus, Greg Kroah-Hartman,
Neil Armstrong, Will Deacon, Krzysztof Kozlowski, Andy Gross,
Konrad Dybcio, Rob Herring
Cc: linux-arm-kernel, devicetree, Rob Herring, linux-kernel,
linux-arm-msm, linux-usb
On Tue, 21 Mar 2023 14:21:40 +0100, Neil Armstrong wrote:
> The PMIC GLINK interface offers an UCSI endpoint for newer
> SoCs, the UCSI exchange is necessary to configure the USB-C
> port USB role and altmode on the SM8450 HDK and SM8550 MTP
> boards.
> Since the DT description is the same, support for SM8350 HDK
> is also added.
>
> [...]
Applied, thanks!
[12/12] arm64: defconfig: add PMIC GLINK modules
commit: 4ffd0b0019560a52b46b9ebd8127be3fdc157f16
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 19+ messages in thread