* [PATCH 2/7] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 15:47 ` Stephan Gerhold
2023-02-01 15:30 ` [PATCH 3/7] dt-bindings: pinctrl: qcom,sm6375: " Krzysztof Kozlowski
` (4 subsequent siblings)
5 siblings, 1 reply; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
and gpio-ranges in the example.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
index 449e6e34be61..85082adc1811 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
qdsd_data2, qdsd_data3 ]
@@ -127,7 +127,7 @@ examples:
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 117>;
+ gpio-ranges = <&tlmm 0 0 113>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/7] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example
2023-02-01 15:30 ` [PATCH 2/7] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example Krzysztof Kozlowski
@ 2023-02-01 15:47 ` Stephan Gerhold
0 siblings, 0 replies; 12+ messages in thread
From: Stephan Gerhold @ 2023-02-01 15:47 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Richard Acayan, Vinod Koul,
krishna Lanka, Iskren Chernev, Martin Botka, Abel Vesa,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
On Wed, Feb 01, 2023 at 04:30:14PM +0100, Krzysztof Kozlowski wrote:
> The MSM8909 TLMM pin controller has GPIOs 0-112, so narrow the pattern
> and gpio-ranges in the example.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Not sure if people care about Fixes tags for DT schema but this patch
definitely
Fixes: c249ec7ba1b1 ("dt-bindings: pinctrl: Add DT schema for qcom,msm8909-tlmm")
I have no idea what I was thinking when I used 117 instead of 113...
Thanks a lot for finding and fixing this!
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
> ---
> .../devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> index 449e6e34be61..85082adc1811 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8909-tlmm.yaml
> @@ -63,7 +63,7 @@ $defs:
> subnode.
> items:
> oneOf:
> - - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-7])$"
> + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
> - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
> sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0, qdsd_data1,
> qdsd_data2, qdsd_data3 ]
> @@ -127,7 +127,7 @@ examples:
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> #gpio-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 117>;
> + gpio-ranges = <&tlmm 0 0 113>;
> interrupt-controller;
> #interrupt-cells = <2>;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/7] dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 2/7] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 4/7] dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern Krzysztof Kozlowski
` (3 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
The SM6375 TLMM pin controller has GPIOs 0-155, so narrow the pattern
and gpio-ranges in the example.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
index e4231d10d76f..75216fc7c8bd 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-6])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9]|15[0-5])$"
- enum: [ ufs_reset, sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk,
sdc2_cmd, sdc2_data ]
minItems: 1
@@ -134,7 +134,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 157>;
+ gpio-ranges = <&tlmm 0 0 156>;
gpio-wo-subnode-state {
pins = "gpio1";
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 4/7] dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 2/7] dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 3/7] dt-bindings: pinctrl: qcom,sm6375: " Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 5/7] dt-bindings: pinctrl: qcom,sdx55: " Krzysztof Kozlowski
` (2 subsequent siblings)
5 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
The MSM8953 TLMM pin controller has GPIOs 0-141, so narrow the pattern.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
index 6bcd52080801..ce219827ccc8 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8953-pinctrl.yaml
@@ -53,7 +53,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-7][0-9])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[01])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, qdsd_clk, qdsd_cmd, qdsd_data0,
qdsd_data1, qdsd_data2, qdsd_data3 ]
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 5/7] dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
` (2 preceding siblings ...)
2023-02-01 15:30 ` [PATCH 4/7] dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 6/7] dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples Krzysztof Kozlowski
5 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
index add3c7e64520..a40175258495 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
@@ -55,7 +55,7 @@ $defs:
List of gpio pins affected by the properties specified in this subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 6/7] dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
` (3 preceding siblings ...)
2023-02-01 15:30 ` [PATCH 5/7] dt-bindings: pinctrl: qcom,sdx55: " Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 15:30 ` [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples Krzysztof Kozlowski
5 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
The MSM8994 TLMM pin controller has GPIOs 0-145, so narrow the pattern
and reduce sizes of arrays with pins.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
index f4a8180f5959..0c4936fc35ef 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8994-pinctrl.yaml
@@ -34,10 +34,10 @@ properties:
gpio-reserved-ranges:
minItems: 1
- maxItems: 75
+ maxItems: 73
gpio-line-names:
- maxItems: 150
+ maxItems: 146
patternProperties:
"-state$":
@@ -63,7 +63,7 @@ $defs:
subnode.
items:
oneOf:
- - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-4][0-9])$"
+ - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-3][0-9]|14[0-5])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc1_rclk, sdc2_clk,
sdc2_cmd, sdc2_data, sdc3_clk, sdc3_cmd, sdc3_data ]
minItems: 1
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
2023-02-01 15:30 [PATCH 1/7] dt-bindings: pinctrl: qcom,msm8226: correct GPIO name pattern Krzysztof Kozlowski
` (4 preceding siblings ...)
2023-02-01 15:30 ` [PATCH 6/7] dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs Krzysztof Kozlowski
@ 2023-02-01 15:30 ` Krzysztof Kozlowski
2023-02-01 16:07 ` Stephan Gerhold
2023-02-02 10:39 ` Krzysztof Kozlowski
5 siblings, 2 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-01 15:30 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
Cc: Krzysztof Kozlowski
Correct the number of GPIOs in gpio-ranges to match reality.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +-
.../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +-
Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +-
11 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
index f33792a1af6c..77a5aaefddbe 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
@@ -138,7 +138,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 120>;
+ gpio-ranges = <&tlmm 0 0 119>;
wakeup-parent = <&pdc>;
dp_hot_plug_det: dp-hot-plug-det-state {
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
index 97b27d6835e9..854bbb5b6f5d 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
@@ -128,7 +128,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 230>;
+ gpio-ranges = <&tlmm 0 0 228>;
gpio-wo-subnode-state {
pins = "gpio1";
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
index f586b3aa138e..03c7b5c97599 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
@@ -119,7 +119,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 151>;
+ gpio-ranges = <&tlmm 0 0 150>;
qup-i2c9-state {
pins = "gpio6", "gpio7";
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
index 23d7c030fec0..a08e4557d8b7 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
@@ -134,7 +134,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 151>;
+ gpio-ranges = <&tlmm 0 0 150>;
wakeup-parent = <&pdc_intc>;
ap-suspend-l-hog {
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
index 89c5562583d1..96375f58fa22 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
@@ -140,7 +140,7 @@ examples:
reg = <0x03000000 0xdc2000>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 109>;
+ gpio-ranges = <&tlmm 0 0 108>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
index 29325483cd2b..d35db4f4581b 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
@@ -121,7 +121,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 114>;
+ gpio-ranges = <&tlmm 0 0 113>;
sdc2_on_state: sdc2-on-state {
clk-pins {
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
index c9bc4893e8e8..83848950cc3b 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
@@ -125,7 +125,7 @@ examples:
reg-names = "west", "south", "east";
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
- gpio-ranges = <&tlmm 0 0 134>;
+ gpio-ranges = <&tlmm 0 0 133>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
index d95935fcc8b5..3fe1f1668fbc 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
@@ -142,7 +142,7 @@ examples:
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
- gpio-ranges = <&tlmm 0 0 157>;
+ gpio-ranges = <&tlmm 0 0 156>;
gpio-wo-subnode-state {
pins = "gpio1";
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
index 4376a9bd4d70..4c9ad9079e69 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
@@ -136,7 +136,7 @@ examples:
<0x03d00000 0x300000>;
reg-names = "west", "east", "north", "south";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- gpio-ranges = <&tlmm 0 0 176>;
+ gpio-ranges = <&tlmm 0 0 175>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
index 56c8046f1be0..c4cec40cbb92 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
@@ -124,7 +124,7 @@ examples:
reg = <0x0f100000 0x300000>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 211>;
+ gpio-ranges = <&tlmm 0 0 210>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
index a457425ba112..6ecc1ad6ccd4 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
@@ -136,7 +136,7 @@ examples:
reg = <0x0f100000 0x300000>;
gpio-controller;
#gpio-cells = <2>;
- gpio-ranges = <&tlmm 0 0 211>;
+ gpio-ranges = <&tlmm 0 0 210>;
interrupt-controller;
#interrupt-cells = <2>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
2023-02-01 15:30 ` [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples Krzysztof Kozlowski
@ 2023-02-01 16:07 ` Stephan Gerhold
2023-02-01 16:31 ` Stephan Gerhold
2023-02-02 10:39 ` Krzysztof Kozlowski
1 sibling, 1 reply; 12+ messages in thread
From: Stephan Gerhold @ 2023-02-01 16:07 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Richard Acayan, Vinod Koul,
krishna Lanka, Iskren Chernev, Martin Botka, Abel Vesa,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in gpio-ranges to match reality.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in
the pinctrl drivers for all/most of the platforms you update below. It
looks like the special UFS_RESET pins are also exported as GPIOs in
addition to the real GPIOs. I'm not sure if this is intended or a
mistake.
In any case, the gpio-ranges should match the "ngpios" in the driver,
otherwise the driver exposes more GPIOs than advertised by the DT.
So I think the same change should be made in the driver as well if the
UFS pins are not supposed to be exposed as GPIOs.
Thanks,
Stephan
> ---
> .../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +-
> 11 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
> index f33792a1af6c..77a5aaefddbe 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml
> @@ -138,7 +138,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 120>;
> + gpio-ranges = <&tlmm 0 0 119>;
> wakeup-parent = <&pdc>;
>
> dp_hot_plug_det: dp-hot-plug-det-state {
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
> index 97b27d6835e9..854bbb5b6f5d 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml
> @@ -128,7 +128,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 230>;
> + gpio-ranges = <&tlmm 0 0 228>;
>
> gpio-wo-subnode-state {
> pins = "gpio1";
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
> index f586b3aa138e..03c7b5c97599 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml
> @@ -119,7 +119,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 151>;
> + gpio-ranges = <&tlmm 0 0 150>;
>
> qup-i2c9-state {
> pins = "gpio6", "gpio7";
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
> index 23d7c030fec0..a08e4557d8b7 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml
> @@ -134,7 +134,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 151>;
> + gpio-ranges = <&tlmm 0 0 150>;
> wakeup-parent = <&pdc_intc>;
>
> ap-suspend-l-hog {
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
> index 89c5562583d1..96375f58fa22 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml
> @@ -140,7 +140,7 @@ examples:
> reg = <0x03000000 0xdc2000>;
> gpio-controller;
> #gpio-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 109>;
> + gpio-ranges = <&tlmm 0 0 108>;
> interrupt-controller;
> #interrupt-cells = <2>;
> interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
> index 29325483cd2b..d35db4f4581b 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml
> @@ -121,7 +121,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 114>;
> + gpio-ranges = <&tlmm 0 0 113>;
>
> sdc2_on_state: sdc2-on-state {
> clk-pins {
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
> index c9bc4893e8e8..83848950cc3b 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml
> @@ -125,7 +125,7 @@ examples:
> reg-names = "west", "south", "east";
> interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
> gpio-controller;
> - gpio-ranges = <&tlmm 0 0 134>;
> + gpio-ranges = <&tlmm 0 0 133>;
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
> index d95935fcc8b5..3fe1f1668fbc 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml
> @@ -142,7 +142,7 @@ examples:
> #gpio-cells = <2>;
> interrupt-controller;
> #interrupt-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 157>;
> + gpio-ranges = <&tlmm 0 0 156>;
>
> gpio-wo-subnode-state {
> pins = "gpio1";
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
> index 4376a9bd4d70..4c9ad9079e69 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml
> @@ -136,7 +136,7 @@ examples:
> <0x03d00000 0x300000>;
> reg-names = "west", "east", "north", "south";
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> - gpio-ranges = <&tlmm 0 0 176>;
> + gpio-ranges = <&tlmm 0 0 175>;
> gpio-controller;
> #gpio-cells = <2>;
> interrupt-controller;
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
> index 56c8046f1be0..c4cec40cbb92 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml
> @@ -124,7 +124,7 @@ examples:
> reg = <0x0f100000 0x300000>;
> gpio-controller;
> #gpio-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 211>;
> + gpio-ranges = <&tlmm 0 0 210>;
> interrupt-controller;
> #interrupt-cells = <2>;
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
> index a457425ba112..6ecc1ad6ccd4 100644
> --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
> +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml
> @@ -136,7 +136,7 @@ examples:
> reg = <0x0f100000 0x300000>;
> gpio-controller;
> #gpio-cells = <2>;
> - gpio-ranges = <&tlmm 0 0 211>;
> + gpio-ranges = <&tlmm 0 0 210>;
> interrupt-controller;
> #interrupt-cells = <2>;
> interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
2023-02-01 16:07 ` Stephan Gerhold
@ 2023-02-01 16:31 ` Stephan Gerhold
2023-02-02 9:38 ` Krzysztof Kozlowski
0 siblings, 1 reply; 12+ messages in thread
From: Stephan Gerhold @ 2023-02-01 16:31 UTC (permalink / raw)
To: Krzysztof Kozlowski
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Richard Acayan, Vinod Koul,
krishna Lanka, Iskren Chernev, Martin Botka, Abel Vesa,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
On Wed, Feb 01, 2023 at 05:07:40PM +0100, Stephan Gerhold wrote:
> On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote:
> > Correct the number of GPIOs in gpio-ranges to match reality.
> >
> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in
> the pinctrl drivers for all/most of the platforms you update below. It
> looks like the special UFS_RESET pins are also exported as GPIOs in
> addition to the real GPIOs. I'm not sure if this is intended or a
> mistake.
>
It looks like this is on purpose:
---
From 53a5372ce326116f3e3d3f1d701113b2542509f4 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Tue, 4 Jun 2019 00:19:59 -0700
Subject: [PATCH] pinctrl: qcom: sdm845: Expose ufs_reset as gpio
The ufs_reset pin is expected to be wired to the reset pin of the
primary UFS memory but is pretty much just a general purpose output pinr
Reorder the pins and expose it as gpio 150, so that the UFS driver can
toggle it.
---
And it's used in sdm845-mtp.dts:
&ufs_mem_hc {
reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
};
So I think this patch (together with the DT ones you sent) should be
dropped because it would prevent using the UFS_RESET as GPIO since it's
no longer included in gpio-ranges.
Thanks,
Stephan
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
2023-02-01 16:31 ` Stephan Gerhold
@ 2023-02-02 9:38 ` Krzysztof Kozlowski
0 siblings, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-02 9:38 UTC (permalink / raw)
To: Stephan Gerhold
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Richard Acayan, Vinod Koul,
krishna Lanka, Iskren Chernev, Martin Botka, Abel Vesa,
linux-arm-msm, linux-gpio, devicetree, linux-kernel
On 01/02/2023 17:31, Stephan Gerhold wrote:
> On Wed, Feb 01, 2023 at 05:07:40PM +0100, Stephan Gerhold wrote:
>> On Wed, Feb 01, 2023 at 04:30:19PM +0100, Krzysztof Kozlowski wrote:
>>> Correct the number of GPIOs in gpio-ranges to match reality.
>>>
>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>
>> AFAICT the current gpio-ranges do match the number of GPIOs (ngpios) in
>> the pinctrl drivers for all/most of the platforms you update below. It
>> looks like the special UFS_RESET pins are also exported as GPIOs in
>> addition to the real GPIOs. I'm not sure if this is intended or a
>> mistake.
>>
>
> It looks like this is on purpose:
>
> ---
> From 53a5372ce326116f3e3d3f1d701113b2542509f4 Mon Sep 17 00:00:00 2001
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
> Date: Tue, 4 Jun 2019 00:19:59 -0700
> Subject: [PATCH] pinctrl: qcom: sdm845: Expose ufs_reset as gpio
>
> The ufs_reset pin is expected to be wired to the reset pin of the
> primary UFS memory but is pretty much just a general purpose output pinr
>
> Reorder the pins and expose it as gpio 150, so that the UFS driver can
> toggle it.
> ---
>
> And it's used in sdm845-mtp.dts:
>
> &ufs_mem_hc {
> reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
> };
>
> So I think this patch (together with the DT ones you sent) should be
> dropped because it would prevent using the UFS_RESET as GPIO since it's
> no longer included in gpio-ranges.
Thanks, but then we need to fix few others which miss the UFS reset pin.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples
2023-02-01 15:30 ` [PATCH 7/7] dt-bindings: pinctrl: qcom: correct gpio-ranges in examples Krzysztof Kozlowski
2023-02-01 16:07 ` Stephan Gerhold
@ 2023-02-02 10:39 ` Krzysztof Kozlowski
1 sibling, 0 replies; 12+ messages in thread
From: Krzysztof Kozlowski @ 2023-02-02 10:39 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Linus Walleij,
Rob Herring, Krzysztof Kozlowski, Stephan Gerhold,
Richard Acayan, Vinod Koul, krishna Lanka, Iskren Chernev,
Martin Botka, Abel Vesa, linux-arm-msm, linux-gpio, devicetree,
linux-kernel
On 01/02/2023 16:30, Krzysztof Kozlowski wrote:
> Correct the number of GPIOs in gpio-ranges to match reality.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> .../devicetree/bindings/pinctrl/qcom,sc7180-pinctrl.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sc8280xp-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sdm670-tlmm.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sdm845-pinctrl.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sdx65-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6115-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6125-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml | 2 +-
> .../devicetree/bindings/pinctrl/qcom,sm8150-pinctrl.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm8450-tlmm.yaml | 2 +-
> Documentation/devicetree/bindings/pinctrl/qcom,sm8550-tlmm.yaml | 2 +-
As pointed out by Stephan, this is mostly incorrect and needs fixes.
There will be a v2.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 12+ messages in thread