From: Bartosz Golaszewski <brgl@bgdev.pl>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: [PATCH v2 01/15] arm64: dts: qcom: sa8775p: pad reg properties to 8 digits
Date: Mon, 20 Mar 2023 16:48:27 +0100 [thread overview]
Message-ID: <20230320154841.327908-2-brgl@bgdev.pl> (raw)
In-Reply-To: <20230320154841.327908-1-brgl@bgdev.pl>
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
The file has inconsistent padding of the address part of soc node
children's reg properties. Fix it.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index c5b73c591e0f..5aa28a3b12ae 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -440,7 +440,7 @@ soc: soc@0 {
gcc: clock-controller@100000 {
compatible = "qcom,sa8775p-gcc";
- reg = <0x0 0x100000 0x0 0xc7018>;
+ reg = <0x0 0x00100000 0x0 0xc7018>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
@@ -464,7 +464,7 @@ gcc: clock-controller@100000 {
ipcc: mailbox@408000 {
compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
- reg = <0x0 0x408000 0x0 0x1000>;
+ reg = <0x0 0x00408000 0x0 0x1000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
@@ -473,7 +473,7 @@ ipcc: mailbox@408000 {
qupv3_id_1: geniqup@ac0000 {
compatible = "qcom,geni-se-qup";
- reg = <0x0 0xac0000 0x0 0x6000>;
+ reg = <0x0 0x00ac0000 0x0 0x6000>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -485,7 +485,7 @@ qupv3_id_1: geniqup@ac0000 {
uart10: serial@a8c000 {
compatible = "qcom,geni-uart";
- reg = <0x0 0xa8c000 0x0 0x4000>;
+ reg = <0x0 0x00a8c000 0x0 0x4000>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
@@ -735,7 +735,7 @@ rpmhpd_opp_turbo_l1: opp-9 {
tcsr_mutex: hwlock@1f40000 {
compatible = "qcom,tcsr-mutex";
- reg = <0x0 0x1f40000 0x0 0x20000>;
+ reg = <0x0 0x01f40000 0x0 0x20000>;
#hwlock-cells = <1>;
};
@@ -754,7 +754,7 @@ cpufreq_hw: cpufreq@18591000 {
tlmm: pinctrl@f000000 {
compatible = "qcom,sa8775p-tlmm";
- reg = <0x0 0xf000000 0x0 0x1000000>;
+ reg = <0x0 0x0f000000 0x0 0x1000000>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
--
2.37.2
next prev parent reply other threads:[~2023-03-20 15:58 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-20 15:48 [PATCH v2 00/15] arm64: dts: qcom: sa8775p: add basic PMIC support Bartosz Golaszewski
2023-03-20 15:48 ` Bartosz Golaszewski [this message]
2023-03-20 17:18 ` [PATCH v2 01/15] arm64: dts: qcom: sa8775p: pad reg properties to 8 digits Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 02/15] arm64: dts: qcom: sa8775p: sort soc nodes by reg property Bartosz Golaszewski
2023-03-21 19:24 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 03/15] dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p Bartosz Golaszewski
2023-03-20 15:48 ` [PATCH v2 04/15] arm64: dts: qcom: sa8775p: add the pdc node Bartosz Golaszewski
2023-03-20 17:21 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 05/15] arm64: dts: qcom: sa8775p: add the spmi node Bartosz Golaszewski
2023-03-20 17:22 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 06/15] dt-bindings: mfd: qcom,spmi-pmic: add compatible for pmm8654au Bartosz Golaszewski
2023-03-20 15:48 ` [PATCH v2 07/15] arm64: dts: qcom: sa8775p: add support for the on-board PMICs Bartosz Golaszewski
2023-03-20 17:29 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 08/15] arm64: dts: qcom: sa8775p-ride: enable PMIC support Bartosz Golaszewski
2023-03-20 17:22 ` Konrad Dybcio
2023-03-20 17:30 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 09/15] arm64: dts: qcom: sa8775p: add the Power On device node Bartosz Golaszewski
2023-03-20 17:23 ` Konrad Dybcio
2023-03-20 17:24 ` Konrad Dybcio
2023-03-21 14:17 ` Bartosz Golaszewski
2023-03-20 15:48 ` [PATCH v2 10/15] arm64: dts: qcom: sa8775p: pmic: add the power key Bartosz Golaszewski
2023-03-20 17:25 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 11/15] arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input Bartosz Golaszewski
2023-03-20 17:25 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 12/15] arm64: dts: qcom: sa8775p: pmic: add thermal zones Bartosz Golaszewski
2023-03-20 17:28 ` Konrad Dybcio
2023-03-22 2:50 ` Bjorn Andersson
2023-03-22 15:30 ` Bartosz Golaszewski
2023-03-20 15:48 ` [PATCH v2 13/15] dt-bindings: pinctrl: qcom,pmic-gpio: add compatible for pmm8654au-gpio Bartosz Golaszewski
2023-03-20 15:48 ` [PATCH v2 14/15] pinctrl: qcom: spmi-gpio: add support " Bartosz Golaszewski
2023-03-20 17:28 ` Konrad Dybcio
2023-03-20 15:48 ` [PATCH v2 15/15] arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes Bartosz Golaszewski
2023-03-20 17:29 ` Konrad Dybcio
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