[PATCH v1 0/4] arm64: dts: colibri-imx8x: misc fixes

[PATCH v1 0/4] arm64: dts: colibri-imx8x: misc fixes

[Andrejs Cainikovs]

This series fixes a few small issues on the just introduced Colibri iMX8X:

* Remove duplicate GPIO3_IO01 pin configuration
* Remove GPIO3_IO01 pin configuration from SoM level
* Delete non-existing i.MX8X peripherals adc1 and dsp

In addition to that a small cleanup patch is added
* Move iomuxc pinctrl from SoM to carrier board level

Andrejs Cainikovs (1):
  arm64: dts: colibri-imx8x: delete adc1 and dsp

Emanuele Ghidoli (3):
  arm64: dts: colibri-imx8x: fix eval board pin configuration
  arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval
    board
  arm64: dts: colibri-imx8x: fix iris pinctrl configuration

 .../boot/dts/freescale/imx8x-colibri-eval-v3.dtsi  |  6 ++++++
 .../boot/dts/freescale/imx8x-colibri-iris.dtsi     |  3 +--
 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi   | 14 ++++++++------
 3 files changed, 15 insertions(+), 8 deletions(-)

-- 
2.34.1

[PATCH v1 1/4] arm64: dts: colibri-imx8x: fix eval board pin configuration

[Andrejs Cainikovs]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Fix pinctrl groups to have SODIMM 75 only in one group.
Remove configuration of the pin at SoM level because it is normally
used as CSI_MCLK at camera interface connector.
Without this fix it is not possible, without redefining iomuxc pinctrl,
to use CSI_MCLK signal and leads to the following error messages:

imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_CSI_MCLK already requested
imx8qxp-pinctrl scu:pinctrl: pin-147 (16-003c) status -22

Fixes: 4d2adf738169 ("arm64: dts: colibri-imx8x: Split pinctrl_hog1")

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 7cad79102e1a..6f88c11f16e1 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -365,7 +365,7 @@ &usdhc2 {
 &iomuxc {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
-		    <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
+		    <&pinctrl_lpspi2_cs2>;
 
 	/* On-module touch pen-down interrupt */
 	pinctrl_ad7879_int: ad7879intgrp {
@@ -499,8 +499,7 @@ pinctrl_hog0: hog0grp {
 	};
 
 	pinctrl_hog1: hog1grp {
-		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>,		/* SODIMM  75 */
-			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
+		fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
 	};
 
 	pinctrl_hog2: hog2grp {
-- 
2.34.1

[PATCH v1 2/4] arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval board

[Andrejs Cainikovs]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Each carrier board device tree except the eval board one already override
iomuxc pinctrl property to configure unused pins as gpio.
So move also the pinctrl property to eval board device tree.
Leave the pin group definition in imx8x-colibri.dtsi to avoid duplication
and simplify configuration of gpio.

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi | 6 ++++++
 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi         | 4 ----
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
index 7264d784ae72..9af769ab8ceb 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
@@ -33,6 +33,12 @@ rtc_i2c: rtc@68 {
 	};
 };
 
+&iomuxc {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
+		    <&pinctrl_lpspi2_cs2>;
+};
+
 /* Colibri SPI */
 &lpspi2 {
 	status = "okay";
diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index 6f88c11f16e1..b0d6f632622c 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -363,10 +363,6 @@ &usdhc2 {
 /* TODO VPU Encoder/Decoder */
 
 &iomuxc {
-	pinctrl-names = "default";
-	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
-		    <&pinctrl_lpspi2_cs2>;
-
 	/* On-module touch pen-down interrupt */
 	pinctrl_ad7879_int: ad7879intgrp {
 		fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05	0x21>;
-- 
2.34.1

[PATCH v1 3/4] arm64: dts: colibri-imx8x: fix iris pinctrl configuration

[Andrejs Cainikovs]

From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>

Remove GPIO3_IO10 from Iris carrier board pinctrl configuration,
this is already defined in the SOM dtsi since this is a
standard SOM functionality (wake-up button).

Duplicating it leads to the following error message
imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_QSPI0A_DATA1 already requested

Fixes: aefb5e2d974d ("arm64: dts: colibri-imx8x: Add iris carrier board")

Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
index 5f30c88855e7..f8953067bc3b 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
@@ -48,8 +48,7 @@ pinctrl_gpio_iris: gpioirisgrp {
 			   <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28		0x20>,		/* SODIMM 101 */
 			   <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27		0x20>,		/* SODIMM  97 */
 			   <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03	0x06000020>,	/* SODIMM  85 */
-			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>,		/* SODIMM  79 */
-			   <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10	0x06700041>;	/* SODIMM  45 */
+			   <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26		0x20>;		/* SODIMM  79 */
 	};
 
 	pinctrl_uart1_forceoff: uart1forceoffgrp {
-- 
2.34.1

[PATCH v1 4/4] arm64: dts: colibri-imx8x: delete adc1 and dsp

[Andrejs Cainikovs]

i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on
imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees
should be updated with some peripherals removed or updated, similar
to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only
i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some
of the peripherals got inherited from imx8-ss-*.dtsi files, but in
reality they are not present on SOC.
As a result, during resource partition ownership check U-Boot receives
messages from SCU firmware about these resources not owned by boot
partition. In reality, these resources are not owned by anyone, as
they simply does not exist, but are defined in Linux device tree.
This change removes those peripherals, which are listed during
U-Boot resource partition ownership check as warnings:

  ## Flattened Device Tree blob at 9d400000
     Booting using the fdt blob at 0x9d400000
     Loading Device Tree to 00000000fd652000, end 00000000fd67efff ... OK
  Disable clock-controller@59580000 rsrc 512 not owned
  Disable clock-controller@5ac90000 rsrc 102 not owned

  Starting kernel ...

Fixes: ba5a5615d54f ("arm64: dts: freescale: add initial support for colibri imx8x")

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
---
 arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
index b0d6f632622c..49d105eb4769 100644
--- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
@@ -769,3 +769,10 @@ pinctrl_wifi: wifigrp {
 		fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20>;
 	};
 };
+
+/* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */
+
+/delete-node/ &adc1;
+/delete-node/ &adc1_lpcg;
+/delete-node/ &dsp;
+/delete-node/ &dsp_lpcg;
-- 
2.34.1

Re: [PATCH v1 1/4] arm64: dts: colibri-imx8x: fix eval board pin configuration

[Shawn Guo]

On Mon, Apr 17, 2023 at 07:38:27PM +0200, Andrejs Cainikovs wrote:
> From: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> 
> Fix pinctrl groups to have SODIMM 75 only in one group.
> Remove configuration of the pin at SoM level because it is normally
> used as CSI_MCLK at camera interface connector.
> Without this fix it is not possible, without redefining iomuxc pinctrl,
> to use CSI_MCLK signal and leads to the following error messages:
> 
> imx8qxp-pinctrl scu:pinctrl: pin IMX8QXP_CSI_MCLK already requested
> imx8qxp-pinctrl scu:pinctrl: pin-147 (16-003c) status -22
> 
> Fixes: 4d2adf738169 ("arm64: dts: colibri-imx8x: Split pinctrl_hog1")
> 

Unneeded newline.  Fixes tag can just be part of Signed-off-by section.

Shawn

> Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> index 7cad79102e1a..6f88c11f16e1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> @@ -365,7 +365,7 @@ &usdhc2 {
>  &iomuxc {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>,
> -		    <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>;
> +		    <&pinctrl_lpspi2_cs2>;
>  
>  	/* On-module touch pen-down interrupt */
>  	pinctrl_ad7879_int: ad7879intgrp {
> @@ -499,8 +499,7 @@ pinctrl_hog0: hog0grp {
>  	};
>  
>  	pinctrl_hog1: hog1grp {
> -		fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01			0x20>,		/* SODIMM  75 */
> -			   <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
> +		fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16			0x20>;		/* SODIMM  93 */
>  	};
>  
>  	pinctrl_hog2: hog2grp {
> -- 
> 2.34.1
> 

Re: [PATCH v1 4/4] arm64: dts: colibri-imx8x: delete adc1 and dsp

[Shawn Guo]

On Mon, Apr 17, 2023 at 07:38:30PM +0200, Andrejs Cainikovs wrote:
> i.MX8, i.MX8X, i.MX8XP and i.MX8XL SOC device trees are all based on
> imx8-ss-*.dtsi files. For i.MX8X and i.MX8XP these device trees
> should be updated with some peripherals removed or updated, similar
> to i.MX8XL (imx8dxl-ss-*.dtsi files). However, it looks like only
> i.MX8 and i.MX8XL are up to date, but for i.MX8X and i.MX8XP some
> of the peripherals got inherited from imx8-ss-*.dtsi files, but in
> reality they are not present on SOC.
> As a result, during resource partition ownership check U-Boot receives
> messages from SCU firmware about these resources not owned by boot
> partition. In reality, these resources are not owned by anyone, as
> they simply does not exist, but are defined in Linux device tree.
> This change removes those peripherals, which are listed during
> U-Boot resource partition ownership check as warnings:
> 
>   ## Flattened Device Tree blob at 9d400000
>      Booting using the fdt blob at 0x9d400000
>      Loading Device Tree to 00000000fd652000, end 00000000fd67efff ... OK
>   Disable clock-controller@59580000 rsrc 512 not owned
>   Disable clock-controller@5ac90000 rsrc 102 not owned
> 
>   Starting kernel ...
> 
> Fixes: ba5a5615d54f ("arm64: dts: freescale: add initial support for colibri imx8x")
> 
> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>

Applying of the patch will result in a different patch author and SoB email.

Shawn

> ---
>  arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> index b0d6f632622c..49d105eb4769 100644
> --- a/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
> @@ -769,3 +769,10 @@ pinctrl_wifi: wifigrp {
>  		fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K	0x20>;
>  	};
>  };
> +
> +/* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */
> +
> +/delete-node/ &adc1;
> +/delete-node/ &adc1_lpcg;
> +/delete-node/ &dsp;
> +/delete-node/ &dsp_lpcg;
> -- 
> 2.34.1
>