* [PATCH 0/5] b4/sysreg: More conversions to automatic generation
@ 2023-05-22 16:22 Mark Brown
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
` (4 more replies)
0 siblings, 5 replies; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Continue working through the register defintions, converting them to
automatic generation.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
Mark Brown (5):
arm64/sysreg: Remove some unused sysreg definitions
arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
arm64/sysreg: Convert OSLAR_EL1 to automatic generation
arch/arm64/include/asm/kvm_host.h | 2 +-
arch/arm64/include/asm/sysreg.h | 16 ++++------------
arch/arm64/kvm/sys_regs.c | 10 +++++-----
arch/arm64/tools/sysreg | 40 +++++++++++++++++++++++++++++++++++++++
4 files changed, 50 insertions(+), 18 deletions(-)
---
base-commit: e8d018dd0257f744ca50a729e3d042cf2ec9da65
change-id: 20230419-arm64-syreg-gen-b2aa896b8af6
Best regards,
--
Mark Brown <broonie@kernel.org>
^ permalink raw reply [flat|nested] 17+ messages in thread
* [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
@ 2023-05-22 16:22 ` Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
` (2 more replies)
2023-05-22 16:22 ` [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
` (3 subsequent siblings)
4 siblings, 3 replies; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
just remove the definitions rather than converting to automatic
generation.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9e3ecba3c4e6..6505665624d4 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,11 +134,8 @@
#define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
-#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
-#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
-#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
#define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
#define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
--
2.30.2
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
@ 2023-05-22 16:22 ` Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:33 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
` (2 subsequent siblings)
4 siblings, 2 replies; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Convert MDCCINT_EL1 to automatic register generation as per DDI0616
2023-03. No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 7 +++++++
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 6505665624d4..4e48bb4dca6a 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
#define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
-#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
#define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index dd5a9c7e310f..1699e87bc0b4 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -48,6 +48,13 @@
# feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
# item ACCDATA) though it may be more taseful to do something else.
+Sysreg MDCCINT_EL1 2 0 0 2 0
+Res0 63:31
+Field 30 RX
+Field 29 TX
+Res0 28:0
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS
--
2.30.2
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
2023-05-22 16:22 ` [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
@ 2023-05-22 16:22 ` Mark Brown
2023-05-23 11:40 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
2023-05-22 16:22 ` [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
4 siblings, 1 reply; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
No functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 1 -
arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
2 files changed, 28 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4e48bb4dca6a..4ecae92b56b5 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -134,7 +134,6 @@
#define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
#define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
-#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
#define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
#define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
#define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 1699e87bc0b4..a5ae0e19fc9f 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -55,6 +55,34 @@ Field 29 TX
Res0 28:0
EndSysreg
+Sysreg MDSCR_EL1 2 0 0 2 2
+Res0 63:36
+Field 35 EHBWE
+Field 34 EnSPM
+Field 33 TTA
+Field 32 EMBWE
+Field 31 TFO
+Field 30 RXfull
+Field 29 TXfull
+Res0 28
+Field 27 RXO
+Field 26 TXU
+Res0 25:24
+Field 23:22 INTdis
+Field 21 TDA
+Res0 20
+Field 19 SC2
+Res0 18:16
+Field 15 MDE
+Field 14 HDE
+Field 13 KDE
+Field 12 TDCC
+Res0 11:7
+Field 6 ERR
+Res0 5:1
+Field 0 SS
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS
--
2.30.2
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
` (2 preceding siblings ...)
2023-05-22 16:22 ` [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
@ 2023-05-22 16:22 ` Mark Brown
2023-05-23 11:52 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
4 siblings, 1 reply; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Our standard scheme for naming the constants for bitfields in system
registers includes _ELx in the name but not the SYS_, update the
constants for OSL[AS]R_EL1 to follow this convention.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/kvm_host.h | 2 +-
arch/arm64/include/asm/sysreg.h | 10 +++++-----
arch/arm64/kvm/sys_regs.c | 10 +++++-----
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index bcd774d74f34..cde4ad590f8c 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -996,7 +996,7 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
#define kvm_vcpu_os_lock_enabled(vcpu) \
- (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK))
+ (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))
int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
struct kvm_device_attr *attr);
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4ecae92b56b5..09de958e79ed 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -141,13 +141,13 @@
#define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
-#define SYS_OSLAR_OSLK BIT(0)
+#define OSLAR_EL1_OSLK BIT(0)
#define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
-#define SYS_OSLSR_OSLM_MASK (BIT(3) | BIT(0))
-#define SYS_OSLSR_OSLM_NI 0
-#define SYS_OSLSR_OSLM_IMPLEMENTED BIT(3)
-#define SYS_OSLSR_OSLK BIT(1)
+#define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
+#define OSLSR_EL1_OSLM_NI 0
+#define OSLSR_EL1_OSLM_IMPLEMENTED BIT(3)
+#define OSLSR_EL1_OSLK BIT(1)
#define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4)
#define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4)
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 53749d3a0996..8a5160a90d3c 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -388,9 +388,9 @@ static bool trap_oslar_el1(struct kvm_vcpu *vcpu,
return read_from_write_only(vcpu, p, r);
/* Forward the OSLK bit to OSLSR */
- oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~SYS_OSLSR_OSLK;
- if (p->regval & SYS_OSLAR_OSLK)
- oslsr |= SYS_OSLSR_OSLK;
+ oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~OSLSR_EL1_OSLK;
+ if (p->regval & OSLAR_EL1_OSLK)
+ oslsr |= OSLSR_EL1_OSLK;
__vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;
return true;
@@ -414,7 +414,7 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
* The only modifiable bit is the OSLK bit. Refuse the write if
* userspace attempts to change any other bit in the register.
*/
- if ((val ^ rd->val) & ~SYS_OSLSR_OSLK)
+ if ((val ^ rd->val) & ~OSLSR_EL1_OSLK)
return -EINVAL;
__vcpu_sys_reg(vcpu, rd->reg) = val;
@@ -1760,7 +1760,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
{ SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
{ SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
- SYS_OSLSR_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
+ OSLSR_EL1_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
{ SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
{ SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },
--
2.30.2
^ permalink raw reply related [flat|nested] 17+ messages in thread
* [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
` (3 preceding siblings ...)
2023-05-22 16:22 ` [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
@ 2023-05-22 16:22 ` Mark Brown
2023-05-23 8:13 ` Oliver Upton
2023-05-23 11:53 ` Shaoqin Huang
4 siblings, 2 replies; 17+ messages in thread
From: Mark Brown @ 2023-05-22 16:22 UTC (permalink / raw)
To: Catalin Marinas, Will Deacon, Marc Zyngier, Oliver Upton,
James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm, Mark Brown
Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
functional change.
Signed-off-by: Mark Brown <broonie@kernel.org>
---
arch/arm64/include/asm/sysreg.h | 3 ---
arch/arm64/tools/sysreg | 5 +++++
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 09de958e79ed..3b51e532caa9 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -140,9 +140,6 @@
#define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
#define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
-#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
-#define OSLAR_EL1_OSLK BIT(0)
-
#define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
#define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
#define OSLSR_EL1_OSLM_NI 0
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index a5ae0e19fc9f..84df0b7feb45 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -83,6 +83,11 @@ Res0 5:1
Field 0 SS
EndSysreg
+Sysreg OSLAR_EL1 2 0 1 0 4
+Res0 63:1
+Field 0 OSLK
+EndSysreg
+
Sysreg ID_PFR0_EL1 3 0 0 1 0
Res0 63:32
UnsignedEnum 31:28 RAS
--
2.30.2
^ permalink raw reply related [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
2023-05-22 16:22 ` [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
@ 2023-05-23 8:13 ` Oliver Upton
2023-05-23 8:21 ` Anshuman Khandual
2023-05-23 8:39 ` Mark Brown
2023-05-23 11:53 ` Shaoqin Huang
1 sibling, 2 replies; 17+ messages in thread
From: Oliver Upton @ 2023-05-23 8:13 UTC (permalink / raw)
To: Mark Brown
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm
On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:
> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
> functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> arch/arm64/tools/sysreg | 5 +++++
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 09de958e79ed..3b51e532caa9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -140,9 +140,6 @@
> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>
> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> -#define OSLAR_EL1_OSLK BIT(0)
> -
> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> #define OSLSR_EL1_OSLM_NI 0
Should the OSLSR_EL1 definitions be rolled over to the generated scheme
as well?
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a5ae0e19fc9f..84df0b7feb45 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -83,6 +83,11 @@ Res0 5:1
> Field 0 SS
> EndSysreg
>
> +Sysreg OSLAR_EL1 2 0 1 0 4
> +Res0 63:1
> +Field 0 OSLK
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
> --
> 2.30.2
>
--
Thanks,
Oliver
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
2023-05-23 8:13 ` Oliver Upton
@ 2023-05-23 8:21 ` Anshuman Khandual
2023-05-23 8:39 ` Mark Brown
1 sibling, 0 replies; 17+ messages in thread
From: Anshuman Khandual @ 2023-05-23 8:21 UTC (permalink / raw)
To: Oliver Upton, Mark Brown
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 13:43, Oliver Upton wrote:
> On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:
>> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
>> functional change.
>>
>> Signed-off-by: Mark Brown <broonie@kernel.org>
>> ---
>> arch/arm64/include/asm/sysreg.h | 3 ---
>> arch/arm64/tools/sysreg | 5 +++++
>> 2 files changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
>> index 09de958e79ed..3b51e532caa9 100644
>> --- a/arch/arm64/include/asm/sysreg.h
>> +++ b/arch/arm64/include/asm/sysreg.h
>> @@ -140,9 +140,6 @@
>> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
>> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>>
>> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
>> -#define OSLAR_EL1_OSLK BIT(0)
>> -
>> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
>> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
>> #define OSLSR_EL1_OSLM_NI 0
>
> Should the OSLSR_EL1 definitions be rolled over to the generated scheme
> as well?
Agreed, was about to ask the same question :) Any reason it got skipped ?
>
>> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
>> index a5ae0e19fc9f..84df0b7feb45 100644
>> --- a/arch/arm64/tools/sysreg
>> +++ b/arch/arm64/tools/sysreg
>> @@ -83,6 +83,11 @@ Res0 5:1
>> Field 0 SS
>> EndSysreg
>>
>> +Sysreg OSLAR_EL1 2 0 1 0 4
>> +Res0 63:1
>> +Field 0 OSLK
>> +EndSysreg
>> +
>> Sysreg ID_PFR0_EL1 3 0 0 1 0
>> Res0 63:32
>> UnsignedEnum 31:28 RAS
>>
>> --
>> 2.30.2
>>
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
@ 2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:31 ` Shaoqin Huang
2023-05-23 11:40 ` Marc Zyngier
2 siblings, 0 replies; 17+ messages in thread
From: Anshuman Khandual @ 2023-05-23 8:23 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/22/23 21:52, Mark Brown wrote:
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
2023-05-22 16:22 ` [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
@ 2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:33 ` Shaoqin Huang
1 sibling, 0 replies; 17+ messages in thread
From: Anshuman Khandual @ 2023-05-23 8:23 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/22/23 21:52, Mark Brown wrote:
> Convert MDCCINT_EL1 to automatic register generation as per DDI0616
> 2023-03. No functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 7 +++++++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 6505665624d4..4e48bb4dca6a 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index dd5a9c7e310f..1699e87bc0b4 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -48,6 +48,13 @@
> # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
> # item ACCDATA) though it may be more taseful to do something else.
>
> +Sysreg MDCCINT_EL1 2 0 0 2 0
> +Res0 63:31
> +Field 30 RX
> +Field 29 TX
> +Res0 28:0
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
2023-05-23 8:13 ` Oliver Upton
2023-05-23 8:21 ` Anshuman Khandual
@ 2023-05-23 8:39 ` Mark Brown
1 sibling, 0 replies; 17+ messages in thread
From: Mark Brown @ 2023-05-23 8:39 UTC (permalink / raw)
To: Oliver Upton
Cc: Catalin Marinas, Will Deacon, Marc Zyngier, James Morse,
Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm
[-- Attachment #1: Type: text/plain, Size: 567 bytes --]
On Tue, May 23, 2023 at 08:13:01AM +0000, Oliver Upton wrote:
> On Mon, May 22, 2023 at 05:22:44PM +0100, Mark Brown wrote:
> > -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> > -#define OSLAR_EL1_OSLK BIT(0)
> > -
> > #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> > #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> > #define OSLSR_EL1_OSLM_NI 0
> Should the OSLSR_EL1 definitions be rolled over to the generated scheme
> as well?
It should at some point but it has a field with non-contiguous bits
which the tool doesn't understand yet so it can wait.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
@ 2023-05-23 11:31 ` Shaoqin Huang
2023-05-23 11:40 ` Marc Zyngier
2 siblings, 0 replies; 17+ messages in thread
From: Shaoqin Huang @ 2023-05-23 11:31 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 00:22, Mark Brown wrote:
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
>
--
Shaoqin
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation
2023-05-22 16:22 ` [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
@ 2023-05-23 11:33 ` Shaoqin Huang
1 sibling, 0 replies; 17+ messages in thread
From: Shaoqin Huang @ 2023-05-23 11:33 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 00:22, Mark Brown wrote:
> Convert MDCCINT_EL1 to automatic register generation as per DDI0616
> 2023-03. No functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 7 +++++++
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 6505665624d4..4e48bb4dca6a 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index dd5a9c7e310f..1699e87bc0b4 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -48,6 +48,13 @@
> # feature that introduces them (eg, FEAT_LS64_ACCDATA introduces enumeration
> # item ACCDATA) though it may be more taseful to do something else.
>
> +Sysreg MDCCINT_EL1 2 0 0 2 0
> +Res0 63:31
> +Field 30 RX
> +Field 29 TX
> +Res0 28:0
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
--
Shaoqin
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:31 ` Shaoqin Huang
@ 2023-05-23 11:40 ` Marc Zyngier
2 siblings, 0 replies; 17+ messages in thread
From: Marc Zyngier @ 2023-05-23 11:40 UTC (permalink / raw)
To: Mark Brown
Cc: Catalin Marinas, Will Deacon, Oliver Upton, James Morse,
Suzuki K Poulose, linux-arm-kernel, linux-kernel, kvmarm
On Mon, 22 May 2023 17:22:40 +0100,
Mark Brown <broonie@kernel.org> wrote:
>
> Since there are no references to OSDTRRX_EL1 or OSECCR_EL1 in the code
> just remove the definitions rather than converting to automatic
> generation.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e3ecba3c4e6..6505665624d4 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,11 +134,8 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_OSDTRRX_EL1 sys_reg(2, 0, 0, 0, 2)
> #define SYS_MDCCINT_EL1 sys_reg(2, 0, 0, 2, 0)
> #define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> -#define SYS_OSDTRTX_EL1 sys_reg(2, 0, 0, 3, 2)
> -#define SYS_OSECCR_EL1 sys_reg(2, 0, 0, 6, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
These registers are in active use by the NV patches. Please leave them
where they are or convert them to be generated.
M.
--
Without deviation from the norm, progress is not possible.
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 to automatic register generation
2023-05-22 16:22 ` [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
@ 2023-05-23 11:40 ` Shaoqin Huang
0 siblings, 0 replies; 17+ messages in thread
From: Shaoqin Huang @ 2023-05-23 11:40 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 00:22, Mark Brown wrote:
> Convert MDSCR_EL1 to automatic register generation as per DDI0616 2023-03.
> No functional change.
>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/include/asm/sysreg.h | 1 -
> arch/arm64/tools/sysreg | 28 ++++++++++++++++++++++++++++
> 2 files changed, 28 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 4e48bb4dca6a..4ecae92b56b5 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -134,7 +134,6 @@
> #define SYS_SVCR_SMSTART_SM_EL0 sys_reg(0, 3, 4, 3, 3)
> #define SYS_SVCR_SMSTOP_SMZA_EL0 sys_reg(0, 3, 4, 6, 3)
>
> -#define SYS_MDSCR_EL1 sys_reg(2, 0, 0, 2, 2)
> #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
> #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
> #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 1699e87bc0b4..a5ae0e19fc9f 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -55,6 +55,34 @@ Field 29 TX
> Res0 28:0
> EndSysreg
>
> +Sysreg MDSCR_EL1 2 0 0 2 2
> +Res0 63:36
> +Field 35 EHBWE
> +Field 34 EnSPM
> +Field 33 TTA
> +Field 32 EMBWE
> +Field 31 TFO
> +Field 30 RXfull
> +Field 29 TXfull
> +Res0 28
> +Field 27 RXO
> +Field 26 TXU
> +Res0 25:24
> +Field 23:22 INTdis
> +Field 21 TDA
> +Res0 20
> +Field 19 SC2
> +Res0 18:16
> +Field 15 MDE
> +Field 14 HDE
> +Field 13 KDE
> +Field 12 TDCC
> +Res0 11:7
> +Field 6 ERR
> +Res0 5:1
> +Field 0 SS
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
--
Shaoqin
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1
2023-05-22 16:22 ` [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
@ 2023-05-23 11:52 ` Shaoqin Huang
0 siblings, 0 replies; 17+ messages in thread
From: Shaoqin Huang @ 2023-05-23 11:52 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 00:22, Mark Brown wrote:
> Our standard scheme for naming the constants for bitfields in system
> registers includes _ELx in the name but not the SYS_, update the
> constants for OSL[AS]R_EL1 to follow this convention.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> arch/arm64/include/asm/kvm_host.h | 2 +-
> arch/arm64/include/asm/sysreg.h | 10 +++++-----
> arch/arm64/kvm/sys_regs.c | 10 +++++-----
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
> index bcd774d74f34..cde4ad590f8c 100644
> --- a/arch/arm64/include/asm/kvm_host.h
> +++ b/arch/arm64/include/asm/kvm_host.h
> @@ -996,7 +996,7 @@ void kvm_arm_clear_debug(struct kvm_vcpu *vcpu);
> void kvm_arm_reset_debug_ptr(struct kvm_vcpu *vcpu);
>
> #define kvm_vcpu_os_lock_enabled(vcpu) \
> - (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & SYS_OSLSR_OSLK))
> + (!!(__vcpu_sys_reg(vcpu, OSLSR_EL1) & OSLSR_EL1_OSLK))
>
> int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
> struct kvm_device_attr *attr);
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 4ecae92b56b5..09de958e79ed 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -141,13 +141,13 @@
> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>
> #define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> -#define SYS_OSLAR_OSLK BIT(0)
> +#define OSLAR_EL1_OSLK BIT(0)
>
> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> -#define SYS_OSLSR_OSLM_MASK (BIT(3) | BIT(0))
> -#define SYS_OSLSR_OSLM_NI 0
> -#define SYS_OSLSR_OSLM_IMPLEMENTED BIT(3)
> -#define SYS_OSLSR_OSLK BIT(1)
> +#define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> +#define OSLSR_EL1_OSLM_NI 0
> +#define OSLSR_EL1_OSLM_IMPLEMENTED BIT(3)
> +#define OSLSR_EL1_OSLK BIT(1)
>
> #define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4)
> #define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4)
> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> index 53749d3a0996..8a5160a90d3c 100644
> --- a/arch/arm64/kvm/sys_regs.c
> +++ b/arch/arm64/kvm/sys_regs.c
> @@ -388,9 +388,9 @@ static bool trap_oslar_el1(struct kvm_vcpu *vcpu,
> return read_from_write_only(vcpu, p, r);
>
> /* Forward the OSLK bit to OSLSR */
> - oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~SYS_OSLSR_OSLK;
> - if (p->regval & SYS_OSLAR_OSLK)
> - oslsr |= SYS_OSLSR_OSLK;
> + oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~OSLSR_EL1_OSLK;
> + if (p->regval & OSLAR_EL1_OSLK)
> + oslsr |= OSLSR_EL1_OSLK;
>
> __vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;
> return true;
> @@ -414,7 +414,7 @@ static int set_oslsr_el1(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
> * The only modifiable bit is the OSLK bit. Refuse the write if
> * userspace attempts to change any other bit in the register.
> */
> - if ((val ^ rd->val) & ~SYS_OSLSR_OSLK)
> + if ((val ^ rd->val) & ~OSLSR_EL1_OSLK)
> return -EINVAL;
>
> __vcpu_sys_reg(vcpu, rd->reg) = val;
> @@ -1760,7 +1760,7 @@ static const struct sys_reg_desc sys_reg_descs[] = {
> { SYS_DESC(SYS_MDRAR_EL1), trap_raz_wi },
> { SYS_DESC(SYS_OSLAR_EL1), trap_oslar_el1 },
> { SYS_DESC(SYS_OSLSR_EL1), trap_oslsr_el1, reset_val, OSLSR_EL1,
> - SYS_OSLSR_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
> + OSLSR_EL1_OSLM_IMPLEMENTED, .set_user = set_oslsr_el1, },
> { SYS_DESC(SYS_OSDLR_EL1), trap_raz_wi },
> { SYS_DESC(SYS_DBGPRCR_EL1), trap_raz_wi },
> { SYS_DESC(SYS_DBGCLAIMSET_EL1), trap_raz_wi },
>
--
Shaoqin
^ permalink raw reply [flat|nested] 17+ messages in thread
* Re: [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation
2023-05-22 16:22 ` [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
2023-05-23 8:13 ` Oliver Upton
@ 2023-05-23 11:53 ` Shaoqin Huang
1 sibling, 0 replies; 17+ messages in thread
From: Shaoqin Huang @ 2023-05-23 11:53 UTC (permalink / raw)
To: Mark Brown, Catalin Marinas, Will Deacon, Marc Zyngier,
Oliver Upton, James Morse, Suzuki K Poulose
Cc: linux-arm-kernel, linux-kernel, kvmarm
On 5/23/23 00:22, Mark Brown wrote:
> Convert OSLAR_EL1 to automatic generation as per DDI0601 2023-03. No
> functional change.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
> ---
> arch/arm64/include/asm/sysreg.h | 3 ---
> arch/arm64/tools/sysreg | 5 +++++
> 2 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 09de958e79ed..3b51e532caa9 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -140,9 +140,6 @@
> #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
> #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
>
> -#define SYS_OSLAR_EL1 sys_reg(2, 0, 1, 0, 4)
> -#define OSLAR_EL1_OSLK BIT(0)
> -
> #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
> #define OSLSR_EL1_OSLM_MASK (BIT(3) | BIT(0))
> #define OSLSR_EL1_OSLM_NI 0
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index a5ae0e19fc9f..84df0b7feb45 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -83,6 +83,11 @@ Res0 5:1
> Field 0 SS
> EndSysreg
>
> +Sysreg OSLAR_EL1 2 0 1 0 4
> +Res0 63:1
> +Field 0 OSLK
> +EndSysreg
> +
> Sysreg ID_PFR0_EL1 3 0 0 1 0
> Res0 63:32
> UnsignedEnum 31:28 RAS
>
--
Shaoqin
^ permalink raw reply [flat|nested] 17+ messages in thread
end of thread, other threads:[~2023-05-23 11:54 UTC | newest]
Thread overview: 17+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-22 16:22 [PATCH 0/5] b4/sysreg: More conversions to automatic generation Mark Brown
2023-05-22 16:22 ` [PATCH 1/5] arm64/sysreg: Remove some unused sysreg definitions Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:31 ` Shaoqin Huang
2023-05-23 11:40 ` Marc Zyngier
2023-05-22 16:22 ` [PATCH 2/5] arm64/sysreg: Convert MDCCINT_EL1 to automatic register generation Mark Brown
2023-05-23 8:23 ` Anshuman Khandual
2023-05-23 11:33 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 3/5] arm64/sysreg: Convert MDSCR_EL1 " Mark Brown
2023-05-23 11:40 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 4/5] arm64/sysreg: Standardise naming of bitfield constants in OSL[AS]R_EL1 Mark Brown
2023-05-23 11:52 ` Shaoqin Huang
2023-05-22 16:22 ` [PATCH 5/5] arm64/sysreg: Convert OSLAR_EL1 to automatic generation Mark Brown
2023-05-23 8:13 ` Oliver Upton
2023-05-23 8:21 ` Anshuman Khandual
2023-05-23 8:39 ` Mark Brown
2023-05-23 11:53 ` Shaoqin Huang
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