* [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
@ 2023-05-19 3:23 Cong Yang
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
2023-05-22 9:13 ` [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel neil.armstrong
0 siblings, 2 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-19 3:23 UTC (permalink / raw)
To: sam, neil.armstrong, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel, Cong Yang
The Starry-himax83102-j02 panel is a TDDI IC. From the datasheet[1],
it seems that the touch can communicate successfully only when the RST
signal is high. Since i2c_hid_core_probe comes after boe_panel_prepare
let's set the default high for RST at boe_panel_add.
[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 103 +++++++++++++++++-
1 file changed, 102 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 783234ae0f57..0d325fc42bc4 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -36,6 +36,7 @@ struct panel_desc {
const struct panel_init_cmd *init_cmds;
unsigned int lanes;
bool discharge_on_disable;
+ int enable_gpio_init_value;
};
struct boe_panel {
@@ -75,6 +76,75 @@ struct panel_init_cmd {
.len = sizeof((char[]){__VA_ARGS__}), \
.data = (char[]){__VA_ARGS__} }
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+ 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+ _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+ _INIT_DCS_CMD(0xCC, 0x02),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+ _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+ 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+ 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+ 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
+ _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
_INIT_DCS_CMD(0xFF, 0x20),
_INIT_DCS_CMD(0xFB, 0x01),
@@ -1620,6 +1690,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.init_cmds = starry_qfh032011_53g_init_cmd,
};
+static const struct drm_display_mode starry_himax83102_j02_default_mode = {
+ .clock = 161600,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 40,
+ .hsync_end = 1200 + 40 + 20,
+ .htotal = 1200 + 40 + 20 + 40,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 116,
+ .vsync_end = 1920 + 116 + 8,
+ .vtotal = 1920 + 116 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_himax83102_j02_desc = {
+ .modes = &starry_himax83102_j02_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_himax83102_j02_init_cmd,
+ .enable_gpio_init_value = 1,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1694,7 +1792,7 @@ static int boe_panel_add(struct boe_panel *boe)
return PTR_ERR(boe->enable_gpio);
}
- gpiod_set_value(boe->enable_gpio, 0);
+ gpiod_set_value(boe->enable_gpio, boe->desc->enable_gpio_init_value);
drm_panel_init(&boe->base, dev, &boe_panel_funcs,
DRM_MODE_CONNECTOR_DSI);
@@ -1793,6 +1891,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,2081101qfh032011-53g",
.data = &starry_qfh032011_53g_desc
},
+ { .compatible = "starry,himax83102-j02",
+ .data = &starry_himax83102_j02_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel ***
2023-05-19 3:23 [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-19 8:01 ` Cong Yang
2023-05-19 8:01 ` [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
` (2 more replies)
2023-05-22 9:13 ` [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel neil.armstrong
1 sibling, 3 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-19 8:01 UTC (permalink / raw)
To: sam, neil.armstrong, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel, Cong Yang
The previous patch is not based on drm-misc-next, resend this series.
Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel,
set the default high for RST at boe_panel_add and add lp11_before_reset flag.
Cong Yang (2):
drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 474 +++++++++++++++++-
1 file changed, 473 insertions(+), 1 deletion(-)
--
2.25.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
@ 2023-05-19 8:01 ` Cong Yang
2023-05-19 17:17 ` Doug Anderson
2023-05-19 8:01 ` [v1 2/2] drm/panel: Support for Starry-ili9882t " Cong Yang
2023-05-22 7:24 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** neil.armstrong
2 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-19 8:01 UTC (permalink / raw)
To: sam, neil.armstrong, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel, Cong Yang
The Starry-himax83102-j02 panel is a TDDI IC. From the datasheet[1],
it seems that the touch can communicate successfully only when the RST
signal is high. Since i2c_hid_core_probe comes after boe_panel_prepare
let's set the default high for RST at boe_panel_add. Also MIPI needs to
keep the LP11 state before the lcm_reset pin is pulled high,So increase
lp11_before_reset flag.
[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 103 +++++++++++++++++-
1 file changed, 102 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f5a6046f1d19..7aaa85b0de8a 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -37,6 +37,7 @@ struct panel_desc {
unsigned int lanes;
bool discharge_on_disable;
bool lp11_before_reset;
+ int enable_gpio_init_value;
};
struct boe_panel {
@@ -76,6 +77,75 @@ struct panel_init_cmd {
.len = sizeof((char[]){__VA_ARGS__}), \
.data = (char[]){__VA_ARGS__} }
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+ 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+ _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+ _INIT_DCS_CMD(0xCC, 0x02),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+ _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+ 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+ 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+ 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
+ _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
_INIT_DCS_CMD(0xFF, 0x20),
_INIT_DCS_CMD(0xFB, 0x01),
@@ -1698,6 +1768,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.init_cmds = starry_qfh032011_53g_init_cmd,
};
+static const struct drm_display_mode starry_himax83102_j02_default_mode = {
+ .clock = 161600,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 40,
+ .hsync_end = 1200 + 40 + 20,
+ .htotal = 1200 + 40 + 20 + 40,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 116,
+ .vsync_end = 1920 + 116 + 8,
+ .vtotal = 1920 + 116 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_himax83102_j02_desc = {
+ .modes = &starry_himax83102_j02_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_himax83102_j02_init_cmd,
+ .enable_gpio_init_value = 1,
+ .lp11_before_reset = true,
+};
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1772,7 +1870,7 @@ static int boe_panel_add(struct boe_panel *boe)
return PTR_ERR(boe->enable_gpio);
}
- gpiod_set_value(boe->enable_gpio, 0);
+ gpiod_set_value(boe->enable_gpio, boe->desc->enable_gpio_init_value);
drm_panel_init(&boe->base, dev, &boe_panel_funcs,
DRM_MODE_CONNECTOR_DSI);
@@ -1871,6 +1969,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,2081101qfh032011-53g",
.data = &starry_qfh032011_53g_desc
},
+ { .compatible = "starry,himax83102-j02",
+ .data = &starry_himax83102_j02_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v1 2/2] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
2023-05-19 8:01 ` [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-19 8:01 ` Cong Yang
2023-05-22 7:24 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** neil.armstrong
2 siblings, 0 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-19 8:01 UTC (permalink / raw)
To: sam, neil.armstrong, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel, Cong Yang
The Starry-ili9882 panel also is a TDDI IC. From the datasheet,panel
need the RST signal is high when touch communicate and also MIPI needs
to keep the LP11 state before the lcm_reset pin is pulled high. So add
enable_gpio_init_value and lp11_before_reset flag.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
1 file changed, 371 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 7aaa85b0de8a..8d564df6e5e3 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -146,6 +146,344 @@ static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
+ _INIT_DCS_CMD(0x00, 0x42),
+ _INIT_DCS_CMD(0x01, 0x11),
+ _INIT_DCS_CMD(0x02, 0x00),
+ _INIT_DCS_CMD(0x03, 0x00),
+
+ _INIT_DCS_CMD(0x04, 0x01),
+ _INIT_DCS_CMD(0x05, 0x11),
+ _INIT_DCS_CMD(0x06, 0x00),
+ _INIT_DCS_CMD(0x07, 0x00),
+
+ _INIT_DCS_CMD(0x08, 0x80),
+ _INIT_DCS_CMD(0x09, 0x81),
+ _INIT_DCS_CMD(0x0A, 0x71),
+ _INIT_DCS_CMD(0x0B, 0x00),
+
+ _INIT_DCS_CMD(0x0C, 0x00),
+ _INIT_DCS_CMD(0x0E, 0x1A),
+
+ _INIT_DCS_CMD(0x24, 0x00),
+ _INIT_DCS_CMD(0x25, 0x00),
+ _INIT_DCS_CMD(0x26, 0x00),
+ _INIT_DCS_CMD(0x27, 0x00),
+
+ _INIT_DCS_CMD(0x2C, 0xD4),
+ _INIT_DCS_CMD(0xB9, 0x40),
+
+ _INIT_DCS_CMD(0xB0, 0x11),
+
+ _INIT_DCS_CMD(0xE6, 0x32),
+ _INIT_DCS_CMD(0xD1, 0x30),
+
+ _INIT_DCS_CMD(0xD6, 0x55),
+
+ _INIT_DCS_CMD(0xD0, 0x01),
+ _INIT_DCS_CMD(0xE3, 0x93),
+ _INIT_DCS_CMD(0xE4, 0x00),
+ _INIT_DCS_CMD(0xE5, 0x80),
+
+ _INIT_DCS_CMD(0x31, 0x07),
+ _INIT_DCS_CMD(0x32, 0x07),
+ _INIT_DCS_CMD(0x33, 0x07),
+ _INIT_DCS_CMD(0x34, 0x07),
+ _INIT_DCS_CMD(0x35, 0x07),
+ _INIT_DCS_CMD(0x36, 0x01),
+ _INIT_DCS_CMD(0x37, 0x00),
+ _INIT_DCS_CMD(0x38, 0x28),
+ _INIT_DCS_CMD(0x39, 0x29),
+ _INIT_DCS_CMD(0x3A, 0x11),
+ _INIT_DCS_CMD(0x3B, 0x13),
+ _INIT_DCS_CMD(0x3C, 0x15),
+ _INIT_DCS_CMD(0x3D, 0x17),
+ _INIT_DCS_CMD(0x3E, 0x09),
+ _INIT_DCS_CMD(0x3F, 0x0D),
+ _INIT_DCS_CMD(0x40, 0x02),
+ _INIT_DCS_CMD(0x41, 0x02),
+ _INIT_DCS_CMD(0x42, 0x02),
+ _INIT_DCS_CMD(0x43, 0x02),
+ _INIT_DCS_CMD(0x44, 0x02),
+ _INIT_DCS_CMD(0x45, 0x02),
+ _INIT_DCS_CMD(0x46, 0x02),
+
+ _INIT_DCS_CMD(0x47, 0x07),
+ _INIT_DCS_CMD(0x48, 0x07),
+ _INIT_DCS_CMD(0x49, 0x07),
+ _INIT_DCS_CMD(0x4A, 0x07),
+ _INIT_DCS_CMD(0x4B, 0x07),
+ _INIT_DCS_CMD(0x4C, 0x01),
+ _INIT_DCS_CMD(0x4D, 0x00),
+ _INIT_DCS_CMD(0x4E, 0x28),
+ _INIT_DCS_CMD(0x4F, 0x29),
+ _INIT_DCS_CMD(0x50, 0x10),
+ _INIT_DCS_CMD(0x51, 0x12),
+ _INIT_DCS_CMD(0x52, 0x14),
+ _INIT_DCS_CMD(0x53, 0x16),
+ _INIT_DCS_CMD(0x54, 0x08),
+ _INIT_DCS_CMD(0x55, 0x0C),
+ _INIT_DCS_CMD(0x56, 0x02),
+ _INIT_DCS_CMD(0x57, 0x02),
+ _INIT_DCS_CMD(0x58, 0x02),
+ _INIT_DCS_CMD(0x59, 0x02),
+ _INIT_DCS_CMD(0x5A, 0x02),
+ _INIT_DCS_CMD(0x5B, 0x02),
+ _INIT_DCS_CMD(0x5C, 0x02),
+
+ _INIT_DCS_CMD(0x61, 0x07),
+ _INIT_DCS_CMD(0x62, 0x07),
+ _INIT_DCS_CMD(0x63, 0x07),
+ _INIT_DCS_CMD(0x64, 0x07),
+ _INIT_DCS_CMD(0x65, 0x07),
+ _INIT_DCS_CMD(0x66, 0x01),
+ _INIT_DCS_CMD(0x67, 0x00),
+ _INIT_DCS_CMD(0x68, 0x28),
+ _INIT_DCS_CMD(0x69, 0x29),
+ _INIT_DCS_CMD(0x6A, 0x16),
+ _INIT_DCS_CMD(0x6B, 0x14),
+ _INIT_DCS_CMD(0x6C, 0x12),
+ _INIT_DCS_CMD(0x6D, 0x10),
+ _INIT_DCS_CMD(0x6E, 0x0C),
+ _INIT_DCS_CMD(0x6F, 0x08),
+ _INIT_DCS_CMD(0x70, 0x02),
+ _INIT_DCS_CMD(0x71, 0x02),
+ _INIT_DCS_CMD(0x72, 0x02),
+ _INIT_DCS_CMD(0x73, 0x02),
+ _INIT_DCS_CMD(0x74, 0x02),
+ _INIT_DCS_CMD(0x75, 0x02),
+ _INIT_DCS_CMD(0x76, 0x02),
+
+ _INIT_DCS_CMD(0x77, 0x07),
+ _INIT_DCS_CMD(0x78, 0x07),
+ _INIT_DCS_CMD(0x79, 0x07),
+ _INIT_DCS_CMD(0x7A, 0x07),
+ _INIT_DCS_CMD(0x7B, 0x07),
+ _INIT_DCS_CMD(0x7C, 0x01),
+ _INIT_DCS_CMD(0x7D, 0x00),
+ _INIT_DCS_CMD(0x7E, 0x28),
+ _INIT_DCS_CMD(0x7F, 0x29),
+ _INIT_DCS_CMD(0x80, 0x17),
+ _INIT_DCS_CMD(0x81, 0x15),
+ _INIT_DCS_CMD(0x82, 0x13),
+ _INIT_DCS_CMD(0x83, 0x11),
+ _INIT_DCS_CMD(0x84, 0x0D),
+ _INIT_DCS_CMD(0x85, 0x09),
+ _INIT_DCS_CMD(0x86, 0x02),
+ _INIT_DCS_CMD(0x87, 0x07),
+ _INIT_DCS_CMD(0x88, 0x07),
+ _INIT_DCS_CMD(0x89, 0x07),
+ _INIT_DCS_CMD(0x8A, 0x07),
+ _INIT_DCS_CMD(0x8B, 0x07),
+ _INIT_DCS_CMD(0x8C, 0x07),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x02),
+ _INIT_DCS_CMD(0x29, 0x3A),
+ _INIT_DCS_CMD(0x2A, 0x3B),
+
+ _INIT_DCS_CMD(0x06, 0x01),
+ _INIT_DCS_CMD(0x07, 0x01),
+ _INIT_DCS_CMD(0x08, 0x0C),
+ _INIT_DCS_CMD(0x09, 0x44),
+
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x11),
+ _INIT_DCS_CMD(0x3D, 0x00),
+ _INIT_DCS_CMD(0x3A, 0x0C),
+ _INIT_DCS_CMD(0x3B, 0x44),
+
+ _INIT_DCS_CMD(0x53, 0x1F),
+ _INIT_DCS_CMD(0x5E, 0x40),
+ _INIT_DCS_CMD(0x84, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x03),
+ _INIT_DCS_CMD(0x20, 0x01),
+ _INIT_DCS_CMD(0x21, 0x3C),
+ _INIT_DCS_CMD(0x22, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0A),
+ _INIT_DCS_CMD(0xE0, 0x01),
+ _INIT_DCS_CMD(0xE2, 0x01),
+ _INIT_DCS_CMD(0xE5, 0x91),
+ _INIT_DCS_CMD(0xE6, 0x3C),
+ _INIT_DCS_CMD(0xE7, 0x00),
+ _INIT_DCS_CMD(0xE8, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x12),
+ _INIT_DCS_CMD(0x87, 0x2C),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x73, 0xE5),
+ _INIT_DCS_CMD(0x7F, 0x6B),
+ _INIT_DCS_CMD(0x6D, 0xA4),
+ _INIT_DCS_CMD(0x79, 0x54),
+ _INIT_DCS_CMD(0x69, 0x97),
+ _INIT_DCS_CMD(0x6A, 0x97),
+ _INIT_DCS_CMD(0xA5, 0x3F),
+ _INIT_DCS_CMD(0x61, 0xDA),
+ _INIT_DCS_CMD(0xA7, 0xF1),
+ _INIT_DCS_CMD(0x5F, 0x01),
+ _INIT_DCS_CMD(0x62, 0x3F),
+ _INIT_DCS_CMD(0x1D, 0x90),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0xC0, 0x80),
+ _INIT_DCS_CMD(0xC1, 0x07),
+ _INIT_DCS_CMD(0xCA, 0x58),
+ _INIT_DCS_CMD(0xCB, 0x02),
+ _INIT_DCS_CMD(0xCE, 0x58),
+ _INIT_DCS_CMD(0xCF, 0x02),
+ _INIT_DCS_CMD(0x67, 0x60),
+ _INIT_DCS_CMD(0x10, 0x00),
+ _INIT_DCS_CMD(0x92, 0x22),
+ _INIT_DCS_CMD(0xD3, 0x08),
+ _INIT_DCS_CMD(0xD6, 0x55),
+ _INIT_DCS_CMD(0xDC, 0x38),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x08),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+ _INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x81),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0C),
+ _INIT_DCS_CMD(0x00, 0x02),
+ _INIT_DCS_CMD(0x01, 0x00),
+ _INIT_DCS_CMD(0x02, 0x03),
+ _INIT_DCS_CMD(0x03, 0x01),
+ _INIT_DCS_CMD(0x04, 0x03),
+ _INIT_DCS_CMD(0x05, 0x02),
+ _INIT_DCS_CMD(0x06, 0x04),
+ _INIT_DCS_CMD(0x07, 0x03),
+ _INIT_DCS_CMD(0x08, 0x03),
+ _INIT_DCS_CMD(0x09, 0x04),
+ _INIT_DCS_CMD(0x0A, 0x04),
+ _INIT_DCS_CMD(0x0B, 0x05),
+ _INIT_DCS_CMD(0x0C, 0x04),
+ _INIT_DCS_CMD(0x0D, 0x06),
+ _INIT_DCS_CMD(0x0E, 0x05),
+ _INIT_DCS_CMD(0x0F, 0x07),
+ _INIT_DCS_CMD(0x10, 0x04),
+ _INIT_DCS_CMD(0x11, 0x08),
+ _INIT_DCS_CMD(0x12, 0x05),
+ _INIT_DCS_CMD(0x13, 0x09),
+ _INIT_DCS_CMD(0x14, 0x05),
+ _INIT_DCS_CMD(0x15, 0x0A),
+ _INIT_DCS_CMD(0x16, 0x06),
+ _INIT_DCS_CMD(0x17, 0x0B),
+ _INIT_DCS_CMD(0x18, 0x05),
+ _INIT_DCS_CMD(0x19, 0x0C),
+ _INIT_DCS_CMD(0x1A, 0x06),
+ _INIT_DCS_CMD(0x1B, 0x0D),
+ _INIT_DCS_CMD(0x1C, 0x06),
+ _INIT_DCS_CMD(0x1D, 0x0E),
+ _INIT_DCS_CMD(0x1E, 0x07),
+ _INIT_DCS_CMD(0x1F, 0x0F),
+ _INIT_DCS_CMD(0x20, 0x06),
+ _INIT_DCS_CMD(0x21, 0x10),
+ _INIT_DCS_CMD(0x22, 0x07),
+ _INIT_DCS_CMD(0x23, 0x11),
+ _INIT_DCS_CMD(0x24, 0x07),
+ _INIT_DCS_CMD(0x25, 0x12),
+ _INIT_DCS_CMD(0x26, 0x08),
+ _INIT_DCS_CMD(0x27, 0x13),
+ _INIT_DCS_CMD(0x28, 0x07),
+ _INIT_DCS_CMD(0x29, 0x14),
+ _INIT_DCS_CMD(0x2A, 0x08),
+ _INIT_DCS_CMD(0x2B, 0x15),
+ _INIT_DCS_CMD(0x2C, 0x08),
+ _INIT_DCS_CMD(0x2D, 0x16),
+ _INIT_DCS_CMD(0x2E, 0x09),
+ _INIT_DCS_CMD(0x2F, 0x17),
+ _INIT_DCS_CMD(0x30, 0x08),
+ _INIT_DCS_CMD(0x31, 0x18),
+ _INIT_DCS_CMD(0x32, 0x09),
+ _INIT_DCS_CMD(0x33, 0x19),
+ _INIT_DCS_CMD(0x34, 0x09),
+ _INIT_DCS_CMD(0x35, 0x1A),
+ _INIT_DCS_CMD(0x36, 0x0A),
+ _INIT_DCS_CMD(0x37, 0x1B),
+ _INIT_DCS_CMD(0x38, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x1C),
+ _INIT_DCS_CMD(0x3A, 0x0A),
+ _INIT_DCS_CMD(0x3B, 0x1D),
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x3D, 0x1E),
+ _INIT_DCS_CMD(0x3E, 0x0A),
+ _INIT_DCS_CMD(0x3F, 0x1F),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x01),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0E),
+ _INIT_DCS_CMD(0x02, 0x0C),
+ _INIT_DCS_CMD(0x20, 0x10),
+ _INIT_DCS_CMD(0x25, 0x16),
+ _INIT_DCS_CMD(0x26, 0xE0),
+ _INIT_DCS_CMD(0x27, 0x00),
+ _INIT_DCS_CMD(0x29, 0x71),
+ _INIT_DCS_CMD(0x2A, 0x46),
+ _INIT_DCS_CMD(0x2B, 0x1F),
+ _INIT_DCS_CMD(0x2D, 0xC7),
+ _INIT_DCS_CMD(0x31, 0x02),
+ _INIT_DCS_CMD(0x32, 0xDF),
+ _INIT_DCS_CMD(0x33, 0x5A),
+ _INIT_DCS_CMD(0x34, 0xC0),
+ _INIT_DCS_CMD(0x35, 0x5A),
+ _INIT_DCS_CMD(0x36, 0xC0),
+ _INIT_DCS_CMD(0x38, 0x65),
+ _INIT_DCS_CMD(0x80, 0x3E),
+ _INIT_DCS_CMD(0x81, 0xA0),
+ _INIT_DCS_CMD(0xB0, 0x01),
+ _INIT_DCS_CMD(0xB1, 0xCC),
+ _INIT_DCS_CMD(0xC0, 0x12),
+ _INIT_DCS_CMD(0xC2, 0xCC),
+ _INIT_DCS_CMD(0xC3, 0xCC),
+ _INIT_DCS_CMD(0xC4, 0xCC),
+ _INIT_DCS_CMD(0xC5, 0xCC),
+ _INIT_DCS_CMD(0xC6, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0xCC),
+ _INIT_DCS_CMD(0xC8, 0xCC),
+ _INIT_DCS_CMD(0xC9, 0xCC),
+ _INIT_DCS_CMD(0x30, 0x00),
+ _INIT_DCS_CMD(0x00, 0x81),
+ _INIT_DCS_CMD(0x08, 0x02),
+ _INIT_DCS_CMD(0x09, 0x00),
+ _INIT_DCS_CMD(0x07, 0x21),
+ _INIT_DCS_CMD(0x04, 0x10),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x1E),
+ _INIT_DCS_CMD(0x60, 0x00),
+ _INIT_DCS_CMD(0x64, 0x00),
+ _INIT_DCS_CMD(0x6D, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0B),
+ _INIT_DCS_CMD(0xA6, 0x44),
+ _INIT_DCS_CMD(0xA7, 0xB6),
+ _INIT_DCS_CMD(0xA8, 0x03),
+ _INIT_DCS_CMD(0xA9, 0x03),
+ _INIT_DCS_CMD(0xAA, 0x51),
+ _INIT_DCS_CMD(0xAB, 0x51),
+ _INIT_DCS_CMD(0xAC, 0x04),
+ _INIT_DCS_CMD(0xBD, 0x92),
+ _INIT_DCS_CMD(0xBE, 0xA1),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0x92, 0x22),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
_INIT_DCS_CMD(0xFF, 0x20),
_INIT_DCS_CMD(0xFB, 0x01),
@@ -1796,6 +2134,36 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.enable_gpio_init_value = 1,
.lp11_before_reset = true,
};
+
+static const struct drm_display_mode starry_ili9882t_default_mode = {
+ .clock = 165280,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 32,
+ .hsync_end = 1200 + 32 + 30,
+ .htotal = 1200 + 32 + 30 + 32,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 68,
+ .vsync_end = 1920 + 68 + 2,
+ .vtotal = 1920 + 68 + 2 + 10,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_ili9882t_desc = {
+ .modes = &starry_ili9882t_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_ili9882t_init_cmd,
+ .enable_gpio_init_value = 1,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1972,6 +2340,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,himax83102-j02",
.data = &starry_himax83102_j02_desc
},
+ { .compatible = "starry,ili9882t",
+ .data = &starry_ili9882t_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* Re: [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-19 8:01 ` [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-19 17:17 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-05-19 17:17 UTC (permalink / raw)
To: Cong Yang
Cc: sam, neil.armstrong, daniel, hsinyi, dri-devel, devicetree, linux-kernel
Hi,
On Fri, May 19, 2023 at 1:02 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The Starry-himax83102-j02 panel is a TDDI IC. From the datasheet[1],
> it seems that the touch can communicate successfully only when the RST
> signal is high. Since i2c_hid_core_probe comes after boe_panel_prepare
> let's set the default high for RST at boe_panel_add.
No, that doesn't work. There are no guarantees about the ordering of
the probe of the i2c_hid device and the panel and the order could
change from version to version of Linux. Also: deasserting this reset
early like this (before regulators are turned on) can cause leakage
since that will make the signal go high and the touchscreen can suck
current out of that line.
Is it possible to change the hardware to fix this and have separate
reset lines for the touchscreen and the panel?
For a long time, I have felt like we needed a better solution in Linux
for stuff like this, but I've never found a clean way to do it. We
really want the touchscreen to power on and off together with the
panel, where the panel is in charge and the touchscreen always powers
on after the panel and powers off before the panel. I can't promise
anything, but I can see if I can find some time to whip up a
prototype.
> @@ -1698,6 +1768,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
> .init_cmds = starry_qfh032011_53g_init_cmd,
> };
>
> +static const struct drm_display_mode starry_himax83102_j02_default_mode = {
> + .clock = 161600,
> + .hdisplay = 1200,
> + .hsync_start = 1200 + 40,
> + .hsync_end = 1200 + 40 + 20,
> + .htotal = 1200 + 40 + 20 + 40,
> + .vdisplay = 1920,
> + .vsync_start = 1920 + 116,
> + .vsync_end = 1920 + 116 + 8,
> + .vtotal = 1920 + 116 + 8 + 12,
> + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct panel_desc starry_himax83102_j02_desc = {
> + .modes = &starry_himax83102_j02_default_mode,
> + .bpc = 8,
> + .size = {
> + .width_mm = 141,
> + .height_mm = 226,
> + },
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> + MIPI_DSI_MODE_LPM,
> + .init_cmds = starry_himax83102_j02_init_cmd,
> + .enable_gpio_init_value = 1,
> + .lp11_before_reset = true,
> +};
> static int boe_panel_get_modes(struct drm_panel *panel,
nit: put a blank line above.
> @@ -1871,6 +1969,9 @@ static const struct of_device_id boe_of_match[] = {
> { .compatible = "starry,2081101qfh032011-53g",
> .data = &starry_qfh032011_53g_desc
> },
> + { .compatible = "starry,himax83102-j02",
> + .data = &starry_himax83102_j02_desc
You need device tree bindings for the above compatible string.
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel ***
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
2023-05-19 8:01 ` [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-05-19 8:01 ` [v1 2/2] drm/panel: Support for Starry-ili9882t " Cong Yang
@ 2023-05-22 7:24 ` neil.armstrong
[not found] ` <CAHwB_NK8wKaXw6Gy9CFnsZB0XrqokiHGXoMNAzd0R+myYg4gxQ@mail.gmail.com>
2 siblings, 1 reply; 41+ messages in thread
From: neil.armstrong @ 2023-05-22 7:24 UTC (permalink / raw)
To: Cong Yang, sam, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel
Hi,
On 19/05/2023 10:01, Cong Yang wrote:
> The previous patch is not based on drm-misc-next, resend this series.
> Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel,
> set the default high for RST at boe_panel_add and add lp11_before_reset flag.
If the reset gpio polarity is different, please change it in the DT by using
a different gpio flag instead of changing the driver.
However if the logic is different and reset must never be asserted to low,
the the bindings + driver to make the reset line optional and set a gpio-hog
in DT to keep it at a safe level.
Neil
> Cong Yang (2):
> drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
> drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
>
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 474 +++++++++++++++++-
> 1 file changed, 473 insertions(+), 1 deletion(-)
>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-19 3:23 [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
@ 2023-05-22 9:13 ` neil.armstrong
1 sibling, 0 replies; 41+ messages in thread
From: neil.armstrong @ 2023-05-22 9:13 UTC (permalink / raw)
To: Cong Yang, sam, daniel, dianders, hsinyi
Cc: dri-devel, devicetree, linux-kernel
Hi,
On 19/05/2023 05:23, Cong Yang wrote:
> The Starry-himax83102-j02 panel is a TDDI IC. From the datasheet[1],
> it seems that the touch can communicate successfully only when the RST
> signal is high. Since i2c_hid_core_probe comes after boe_panel_prepare
> let's set the default high for RST at boe_panel_add.
This is a higher level problem, here you basically never set the reset signal to low,
so instead make the reset signal optional and handle the reset elseshere like in a gpio-hog.
>
> [1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
PLease update the DT bindings first when introducing a new compatible.
Neil
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> ---
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 103 +++++++++++++++++-
> 1 file changed, 102 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index 783234ae0f57..0d325fc42bc4 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -36,6 +36,7 @@ struct panel_desc {
> const struct panel_init_cmd *init_cmds;
> unsigned int lanes;
> bool discharge_on_disable;
> + int enable_gpio_init_value;
> };
>
> struct boe_panel {
> @@ -75,6 +76,75 @@ struct panel_init_cmd {
> .len = sizeof((char[]){__VA_ARGS__}), \
> .data = (char[]){__VA_ARGS__} }
>
> +static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
> + _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
> + _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
> + 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
> + _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
> + _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
> + _INIT_DCS_CMD(0xE9, 0xCD),
> + _INIT_DCS_CMD(0xBA, 0x84),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
> + _INIT_DCS_CMD(0xBE, 0x20),
> + _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
> + _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
> + _INIT_DCS_CMD(0xE9, 0xCC),
> + _INIT_DCS_CMD(0xC7, 0x80),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xE9, 0xC6),
> + _INIT_DCS_CMD(0xC8, 0x97),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
> + _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
> + _INIT_DCS_CMD(0xCC, 0x02),
> + _INIT_DCS_CMD(0xE9, 0xC4),
> + _INIT_DCS_CMD(0xD0, 0x03),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
> + _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
> + _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
> + 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
> + _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
> + 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
> + _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
> + 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
> + _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
> + 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
> + _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
> + 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
> + _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
> + _INIT_DCS_CMD(0xBD, 0x01),
> + _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
> + _INIT_DCS_CMD(0xCB, 0x86),
> + _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
> + _INIT_DCS_CMD(0xE9, 0xC5),
> + _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
> + _INIT_DCS_CMD(0xBD, 0x02),
> + _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
> + _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
> + _INIT_DCS_CMD(0xBD, 0x03),
> + _INIT_DCS_CMD(0xE9, 0xC6),
> + _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
> + _INIT_DCS_CMD(0xBD, 0x00),
> + _INIT_DCS_CMD(0xE9, 0xC4),
> + _INIT_DCS_CMD(0xBA, 0x96),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xBD, 0x01),
> + _INIT_DCS_CMD(0xE9, 0xC5),
> + _INIT_DCS_CMD(0xBA, 0x4F),
> + _INIT_DCS_CMD(0xE9, 0x3F),
> + _INIT_DCS_CMD(0xBD, 0x00),
> + _INIT_DCS_CMD(0x11),
> + _INIT_DELAY_CMD(120),
> + _INIT_DCS_CMD(0x29),
> + {},
> +};
> +
> static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
> _INIT_DCS_CMD(0xFF, 0x20),
> _INIT_DCS_CMD(0xFB, 0x01),
> @@ -1620,6 +1690,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
> .init_cmds = starry_qfh032011_53g_init_cmd,
> };
>
> +static const struct drm_display_mode starry_himax83102_j02_default_mode = {
> + .clock = 161600,
> + .hdisplay = 1200,
> + .hsync_start = 1200 + 40,
> + .hsync_end = 1200 + 40 + 20,
> + .htotal = 1200 + 40 + 20 + 40,
> + .vdisplay = 1920,
> + .vsync_start = 1920 + 116,
> + .vsync_end = 1920 + 116 + 8,
> + .vtotal = 1920 + 116 + 8 + 12,
> + .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
> +};
> +
> +static const struct panel_desc starry_himax83102_j02_desc = {
> + .modes = &starry_himax83102_j02_default_mode,
> + .bpc = 8,
> + .size = {
> + .width_mm = 141,
> + .height_mm = 226,
> + },
> + .lanes = 4,
> + .format = MIPI_DSI_FMT_RGB888,
> + .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> + MIPI_DSI_MODE_LPM,
> + .init_cmds = starry_himax83102_j02_init_cmd,
> + .enable_gpio_init_value = 1,
> +};
> +
> static int boe_panel_get_modes(struct drm_panel *panel,
> struct drm_connector *connector)
> {
> @@ -1694,7 +1792,7 @@ static int boe_panel_add(struct boe_panel *boe)
> return PTR_ERR(boe->enable_gpio);
> }
>
> - gpiod_set_value(boe->enable_gpio, 0);
> + gpiod_set_value(boe->enable_gpio, boe->desc->enable_gpio_init_value);
>
> drm_panel_init(&boe->base, dev, &boe_panel_funcs,
> DRM_MODE_CONNECTOR_DSI);
> @@ -1793,6 +1891,9 @@ static const struct of_device_id boe_of_match[] = {
> { .compatible = "starry,2081101qfh032011-53g",
> .data = &starry_qfh032011_53g_desc
> },
> + { .compatible = "starry,himax83102-j02",
> + .data = &starry_himax83102_j02_desc
> + },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, boe_of_match);
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel ***
[not found] ` <CAHwB_NK8wKaXw6Gy9CFnsZB0XrqokiHGXoMNAzd0R+myYg4gxQ@mail.gmail.com>
@ 2023-05-23 21:04 ` Doug Anderson
2023-05-24 7:28 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
0 siblings, 2 replies; 41+ messages in thread
From: Doug Anderson @ 2023-05-23 21:04 UTC (permalink / raw)
To: cong yang
Cc: neil.armstrong, sam, daniel, hsinyi, dri-devel, devicetree, linux-kernel
Hi,
On Mon, May 22, 2023 at 1:01 AM cong yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> Hi,neil:
> Thank you for your reply, it's not that the polarity of reset is different. The state of this rst needs to be high during a certain period of time (when hid touch communicate,). I have tried to set the default property to high in DT, but from the log and waveform, the rseet single is set to low by boe_panel_add before hid touch communication.As shown in the picture, rst needs to be high before hid ready. Datasheet: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
To add some breadcrumbs, I think the issues is that panel/touchscreeen
are intertwined and really need a solution like the one proposed in my
series:
https://lore.kernel.org/r/20230523193017.4109557-1-dianders@chromium.org
Cong Yang tested an early version of my series and indicated that it
helped solve his problem. Presumably if that series (or something like
it) can land then we'll unblock the ability to support this hardware.
-Doug
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-23 21:04 ` Doug Anderson
@ 2023-05-24 7:28 ` Cong Yang
2023-05-24 7:28 ` [v2 1/4] drm/panel: Support for Starry-himax83102-j02 " Cong Yang
2023-05-24 20:22 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t " Conor Dooley
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
1 sibling, 2 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-24 7:28 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
Compare V1:Add compatible for Starry himax83102-j02 and Starry-ili9882t
in dt-bindings.
Cong Yang (4):
drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
dt-bindings: display: panel: Add compatible for Starry himax83102-j02
drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
dt-bindings: display: panel: Add compatible for Starry ili9882t
.../display/panel/boe,tv101wum-nl6.yaml | 4 +
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 471 ++++++++++++++++++
2 files changed, 475 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v2 1/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-24 7:28 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-24 7:28 ` Cong Yang
2023-05-24 21:12 ` Doug Anderson
2023-05-24 20:22 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t " Conor Dooley
1 sibling, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-24 7:28 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
needs to keep the LP11 state before the lcm_reset pin is pulled high, so
increase lp11_before_reset flag.
[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 100 ++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f5a6046f1d19..5c8ec263e11f 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -76,6 +76,75 @@ struct panel_init_cmd {
.len = sizeof((char[]){__VA_ARGS__}), \
.data = (char[]){__VA_ARGS__} }
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+ 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+ _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+ _INIT_DCS_CMD(0xCC, 0x02),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+ _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+ 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+ 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+ 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
+ _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
_INIT_DCS_CMD(0xFF, 0x20),
_INIT_DCS_CMD(0xFB, 0x01),
@@ -1698,6 +1767,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.init_cmds = starry_qfh032011_53g_init_cmd,
};
+static const struct drm_display_mode starry_himax83102_j02_default_mode = {
+ .clock = 161600,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 40,
+ .hsync_end = 1200 + 40 + 20,
+ .htotal = 1200 + 40 + 20 + 40,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 116,
+ .vsync_end = 1920 + 116 + 8,
+ .vtotal = 1920 + 116 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_himax83102_j02_desc = {
+ .modes = &starry_himax83102_j02_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_himax83102_j02_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1871,6 +1968,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,2081101qfh032011-53g",
.data = &starry_qfh032011_53g_desc
},
+ { .compatible = "starry,himax83102-j02",
+ .data = &starry_himax83102_j02_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02
2023-05-23 21:04 ` Doug Anderson
2023-05-24 7:28 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-24 7:44 ` Cong Yang
2023-05-24 7:44 ` [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
` (2 more replies)
1 sibling, 3 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-24 7:44 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index aed55608ebf6..28a7beeb8f92 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,6 +32,8 @@ properties:
- innolux,hj110iz-01a
# STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
- starry,2081101qfh032011-53g
+ # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+ - starry,himax83102-j02
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
@ 2023-05-24 7:44 ` Cong Yang
2023-05-24 21:12 ` Doug Anderson
2023-05-24 7:44 ` [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
2023-05-24 21:12 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Doug Anderson
2 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-24 7:44 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
to keep the LP11 state before the lcm_reset pin is pulled high. So add
lp11_before_reset flag.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
1 file changed, 371 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 5c8ec263e11f..896c8f4f1278 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -145,6 +145,346 @@ static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
+ _INIT_DELAY_CMD(5),
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
+ _INIT_DCS_CMD(0x00, 0x42),
+ _INIT_DCS_CMD(0x01, 0x11),
+ _INIT_DCS_CMD(0x02, 0x00),
+ _INIT_DCS_CMD(0x03, 0x00),
+
+ _INIT_DCS_CMD(0x04, 0x01),
+ _INIT_DCS_CMD(0x05, 0x11),
+ _INIT_DCS_CMD(0x06, 0x00),
+ _INIT_DCS_CMD(0x07, 0x00),
+
+ _INIT_DCS_CMD(0x08, 0x80),
+ _INIT_DCS_CMD(0x09, 0x81),
+ _INIT_DCS_CMD(0x0A, 0x71),
+ _INIT_DCS_CMD(0x0B, 0x00),
+
+ _INIT_DCS_CMD(0x0C, 0x00),
+ _INIT_DCS_CMD(0x0E, 0x1A),
+
+ _INIT_DCS_CMD(0x24, 0x00),
+ _INIT_DCS_CMD(0x25, 0x00),
+ _INIT_DCS_CMD(0x26, 0x00),
+ _INIT_DCS_CMD(0x27, 0x00),
+
+ _INIT_DCS_CMD(0x2C, 0xD4),
+ _INIT_DCS_CMD(0xB9, 0x40),
+
+ _INIT_DCS_CMD(0xB0, 0x11),
+
+ _INIT_DCS_CMD(0xE6, 0x32),
+ _INIT_DCS_CMD(0xD1, 0x30),
+
+ _INIT_DCS_CMD(0xD6, 0x55),
+
+ _INIT_DCS_CMD(0xD0, 0x01),
+ _INIT_DCS_CMD(0xE3, 0x93),
+ _INIT_DCS_CMD(0xE4, 0x00),
+ _INIT_DCS_CMD(0xE5, 0x80),
+
+ _INIT_DCS_CMD(0x31, 0x07),
+ _INIT_DCS_CMD(0x32, 0x07),
+ _INIT_DCS_CMD(0x33, 0x07),
+ _INIT_DCS_CMD(0x34, 0x07),
+ _INIT_DCS_CMD(0x35, 0x07),
+ _INIT_DCS_CMD(0x36, 0x01),
+ _INIT_DCS_CMD(0x37, 0x00),
+ _INIT_DCS_CMD(0x38, 0x28),
+ _INIT_DCS_CMD(0x39, 0x29),
+ _INIT_DCS_CMD(0x3A, 0x11),
+ _INIT_DCS_CMD(0x3B, 0x13),
+ _INIT_DCS_CMD(0x3C, 0x15),
+ _INIT_DCS_CMD(0x3D, 0x17),
+ _INIT_DCS_CMD(0x3E, 0x09),
+ _INIT_DCS_CMD(0x3F, 0x0D),
+ _INIT_DCS_CMD(0x40, 0x02),
+ _INIT_DCS_CMD(0x41, 0x02),
+ _INIT_DCS_CMD(0x42, 0x02),
+ _INIT_DCS_CMD(0x43, 0x02),
+ _INIT_DCS_CMD(0x44, 0x02),
+ _INIT_DCS_CMD(0x45, 0x02),
+ _INIT_DCS_CMD(0x46, 0x02),
+
+ _INIT_DCS_CMD(0x47, 0x07),
+ _INIT_DCS_CMD(0x48, 0x07),
+ _INIT_DCS_CMD(0x49, 0x07),
+ _INIT_DCS_CMD(0x4A, 0x07),
+ _INIT_DCS_CMD(0x4B, 0x07),
+ _INIT_DCS_CMD(0x4C, 0x01),
+ _INIT_DCS_CMD(0x4D, 0x00),
+ _INIT_DCS_CMD(0x4E, 0x28),
+ _INIT_DCS_CMD(0x4F, 0x29),
+ _INIT_DCS_CMD(0x50, 0x10),
+ _INIT_DCS_CMD(0x51, 0x12),
+ _INIT_DCS_CMD(0x52, 0x14),
+ _INIT_DCS_CMD(0x53, 0x16),
+ _INIT_DCS_CMD(0x54, 0x08),
+ _INIT_DCS_CMD(0x55, 0x0C),
+ _INIT_DCS_CMD(0x56, 0x02),
+ _INIT_DCS_CMD(0x57, 0x02),
+ _INIT_DCS_CMD(0x58, 0x02),
+ _INIT_DCS_CMD(0x59, 0x02),
+ _INIT_DCS_CMD(0x5A, 0x02),
+ _INIT_DCS_CMD(0x5B, 0x02),
+ _INIT_DCS_CMD(0x5C, 0x02),
+
+ _INIT_DCS_CMD(0x61, 0x07),
+ _INIT_DCS_CMD(0x62, 0x07),
+ _INIT_DCS_CMD(0x63, 0x07),
+ _INIT_DCS_CMD(0x64, 0x07),
+ _INIT_DCS_CMD(0x65, 0x07),
+ _INIT_DCS_CMD(0x66, 0x01),
+ _INIT_DCS_CMD(0x67, 0x00),
+ _INIT_DCS_CMD(0x68, 0x28),
+ _INIT_DCS_CMD(0x69, 0x29),
+ _INIT_DCS_CMD(0x6A, 0x16),
+ _INIT_DCS_CMD(0x6B, 0x14),
+ _INIT_DCS_CMD(0x6C, 0x12),
+ _INIT_DCS_CMD(0x6D, 0x10),
+ _INIT_DCS_CMD(0x6E, 0x0C),
+ _INIT_DCS_CMD(0x6F, 0x08),
+ _INIT_DCS_CMD(0x70, 0x02),
+ _INIT_DCS_CMD(0x71, 0x02),
+ _INIT_DCS_CMD(0x72, 0x02),
+ _INIT_DCS_CMD(0x73, 0x02),
+ _INIT_DCS_CMD(0x74, 0x02),
+ _INIT_DCS_CMD(0x75, 0x02),
+ _INIT_DCS_CMD(0x76, 0x02),
+
+ _INIT_DCS_CMD(0x77, 0x07),
+ _INIT_DCS_CMD(0x78, 0x07),
+ _INIT_DCS_CMD(0x79, 0x07),
+ _INIT_DCS_CMD(0x7A, 0x07),
+ _INIT_DCS_CMD(0x7B, 0x07),
+ _INIT_DCS_CMD(0x7C, 0x01),
+ _INIT_DCS_CMD(0x7D, 0x00),
+ _INIT_DCS_CMD(0x7E, 0x28),
+ _INIT_DCS_CMD(0x7F, 0x29),
+ _INIT_DCS_CMD(0x80, 0x17),
+ _INIT_DCS_CMD(0x81, 0x15),
+ _INIT_DCS_CMD(0x82, 0x13),
+ _INIT_DCS_CMD(0x83, 0x11),
+ _INIT_DCS_CMD(0x84, 0x0D),
+ _INIT_DCS_CMD(0x85, 0x09),
+ _INIT_DCS_CMD(0x86, 0x02),
+ _INIT_DCS_CMD(0x87, 0x07),
+ _INIT_DCS_CMD(0x88, 0x07),
+ _INIT_DCS_CMD(0x89, 0x07),
+ _INIT_DCS_CMD(0x8A, 0x07),
+ _INIT_DCS_CMD(0x8B, 0x07),
+ _INIT_DCS_CMD(0x8C, 0x07),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x02),
+ _INIT_DCS_CMD(0x29, 0x3A),
+ _INIT_DCS_CMD(0x2A, 0x3B),
+
+ _INIT_DCS_CMD(0x06, 0x01),
+ _INIT_DCS_CMD(0x07, 0x01),
+ _INIT_DCS_CMD(0x08, 0x0C),
+ _INIT_DCS_CMD(0x09, 0x44),
+
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x11),
+ _INIT_DCS_CMD(0x3D, 0x00),
+ _INIT_DCS_CMD(0x3A, 0x0C),
+ _INIT_DCS_CMD(0x3B, 0x44),
+
+ _INIT_DCS_CMD(0x53, 0x1F),
+ _INIT_DCS_CMD(0x5E, 0x40),
+ _INIT_DCS_CMD(0x84, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x03),
+ _INIT_DCS_CMD(0x20, 0x01),
+ _INIT_DCS_CMD(0x21, 0x3C),
+ _INIT_DCS_CMD(0x22, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0A),
+ _INIT_DCS_CMD(0xE0, 0x01),
+ _INIT_DCS_CMD(0xE2, 0x01),
+ _INIT_DCS_CMD(0xE5, 0x91),
+ _INIT_DCS_CMD(0xE6, 0x3C),
+ _INIT_DCS_CMD(0xE7, 0x00),
+ _INIT_DCS_CMD(0xE8, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x12),
+ _INIT_DCS_CMD(0x87, 0x2C),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x73, 0xE5),
+ _INIT_DCS_CMD(0x7F, 0x6B),
+ _INIT_DCS_CMD(0x6D, 0xA4),
+ _INIT_DCS_CMD(0x79, 0x54),
+ _INIT_DCS_CMD(0x69, 0x97),
+ _INIT_DCS_CMD(0x6A, 0x97),
+ _INIT_DCS_CMD(0xA5, 0x3F),
+ _INIT_DCS_CMD(0x61, 0xDA),
+ _INIT_DCS_CMD(0xA7, 0xF1),
+ _INIT_DCS_CMD(0x5F, 0x01),
+ _INIT_DCS_CMD(0x62, 0x3F),
+ _INIT_DCS_CMD(0x1D, 0x90),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0xC0, 0x80),
+ _INIT_DCS_CMD(0xC1, 0x07),
+ _INIT_DCS_CMD(0xCA, 0x58),
+ _INIT_DCS_CMD(0xCB, 0x02),
+ _INIT_DCS_CMD(0xCE, 0x58),
+ _INIT_DCS_CMD(0xCF, 0x02),
+ _INIT_DCS_CMD(0x67, 0x60),
+ _INIT_DCS_CMD(0x10, 0x00),
+ _INIT_DCS_CMD(0x92, 0x22),
+ _INIT_DCS_CMD(0xD3, 0x08),
+ _INIT_DCS_CMD(0xD6, 0x55),
+ _INIT_DCS_CMD(0xDC, 0x38),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x08),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+ _INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x81),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0C),
+ _INIT_DCS_CMD(0x00, 0x02),
+ _INIT_DCS_CMD(0x01, 0x00),
+ _INIT_DCS_CMD(0x02, 0x03),
+ _INIT_DCS_CMD(0x03, 0x01),
+ _INIT_DCS_CMD(0x04, 0x03),
+ _INIT_DCS_CMD(0x05, 0x02),
+ _INIT_DCS_CMD(0x06, 0x04),
+ _INIT_DCS_CMD(0x07, 0x03),
+ _INIT_DCS_CMD(0x08, 0x03),
+ _INIT_DCS_CMD(0x09, 0x04),
+ _INIT_DCS_CMD(0x0A, 0x04),
+ _INIT_DCS_CMD(0x0B, 0x05),
+ _INIT_DCS_CMD(0x0C, 0x04),
+ _INIT_DCS_CMD(0x0D, 0x06),
+ _INIT_DCS_CMD(0x0E, 0x05),
+ _INIT_DCS_CMD(0x0F, 0x07),
+ _INIT_DCS_CMD(0x10, 0x04),
+ _INIT_DCS_CMD(0x11, 0x08),
+ _INIT_DCS_CMD(0x12, 0x05),
+ _INIT_DCS_CMD(0x13, 0x09),
+ _INIT_DCS_CMD(0x14, 0x05),
+ _INIT_DCS_CMD(0x15, 0x0A),
+ _INIT_DCS_CMD(0x16, 0x06),
+ _INIT_DCS_CMD(0x17, 0x0B),
+ _INIT_DCS_CMD(0x18, 0x05),
+ _INIT_DCS_CMD(0x19, 0x0C),
+ _INIT_DCS_CMD(0x1A, 0x06),
+ _INIT_DCS_CMD(0x1B, 0x0D),
+ _INIT_DCS_CMD(0x1C, 0x06),
+ _INIT_DCS_CMD(0x1D, 0x0E),
+ _INIT_DCS_CMD(0x1E, 0x07),
+ _INIT_DCS_CMD(0x1F, 0x0F),
+ _INIT_DCS_CMD(0x20, 0x06),
+ _INIT_DCS_CMD(0x21, 0x10),
+ _INIT_DCS_CMD(0x22, 0x07),
+ _INIT_DCS_CMD(0x23, 0x11),
+ _INIT_DCS_CMD(0x24, 0x07),
+ _INIT_DCS_CMD(0x25, 0x12),
+ _INIT_DCS_CMD(0x26, 0x08),
+ _INIT_DCS_CMD(0x27, 0x13),
+ _INIT_DCS_CMD(0x28, 0x07),
+ _INIT_DCS_CMD(0x29, 0x14),
+ _INIT_DCS_CMD(0x2A, 0x08),
+ _INIT_DCS_CMD(0x2B, 0x15),
+ _INIT_DCS_CMD(0x2C, 0x08),
+ _INIT_DCS_CMD(0x2D, 0x16),
+ _INIT_DCS_CMD(0x2E, 0x09),
+ _INIT_DCS_CMD(0x2F, 0x17),
+ _INIT_DCS_CMD(0x30, 0x08),
+ _INIT_DCS_CMD(0x31, 0x18),
+ _INIT_DCS_CMD(0x32, 0x09),
+ _INIT_DCS_CMD(0x33, 0x19),
+ _INIT_DCS_CMD(0x34, 0x09),
+ _INIT_DCS_CMD(0x35, 0x1A),
+ _INIT_DCS_CMD(0x36, 0x0A),
+ _INIT_DCS_CMD(0x37, 0x1B),
+ _INIT_DCS_CMD(0x38, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x1C),
+ _INIT_DCS_CMD(0x3A, 0x0A),
+ _INIT_DCS_CMD(0x3B, 0x1D),
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x3D, 0x1E),
+ _INIT_DCS_CMD(0x3E, 0x0A),
+ _INIT_DCS_CMD(0x3F, 0x1F),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x01),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0E),
+ _INIT_DCS_CMD(0x02, 0x0C),
+ _INIT_DCS_CMD(0x20, 0x10),
+ _INIT_DCS_CMD(0x25, 0x16),
+ _INIT_DCS_CMD(0x26, 0xE0),
+ _INIT_DCS_CMD(0x27, 0x00),
+ _INIT_DCS_CMD(0x29, 0x71),
+ _INIT_DCS_CMD(0x2A, 0x46),
+ _INIT_DCS_CMD(0x2B, 0x1F),
+ _INIT_DCS_CMD(0x2D, 0xC7),
+ _INIT_DCS_CMD(0x31, 0x02),
+ _INIT_DCS_CMD(0x32, 0xDF),
+ _INIT_DCS_CMD(0x33, 0x5A),
+ _INIT_DCS_CMD(0x34, 0xC0),
+ _INIT_DCS_CMD(0x35, 0x5A),
+ _INIT_DCS_CMD(0x36, 0xC0),
+ _INIT_DCS_CMD(0x38, 0x65),
+ _INIT_DCS_CMD(0x80, 0x3E),
+ _INIT_DCS_CMD(0x81, 0xA0),
+ _INIT_DCS_CMD(0xB0, 0x01),
+ _INIT_DCS_CMD(0xB1, 0xCC),
+ _INIT_DCS_CMD(0xC0, 0x12),
+ _INIT_DCS_CMD(0xC2, 0xCC),
+ _INIT_DCS_CMD(0xC3, 0xCC),
+ _INIT_DCS_CMD(0xC4, 0xCC),
+ _INIT_DCS_CMD(0xC5, 0xCC),
+ _INIT_DCS_CMD(0xC6, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0xCC),
+ _INIT_DCS_CMD(0xC8, 0xCC),
+ _INIT_DCS_CMD(0xC9, 0xCC),
+ _INIT_DCS_CMD(0x30, 0x00),
+ _INIT_DCS_CMD(0x00, 0x81),
+ _INIT_DCS_CMD(0x08, 0x02),
+ _INIT_DCS_CMD(0x09, 0x00),
+ _INIT_DCS_CMD(0x07, 0x21),
+ _INIT_DCS_CMD(0x04, 0x10),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x1E),
+ _INIT_DCS_CMD(0x60, 0x00),
+ _INIT_DCS_CMD(0x64, 0x00),
+ _INIT_DCS_CMD(0x6D, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0B),
+ _INIT_DCS_CMD(0xA6, 0x44),
+ _INIT_DCS_CMD(0xA7, 0xB6),
+ _INIT_DCS_CMD(0xA8, 0x03),
+ _INIT_DCS_CMD(0xA9, 0x03),
+ _INIT_DCS_CMD(0xAA, 0x51),
+ _INIT_DCS_CMD(0xAB, 0x51),
+ _INIT_DCS_CMD(0xAC, 0x04),
+ _INIT_DCS_CMD(0xBD, 0x92),
+ _INIT_DCS_CMD(0xBE, 0xA1),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0x92, 0x22),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ _INIT_DELAY_CMD(20),
+ {},
+};
+
static const struct panel_init_cmd boe_tv110c9m_init_cmd[] = {
_INIT_DCS_CMD(0xFF, 0x20),
_INIT_DCS_CMD(0xFB, 0x01),
@@ -1795,6 +2135,34 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.lp11_before_reset = true,
};
+static const struct drm_display_mode starry_ili9882t_default_mode = {
+ .clock = 165280,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 32,
+ .hsync_end = 1200 + 32 + 30,
+ .htotal = 1200 + 32 + 30 + 32,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 68,
+ .vsync_end = 1920 + 68 + 2,
+ .vtotal = 1920 + 68 + 2 + 10,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_ili9882t_desc = {
+ .modes = &starry_ili9882t_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_ili9882t_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1971,6 +2339,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,himax83102-j02",
.data = &starry_himax83102_j02_desc
},
+ { .compatible = "starry,ili9882t",
+ .data = &starry_ili9882t_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-24 7:44 ` [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-24 7:44 ` Cong Yang
2023-05-24 21:13 ` Doug Anderson
2023-05-24 21:12 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Doug Anderson
2 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-24 7:44 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 28a7beeb8f92..906ef62709b8 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -34,6 +34,8 @@ properties:
- starry,2081101qfh032011-53g
# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
- starry,himax83102-j02
+ # STARRY ili9882t 10.51" WUXGA TFT LCD panel
+ - starry,ili9882t
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* Re: [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-24 7:28 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-24 7:28 ` [v2 1/4] drm/panel: Support for Starry-himax83102-j02 " Cong Yang
@ 2023-05-24 20:22 ` Conor Dooley
1 sibling, 0 replies; 41+ messages in thread
From: Conor Dooley @ 2023-05-24 20:22 UTC (permalink / raw)
To: Cong Yang
Cc: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 503 bytes --]
On Wed, May 24, 2023 at 03:28:12PM +0800, Cong Yang wrote:
> Compare V1:Add compatible for Starry himax83102-j02 and Starry-ili9882t
> in dt-bindings.
BTW, my mailer doesn't like how you threaded these patches, I guess you
sent them as a reply to something I was not CCed on.
> dt-bindings: display: panel: Add compatible for Starry himax83102-j02
> dt-bindings: display: panel: Add compatible for Starry ili9882t
These two are
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v2 1/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-24 7:28 ` [v2 1/4] drm/panel: Support for Starry-himax83102-j02 " Cong Yang
@ 2023-05-24 21:12 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-05-24 21:12 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Wed, May 24, 2023 at 12:28 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
> with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
> needs to keep the LP11 state before the lcm_reset pin is pulled high, so
> increase lp11_before_reset flag.
>
> [1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> ---
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> index f5a6046f1d19..5c8ec263e11f 100644
> --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
> @@ -76,6 +76,75 @@ struct panel_init_cmd {
> .len = sizeof((char[]){__VA_ARGS__}), \
> .data = (char[]){__VA_ARGS__} }
>
> +static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
nit: Please have the order of the tables match the order they're
referenced. That means this should come _after_
"starry_qfh032011_53g_init_cmd", not at the start of the tables.
-Doug
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-24 7:44 ` [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-24 7:44 ` [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
@ 2023-05-24 21:12 ` Doug Anderson
2 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-05-24 21:12 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Wed, May 24, 2023 at 12:45 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> ---
> .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
> 1 file changed, 2 insertions(+)
nit: bindings usually land first, so you should swap the order of
patch #1 and patch #2 in your series.
In any case:
Reviewed-by: Douglas Anderson <dianders@chromium.org>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-24 7:44 ` [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-24 21:12 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-05-24 21:12 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Wed, May 24, 2023 at 12:45 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> to keep the LP11 state before the lcm_reset pin is pulled high. So add
> lp11_before_reset flag.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> ---
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
> 1 file changed, 371 insertions(+)
Assuming you order the table in the proper place like I requested for
("drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel"),
then:
Reviewed-by: Douglas Anderson <dianders@chromium.org>
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t
2023-05-24 7:44 ` [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
@ 2023-05-24 21:13 ` Doug Anderson
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
0 siblings, 1 reply; 41+ messages in thread
From: Doug Anderson @ 2023-05-24 21:13 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Wed, May 24, 2023 at 12:45 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> ---
> .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
> 1 file changed, 2 insertions(+)
nit: bindings usually land first, so you should swap the order of
patch #3 and patch #4 in your series.
In any case:
Reviewed-by: Douglas Anderson <dianders@chromium.org>
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-24 21:13 ` Doug Anderson
@ 2023-05-25 2:49 ` Cong Yang
2023-05-25 2:49 ` [v3 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
` (4 more replies)
0 siblings, 5 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-25 2:49 UTC (permalink / raw)
To: dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, neil.armstrong, robh+dt,
sam, Cong Yang
Compare V2: order of the tables match the order they're
referenced.
Cong Yang (4):
dt-bindings: display: panel: Add compatible for Starry himax83102-j02
drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
dt-bindings: display: panel: Add compatible for Starry ili9882t
drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
.../display/panel/boe,tv101wum-nl6.yaml | 4 +
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 471 ++++++++++++++++++
2 files changed, 475 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v3 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-25 2:49 ` Cong Yang
2023-05-25 2:49 ` [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
` (3 subsequent siblings)
4 siblings, 0 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-25 2:49 UTC (permalink / raw)
To: dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, neil.armstrong, robh+dt,
sam, Cong Yang, Conor Dooley
The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index aed55608ebf6..28a7beeb8f92 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,6 +32,8 @@ properties:
- innolux,hj110iz-01a
# STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
- starry,2081101qfh032011-53g
+ # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+ - starry,himax83102-j02
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-25 2:49 ` [v3 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
@ 2023-05-25 2:49 ` Cong Yang
2023-05-25 6:26 ` Conor Dooley
2023-05-25 2:49 ` [v3 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
` (2 subsequent siblings)
4 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-25 2:49 UTC (permalink / raw)
To: dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, neil.armstrong, robh+dt,
sam, Cong Yang, Conor Dooley
The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
needs to keep the LP11 state before the lcm_reset pin is pulled high, so
increase lp11_before_reset flag.
[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 100 ++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f5a6046f1d19..0772d96e446c 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1301,6 +1301,75 @@ static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+ 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+ _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+ _INIT_DCS_CMD(0xCC, 0x02),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+ _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+ 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+ 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+ 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
+ _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -1698,6 +1767,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.init_cmds = starry_qfh032011_53g_init_cmd,
};
+static const struct drm_display_mode starry_himax83102_j02_default_mode = {
+ .clock = 161600,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 40,
+ .hsync_end = 1200 + 40 + 20,
+ .htotal = 1200 + 40 + 20 + 40,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 116,
+ .vsync_end = 1920 + 116 + 8,
+ .vtotal = 1920 + 116 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_himax83102_j02_desc = {
+ .modes = &starry_himax83102_j02_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_himax83102_j02_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1871,6 +1968,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,2081101qfh032011-53g",
.data = &starry_qfh032011_53g_desc
},
+ { .compatible = "starry,himax83102-j02",
+ .data = &starry_himax83102_j02_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v3 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-25 2:49 ` [v3 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-25 2:49 ` [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-25 2:49 ` Cong Yang
2023-05-25 2:50 ` [v3 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-25 7:59 ` [v3 0/4] Support Starry-himax83102-j02 and " neil.armstrong
4 siblings, 0 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-25 2:49 UTC (permalink / raw)
To: dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, neil.armstrong, robh+dt,
sam, Cong Yang, Conor Dooley
The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 28a7beeb8f92..906ef62709b8 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -34,6 +34,8 @@ properties:
- starry,2081101qfh032011-53g
# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
- starry,himax83102-j02
+ # STARRY ili9882t 10.51" WUXGA TFT LCD panel
+ - starry,ili9882t
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v3 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
` (2 preceding siblings ...)
2023-05-25 2:49 ` [v3 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
@ 2023-05-25 2:50 ` Cong Yang
2023-05-25 7:59 ` [v3 0/4] Support Starry-himax83102-j02 and " neil.armstrong
4 siblings, 0 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-25 2:50 UTC (permalink / raw)
To: dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, neil.armstrong, robh+dt,
sam, Cong Yang, Conor Dooley
The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
to keep the LP11 state before the lcm_reset pin is pulled high. So add
lp11_before_reset flag.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
1 file changed, 371 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 0772d96e446c..720b77964fcf 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1370,6 +1370,346 @@ static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
+ _INIT_DELAY_CMD(5),
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
+ _INIT_DCS_CMD(0x00, 0x42),
+ _INIT_DCS_CMD(0x01, 0x11),
+ _INIT_DCS_CMD(0x02, 0x00),
+ _INIT_DCS_CMD(0x03, 0x00),
+
+ _INIT_DCS_CMD(0x04, 0x01),
+ _INIT_DCS_CMD(0x05, 0x11),
+ _INIT_DCS_CMD(0x06, 0x00),
+ _INIT_DCS_CMD(0x07, 0x00),
+
+ _INIT_DCS_CMD(0x08, 0x80),
+ _INIT_DCS_CMD(0x09, 0x81),
+ _INIT_DCS_CMD(0x0A, 0x71),
+ _INIT_DCS_CMD(0x0B, 0x00),
+
+ _INIT_DCS_CMD(0x0C, 0x00),
+ _INIT_DCS_CMD(0x0E, 0x1A),
+
+ _INIT_DCS_CMD(0x24, 0x00),
+ _INIT_DCS_CMD(0x25, 0x00),
+ _INIT_DCS_CMD(0x26, 0x00),
+ _INIT_DCS_CMD(0x27, 0x00),
+
+ _INIT_DCS_CMD(0x2C, 0xD4),
+ _INIT_DCS_CMD(0xB9, 0x40),
+
+ _INIT_DCS_CMD(0xB0, 0x11),
+
+ _INIT_DCS_CMD(0xE6, 0x32),
+ _INIT_DCS_CMD(0xD1, 0x30),
+
+ _INIT_DCS_CMD(0xD6, 0x55),
+
+ _INIT_DCS_CMD(0xD0, 0x01),
+ _INIT_DCS_CMD(0xE3, 0x93),
+ _INIT_DCS_CMD(0xE4, 0x00),
+ _INIT_DCS_CMD(0xE5, 0x80),
+
+ _INIT_DCS_CMD(0x31, 0x07),
+ _INIT_DCS_CMD(0x32, 0x07),
+ _INIT_DCS_CMD(0x33, 0x07),
+ _INIT_DCS_CMD(0x34, 0x07),
+ _INIT_DCS_CMD(0x35, 0x07),
+ _INIT_DCS_CMD(0x36, 0x01),
+ _INIT_DCS_CMD(0x37, 0x00),
+ _INIT_DCS_CMD(0x38, 0x28),
+ _INIT_DCS_CMD(0x39, 0x29),
+ _INIT_DCS_CMD(0x3A, 0x11),
+ _INIT_DCS_CMD(0x3B, 0x13),
+ _INIT_DCS_CMD(0x3C, 0x15),
+ _INIT_DCS_CMD(0x3D, 0x17),
+ _INIT_DCS_CMD(0x3E, 0x09),
+ _INIT_DCS_CMD(0x3F, 0x0D),
+ _INIT_DCS_CMD(0x40, 0x02),
+ _INIT_DCS_CMD(0x41, 0x02),
+ _INIT_DCS_CMD(0x42, 0x02),
+ _INIT_DCS_CMD(0x43, 0x02),
+ _INIT_DCS_CMD(0x44, 0x02),
+ _INIT_DCS_CMD(0x45, 0x02),
+ _INIT_DCS_CMD(0x46, 0x02),
+
+ _INIT_DCS_CMD(0x47, 0x07),
+ _INIT_DCS_CMD(0x48, 0x07),
+ _INIT_DCS_CMD(0x49, 0x07),
+ _INIT_DCS_CMD(0x4A, 0x07),
+ _INIT_DCS_CMD(0x4B, 0x07),
+ _INIT_DCS_CMD(0x4C, 0x01),
+ _INIT_DCS_CMD(0x4D, 0x00),
+ _INIT_DCS_CMD(0x4E, 0x28),
+ _INIT_DCS_CMD(0x4F, 0x29),
+ _INIT_DCS_CMD(0x50, 0x10),
+ _INIT_DCS_CMD(0x51, 0x12),
+ _INIT_DCS_CMD(0x52, 0x14),
+ _INIT_DCS_CMD(0x53, 0x16),
+ _INIT_DCS_CMD(0x54, 0x08),
+ _INIT_DCS_CMD(0x55, 0x0C),
+ _INIT_DCS_CMD(0x56, 0x02),
+ _INIT_DCS_CMD(0x57, 0x02),
+ _INIT_DCS_CMD(0x58, 0x02),
+ _INIT_DCS_CMD(0x59, 0x02),
+ _INIT_DCS_CMD(0x5A, 0x02),
+ _INIT_DCS_CMD(0x5B, 0x02),
+ _INIT_DCS_CMD(0x5C, 0x02),
+
+ _INIT_DCS_CMD(0x61, 0x07),
+ _INIT_DCS_CMD(0x62, 0x07),
+ _INIT_DCS_CMD(0x63, 0x07),
+ _INIT_DCS_CMD(0x64, 0x07),
+ _INIT_DCS_CMD(0x65, 0x07),
+ _INIT_DCS_CMD(0x66, 0x01),
+ _INIT_DCS_CMD(0x67, 0x00),
+ _INIT_DCS_CMD(0x68, 0x28),
+ _INIT_DCS_CMD(0x69, 0x29),
+ _INIT_DCS_CMD(0x6A, 0x16),
+ _INIT_DCS_CMD(0x6B, 0x14),
+ _INIT_DCS_CMD(0x6C, 0x12),
+ _INIT_DCS_CMD(0x6D, 0x10),
+ _INIT_DCS_CMD(0x6E, 0x0C),
+ _INIT_DCS_CMD(0x6F, 0x08),
+ _INIT_DCS_CMD(0x70, 0x02),
+ _INIT_DCS_CMD(0x71, 0x02),
+ _INIT_DCS_CMD(0x72, 0x02),
+ _INIT_DCS_CMD(0x73, 0x02),
+ _INIT_DCS_CMD(0x74, 0x02),
+ _INIT_DCS_CMD(0x75, 0x02),
+ _INIT_DCS_CMD(0x76, 0x02),
+
+ _INIT_DCS_CMD(0x77, 0x07),
+ _INIT_DCS_CMD(0x78, 0x07),
+ _INIT_DCS_CMD(0x79, 0x07),
+ _INIT_DCS_CMD(0x7A, 0x07),
+ _INIT_DCS_CMD(0x7B, 0x07),
+ _INIT_DCS_CMD(0x7C, 0x01),
+ _INIT_DCS_CMD(0x7D, 0x00),
+ _INIT_DCS_CMD(0x7E, 0x28),
+ _INIT_DCS_CMD(0x7F, 0x29),
+ _INIT_DCS_CMD(0x80, 0x17),
+ _INIT_DCS_CMD(0x81, 0x15),
+ _INIT_DCS_CMD(0x82, 0x13),
+ _INIT_DCS_CMD(0x83, 0x11),
+ _INIT_DCS_CMD(0x84, 0x0D),
+ _INIT_DCS_CMD(0x85, 0x09),
+ _INIT_DCS_CMD(0x86, 0x02),
+ _INIT_DCS_CMD(0x87, 0x07),
+ _INIT_DCS_CMD(0x88, 0x07),
+ _INIT_DCS_CMD(0x89, 0x07),
+ _INIT_DCS_CMD(0x8A, 0x07),
+ _INIT_DCS_CMD(0x8B, 0x07),
+ _INIT_DCS_CMD(0x8C, 0x07),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x02),
+ _INIT_DCS_CMD(0x29, 0x3A),
+ _INIT_DCS_CMD(0x2A, 0x3B),
+
+ _INIT_DCS_CMD(0x06, 0x01),
+ _INIT_DCS_CMD(0x07, 0x01),
+ _INIT_DCS_CMD(0x08, 0x0C),
+ _INIT_DCS_CMD(0x09, 0x44),
+
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x11),
+ _INIT_DCS_CMD(0x3D, 0x00),
+ _INIT_DCS_CMD(0x3A, 0x0C),
+ _INIT_DCS_CMD(0x3B, 0x44),
+
+ _INIT_DCS_CMD(0x53, 0x1F),
+ _INIT_DCS_CMD(0x5E, 0x40),
+ _INIT_DCS_CMD(0x84, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x03),
+ _INIT_DCS_CMD(0x20, 0x01),
+ _INIT_DCS_CMD(0x21, 0x3C),
+ _INIT_DCS_CMD(0x22, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0A),
+ _INIT_DCS_CMD(0xE0, 0x01),
+ _INIT_DCS_CMD(0xE2, 0x01),
+ _INIT_DCS_CMD(0xE5, 0x91),
+ _INIT_DCS_CMD(0xE6, 0x3C),
+ _INIT_DCS_CMD(0xE7, 0x00),
+ _INIT_DCS_CMD(0xE8, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x12),
+ _INIT_DCS_CMD(0x87, 0x2C),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x73, 0xE5),
+ _INIT_DCS_CMD(0x7F, 0x6B),
+ _INIT_DCS_CMD(0x6D, 0xA4),
+ _INIT_DCS_CMD(0x79, 0x54),
+ _INIT_DCS_CMD(0x69, 0x97),
+ _INIT_DCS_CMD(0x6A, 0x97),
+ _INIT_DCS_CMD(0xA5, 0x3F),
+ _INIT_DCS_CMD(0x61, 0xDA),
+ _INIT_DCS_CMD(0xA7, 0xF1),
+ _INIT_DCS_CMD(0x5F, 0x01),
+ _INIT_DCS_CMD(0x62, 0x3F),
+ _INIT_DCS_CMD(0x1D, 0x90),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0xC0, 0x80),
+ _INIT_DCS_CMD(0xC1, 0x07),
+ _INIT_DCS_CMD(0xCA, 0x58),
+ _INIT_DCS_CMD(0xCB, 0x02),
+ _INIT_DCS_CMD(0xCE, 0x58),
+ _INIT_DCS_CMD(0xCF, 0x02),
+ _INIT_DCS_CMD(0x67, 0x60),
+ _INIT_DCS_CMD(0x10, 0x00),
+ _INIT_DCS_CMD(0x92, 0x22),
+ _INIT_DCS_CMD(0xD3, 0x08),
+ _INIT_DCS_CMD(0xD6, 0x55),
+ _INIT_DCS_CMD(0xDC, 0x38),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x08),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+ _INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x81),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0C),
+ _INIT_DCS_CMD(0x00, 0x02),
+ _INIT_DCS_CMD(0x01, 0x00),
+ _INIT_DCS_CMD(0x02, 0x03),
+ _INIT_DCS_CMD(0x03, 0x01),
+ _INIT_DCS_CMD(0x04, 0x03),
+ _INIT_DCS_CMD(0x05, 0x02),
+ _INIT_DCS_CMD(0x06, 0x04),
+ _INIT_DCS_CMD(0x07, 0x03),
+ _INIT_DCS_CMD(0x08, 0x03),
+ _INIT_DCS_CMD(0x09, 0x04),
+ _INIT_DCS_CMD(0x0A, 0x04),
+ _INIT_DCS_CMD(0x0B, 0x05),
+ _INIT_DCS_CMD(0x0C, 0x04),
+ _INIT_DCS_CMD(0x0D, 0x06),
+ _INIT_DCS_CMD(0x0E, 0x05),
+ _INIT_DCS_CMD(0x0F, 0x07),
+ _INIT_DCS_CMD(0x10, 0x04),
+ _INIT_DCS_CMD(0x11, 0x08),
+ _INIT_DCS_CMD(0x12, 0x05),
+ _INIT_DCS_CMD(0x13, 0x09),
+ _INIT_DCS_CMD(0x14, 0x05),
+ _INIT_DCS_CMD(0x15, 0x0A),
+ _INIT_DCS_CMD(0x16, 0x06),
+ _INIT_DCS_CMD(0x17, 0x0B),
+ _INIT_DCS_CMD(0x18, 0x05),
+ _INIT_DCS_CMD(0x19, 0x0C),
+ _INIT_DCS_CMD(0x1A, 0x06),
+ _INIT_DCS_CMD(0x1B, 0x0D),
+ _INIT_DCS_CMD(0x1C, 0x06),
+ _INIT_DCS_CMD(0x1D, 0x0E),
+ _INIT_DCS_CMD(0x1E, 0x07),
+ _INIT_DCS_CMD(0x1F, 0x0F),
+ _INIT_DCS_CMD(0x20, 0x06),
+ _INIT_DCS_CMD(0x21, 0x10),
+ _INIT_DCS_CMD(0x22, 0x07),
+ _INIT_DCS_CMD(0x23, 0x11),
+ _INIT_DCS_CMD(0x24, 0x07),
+ _INIT_DCS_CMD(0x25, 0x12),
+ _INIT_DCS_CMD(0x26, 0x08),
+ _INIT_DCS_CMD(0x27, 0x13),
+ _INIT_DCS_CMD(0x28, 0x07),
+ _INIT_DCS_CMD(0x29, 0x14),
+ _INIT_DCS_CMD(0x2A, 0x08),
+ _INIT_DCS_CMD(0x2B, 0x15),
+ _INIT_DCS_CMD(0x2C, 0x08),
+ _INIT_DCS_CMD(0x2D, 0x16),
+ _INIT_DCS_CMD(0x2E, 0x09),
+ _INIT_DCS_CMD(0x2F, 0x17),
+ _INIT_DCS_CMD(0x30, 0x08),
+ _INIT_DCS_CMD(0x31, 0x18),
+ _INIT_DCS_CMD(0x32, 0x09),
+ _INIT_DCS_CMD(0x33, 0x19),
+ _INIT_DCS_CMD(0x34, 0x09),
+ _INIT_DCS_CMD(0x35, 0x1A),
+ _INIT_DCS_CMD(0x36, 0x0A),
+ _INIT_DCS_CMD(0x37, 0x1B),
+ _INIT_DCS_CMD(0x38, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x1C),
+ _INIT_DCS_CMD(0x3A, 0x0A),
+ _INIT_DCS_CMD(0x3B, 0x1D),
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x3D, 0x1E),
+ _INIT_DCS_CMD(0x3E, 0x0A),
+ _INIT_DCS_CMD(0x3F, 0x1F),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x01),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0E),
+ _INIT_DCS_CMD(0x02, 0x0C),
+ _INIT_DCS_CMD(0x20, 0x10),
+ _INIT_DCS_CMD(0x25, 0x16),
+ _INIT_DCS_CMD(0x26, 0xE0),
+ _INIT_DCS_CMD(0x27, 0x00),
+ _INIT_DCS_CMD(0x29, 0x71),
+ _INIT_DCS_CMD(0x2A, 0x46),
+ _INIT_DCS_CMD(0x2B, 0x1F),
+ _INIT_DCS_CMD(0x2D, 0xC7),
+ _INIT_DCS_CMD(0x31, 0x02),
+ _INIT_DCS_CMD(0x32, 0xDF),
+ _INIT_DCS_CMD(0x33, 0x5A),
+ _INIT_DCS_CMD(0x34, 0xC0),
+ _INIT_DCS_CMD(0x35, 0x5A),
+ _INIT_DCS_CMD(0x36, 0xC0),
+ _INIT_DCS_CMD(0x38, 0x65),
+ _INIT_DCS_CMD(0x80, 0x3E),
+ _INIT_DCS_CMD(0x81, 0xA0),
+ _INIT_DCS_CMD(0xB0, 0x01),
+ _INIT_DCS_CMD(0xB1, 0xCC),
+ _INIT_DCS_CMD(0xC0, 0x12),
+ _INIT_DCS_CMD(0xC2, 0xCC),
+ _INIT_DCS_CMD(0xC3, 0xCC),
+ _INIT_DCS_CMD(0xC4, 0xCC),
+ _INIT_DCS_CMD(0xC5, 0xCC),
+ _INIT_DCS_CMD(0xC6, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0xCC),
+ _INIT_DCS_CMD(0xC8, 0xCC),
+ _INIT_DCS_CMD(0xC9, 0xCC),
+ _INIT_DCS_CMD(0x30, 0x00),
+ _INIT_DCS_CMD(0x00, 0x81),
+ _INIT_DCS_CMD(0x08, 0x02),
+ _INIT_DCS_CMD(0x09, 0x00),
+ _INIT_DCS_CMD(0x07, 0x21),
+ _INIT_DCS_CMD(0x04, 0x10),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x1E),
+ _INIT_DCS_CMD(0x60, 0x00),
+ _INIT_DCS_CMD(0x64, 0x00),
+ _INIT_DCS_CMD(0x6D, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0B),
+ _INIT_DCS_CMD(0xA6, 0x44),
+ _INIT_DCS_CMD(0xA7, 0xB6),
+ _INIT_DCS_CMD(0xA8, 0x03),
+ _INIT_DCS_CMD(0xA9, 0x03),
+ _INIT_DCS_CMD(0xAA, 0x51),
+ _INIT_DCS_CMD(0xAB, 0x51),
+ _INIT_DCS_CMD(0xAC, 0x04),
+ _INIT_DCS_CMD(0xBD, 0x92),
+ _INIT_DCS_CMD(0xBE, 0xA1),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0x92, 0x22),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ _INIT_DELAY_CMD(20),
+ {},
+};
+
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -1795,6 +2135,34 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.lp11_before_reset = true,
};
+static const struct drm_display_mode starry_ili9882t_default_mode = {
+ .clock = 165280,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 32,
+ .hsync_end = 1200 + 32 + 30,
+ .htotal = 1200 + 32 + 30 + 32,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 68,
+ .vsync_end = 1920 + 68 + 2,
+ .vtotal = 1920 + 68 + 2 + 10,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_ili9882t_desc = {
+ .modes = &starry_ili9882t_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_ili9882t_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1971,6 +2339,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,himax83102-j02",
.data = &starry_himax83102_j02_desc
},
+ { .compatible = "starry,ili9882t",
+ .data = &starry_ili9882t_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* Re: [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-25 2:49 ` [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-25 6:26 ` Conor Dooley
0 siblings, 0 replies; 41+ messages in thread
From: Conor Dooley @ 2023-05-25 6:26 UTC (permalink / raw)
To: Cong Yang
Cc: dianders, airlied, conor+dt, daniel, devicetree, dri-devel,
hsinyi, krzysztof.kozlowski+dt, linux-kernel, neil.armstrong,
robh+dt, sam
[-- Attachment #1: Type: text/plain, Size: 774 bytes --]
On Thu, May 25, 2023 at 10:49:58AM +0800, Cong Yang wrote:
> The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
> with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
> needs to keep the LP11 state before the lcm_reset pin is pulled high, so
> increase lp11_before_reset flag.
>
> [1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
I didn't Ack this (or 4/4). If the patches are otherwise acceptable,
perhaps the committer could remove my A-b from the non dt-binding
patches.
Thanks,
Conor.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
` (3 preceding siblings ...)
2023-05-25 2:50 ` [v3 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-05-25 7:59 ` neil.armstrong
2023-05-25 9:31 ` [v4 " Cong Yang
4 siblings, 1 reply; 41+ messages in thread
From: neil.armstrong @ 2023-05-25 7:59 UTC (permalink / raw)
To: Cong Yang, dianders
Cc: airlied, conor+dt, daniel, devicetree, dri-devel, hsinyi,
krzysztof.kozlowski+dt, linux-kernel, robh+dt, sam
Hi,
On 25/05/2023 04:49, Cong Yang wrote:
> Compare V2: order of the tables match the order they're
> referenced.
>
> Cong Yang (4):
> dt-bindings: display: panel: Add compatible for Starry himax83102-j02
> drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
> dt-bindings: display: panel: Add compatible for Starry ili9882t
> drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
>
> .../display/panel/boe,tv101wum-nl6.yaml | 4 +
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 471 ++++++++++++++++++
> 2 files changed, 475 insertions(+)
>
Please resend without Conor's acks on patches 2 and 4.
Thanks,
Neil
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v4 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 7:59 ` [v3 0/4] Support Starry-himax83102-j02 and " neil.armstrong
@ 2023-05-25 9:31 ` Cong Yang
2023-05-25 9:31 ` [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
` (4 more replies)
0 siblings, 5 replies; 41+ messages in thread
From: Cong Yang @ 2023-05-25 9:31 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang
Copare V3:Resend without Conor's acks on patches 2 and 4.
Cong Yang (4):
dt-bindings: display: panel: Add compatible for Starry himax83102-j02
drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
dt-bindings: display: panel: Add compatible for Starry ili9882t
drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
.../display/panel/boe,tv101wum-nl6.yaml | 4 +
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 471 ++++++++++++++++++
2 files changed, 475 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 41+ messages in thread
* [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02
2023-05-25 9:31 ` [v4 " Cong Yang
@ 2023-05-25 9:31 ` Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
` (3 subsequent siblings)
4 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-25 9:31 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang, Douglas Anderson,
Conor Dooley
The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index aed55608ebf6..28a7beeb8f92 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -32,6 +32,8 @@ properties:
- innolux,hj110iz-01a
# STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel
- starry,2081101qfh032011-53g
+ # STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
+ - starry,himax83102-j02
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-25 9:31 ` [v4 " Cong Yang
2023-05-25 9:31 ` [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
@ 2023-05-25 9:31 ` Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
` (2 subsequent siblings)
4 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-25 9:31 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang, Douglas Anderson
The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
needs to keep the LP11 state before the lcm_reset pin is pulled high, so
increase lp11_before_reset flag.
[1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 100 ++++++++++++++++++
1 file changed, 100 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index f5a6046f1d19..0772d96e446c 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1301,6 +1301,75 @@ static const struct panel_init_cmd starry_qfh032011_53g_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
+ _INIT_DCS_CMD(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
+ _INIT_DCS_CMD(0xB1, 0x2C, 0xB5, 0xB5, 0x31, 0xF1, 0x31, 0xD7, 0x2F, 0x36, 0x36, 0x36, 0x36, 0x1A, 0x8B, 0x11,
+ 0x65, 0x00, 0x88, 0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0x74, 0x33),
+ _INIT_DCS_CMD(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x72, 0x3C, 0xA3, 0x03, 0x03, 0x00, 0x00, 0x88, 0xF5),
+ _INIT_DCS_CMD(0xB4, 0x76, 0x76, 0x76, 0x76, 0x76, 0x76, 0x63, 0x5C, 0x63, 0x5C, 0x01, 0x9E),
+ _INIT_DCS_CMD(0xE9, 0xCD),
+ _INIT_DCS_CMD(0xBA, 0x84),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBC, 0x1B, 0x04),
+ _INIT_DCS_CMD(0xBE, 0x20),
+ _INIT_DCS_CMD(0xBF, 0xFC, 0xC4),
+ _INIT_DCS_CMD(0xC0, 0x36, 0x36, 0x22, 0x11, 0x22, 0xA0, 0x61, 0x08, 0xF5, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0x80),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xC8, 0x97),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xC9, 0x00, 0x1E, 0x13, 0x88, 0x01),
+ _INIT_DCS_CMD(0xCB, 0x08, 0x13, 0x07, 0x00, 0x0F, 0x33),
+ _INIT_DCS_CMD(0xCC, 0x02),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xD0, 0x03),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD1, 0x37, 0x06, 0x00, 0x02, 0x04, 0x0C, 0xFF),
+ _INIT_DCS_CMD(0xD2, 0x1F, 0x11, 0x1F),
+ _INIT_DCS_CMD(0xD3, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x08, 0x37, 0x47, 0x34, 0x3B, 0x12, 0x12, 0x03,
+ 0x03, 0x32, 0x10, 0x10, 0x00, 0x10, 0x32, 0x10, 0x08, 0x00, 0x08, 0x32, 0x17, 0x94, 0x07, 0x94, 0x00, 0x00),
+ _INIT_DCS_CMD(0xD5, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x19, 0x19, 0x40, 0x40, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x20, 0x21, 0x28, 0x29, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD6, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x40, 0x40, 0x19, 0x19, 0x1A, 0x1A,
+ 0x1B, 0x1B, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x29, 0x28, 0x21, 0x20, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18),
+ _INIT_DCS_CMD(0xD8, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA,
+ 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0, 0xAA, 0xBA, 0xEA, 0xAA, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB,
+ 0xAB, 0x55, 0x5C, 0x68, 0x73, 0x00, 0x09, 0x14, 0x1E, 0x26, 0x48, 0x61, 0x67, 0x6C, 0x67, 0x7D, 0x7F, 0x80, 0x8B, 0x87, 0x8F, 0x98, 0xAB, 0xAB, 0x55, 0x5C, 0x68, 0x73),
+ _INIT_DCS_CMD(0xE7, 0x0E, 0x10, 0x10, 0x21, 0x2B, 0x9A, 0x02, 0x54, 0x9A, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x05, 0x02, 0x02, 0x10),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xB1, 0x01, 0xBF, 0x11),
+ _INIT_DCS_CMD(0xCB, 0x86),
+ _INIT_DCS_CMD(0xD2, 0x3C, 0xFA),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xD3, 0x00, 0x00, 0x00, 0x00, 0x80, 0x0C, 0x01),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xE7, 0x02, 0x00, 0x28, 0x01, 0x7E, 0x0F, 0x7E, 0x10, 0xA0, 0x00, 0x00, 0x20, 0x40, 0x50, 0x40),
+ _INIT_DCS_CMD(0xBD, 0x02),
+ _INIT_DCS_CMD(0xD8, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0, 0xFF, 0xFF, 0xBF, 0xFE, 0xAA, 0xA0),
+ _INIT_DCS_CMD(0xE7, 0xFE, 0x04, 0xFE, 0x04, 0xFE, 0x04, 0x03, 0x03, 0x03, 0x26, 0x00, 0x26, 0x81, 0x02, 0x40, 0x00, 0x20, 0x9E, 0x04, 0x03, 0x02, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x03),
+ _INIT_DCS_CMD(0xE9, 0xC6),
+ _INIT_DCS_CMD(0xB4, 0x03, 0xFF, 0xF8),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xD8, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x3F, 0xFF, 0xFC, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00, 0x00, 0x2A, 0xAA, 0xA8, 0x00, 0x00),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0xE9, 0xC4),
+ _INIT_DCS_CMD(0xBA, 0x96),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x01),
+ _INIT_DCS_CMD(0xE9, 0xC5),
+ _INIT_DCS_CMD(0xBA, 0x4F),
+ _INIT_DCS_CMD(0xE9, 0x3F),
+ _INIT_DCS_CMD(0xBD, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ {},
+};
+
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -1698,6 +1767,34 @@ static const struct panel_desc starry_qfh032011_53g_desc = {
.init_cmds = starry_qfh032011_53g_init_cmd,
};
+static const struct drm_display_mode starry_himax83102_j02_default_mode = {
+ .clock = 161600,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 40,
+ .hsync_end = 1200 + 40 + 20,
+ .htotal = 1200 + 40 + 20 + 40,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 116,
+ .vsync_end = 1920 + 116 + 8,
+ .vtotal = 1920 + 116 + 8 + 12,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_himax83102_j02_desc = {
+ .modes = &starry_himax83102_j02_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_himax83102_j02_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1871,6 +1968,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,2081101qfh032011-53g",
.data = &starry_qfh032011_53g_desc
},
+ { .compatible = "starry,himax83102-j02",
+ .data = &starry_himax83102_j02_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t
2023-05-25 9:31 ` [v4 " Cong Yang
2023-05-25 9:31 ` [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-25 9:31 ` [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-05-25 9:31 ` Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-06-01 15:54 ` [v4 0/4] Support Starry-himax83102-j02 and " Doug Anderson
4 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-25 9:31 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang, Douglas Anderson,
Conor Dooley
The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
which fits in nicely with the existing panel-boe-tv101wum-nl6
driver. Hence, we add a new compatible with panel specific config.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
.../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
index 28a7beeb8f92..906ef62709b8 100644
--- a/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
+++ b/Documentation/devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml
@@ -34,6 +34,8 @@ properties:
- starry,2081101qfh032011-53g
# STARRY himax83102-j02 10.51" WUXGA TFT LCD panel
- starry,himax83102-j02
+ # STARRY ili9882t 10.51" WUXGA TFT LCD panel
+ - starry,ili9882t
reg:
description: the virtual channel number of a DSI peripheral
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 9:31 ` [v4 " Cong Yang
` (2 preceding siblings ...)
2023-05-25 9:31 ` [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
@ 2023-05-25 9:31 ` Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-06-01 15:54 ` [v4 0/4] Support Starry-himax83102-j02 and " Doug Anderson
4 siblings, 1 reply; 41+ messages in thread
From: Cong Yang @ 2023-05-25 9:31 UTC (permalink / raw)
To: dianders, daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt
Cc: devicetree, dri-devel, linux-kernel, Cong Yang, Douglas Anderson
The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
to keep the LP11 state before the lcm_reset pin is pulled high. So add
lp11_before_reset flag.
Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
---
.../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
1 file changed, 371 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
index 0772d96e446c..720b77964fcf 100644
--- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
+++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c
@@ -1370,6 +1370,346 @@ static const struct panel_init_cmd starry_himax83102_j02_init_cmd[] = {
{},
};
+static const struct panel_init_cmd starry_ili9882t_init_cmd[] = {
+ _INIT_DELAY_CMD(5),
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x01),
+ _INIT_DCS_CMD(0x00, 0x42),
+ _INIT_DCS_CMD(0x01, 0x11),
+ _INIT_DCS_CMD(0x02, 0x00),
+ _INIT_DCS_CMD(0x03, 0x00),
+
+ _INIT_DCS_CMD(0x04, 0x01),
+ _INIT_DCS_CMD(0x05, 0x11),
+ _INIT_DCS_CMD(0x06, 0x00),
+ _INIT_DCS_CMD(0x07, 0x00),
+
+ _INIT_DCS_CMD(0x08, 0x80),
+ _INIT_DCS_CMD(0x09, 0x81),
+ _INIT_DCS_CMD(0x0A, 0x71),
+ _INIT_DCS_CMD(0x0B, 0x00),
+
+ _INIT_DCS_CMD(0x0C, 0x00),
+ _INIT_DCS_CMD(0x0E, 0x1A),
+
+ _INIT_DCS_CMD(0x24, 0x00),
+ _INIT_DCS_CMD(0x25, 0x00),
+ _INIT_DCS_CMD(0x26, 0x00),
+ _INIT_DCS_CMD(0x27, 0x00),
+
+ _INIT_DCS_CMD(0x2C, 0xD4),
+ _INIT_DCS_CMD(0xB9, 0x40),
+
+ _INIT_DCS_CMD(0xB0, 0x11),
+
+ _INIT_DCS_CMD(0xE6, 0x32),
+ _INIT_DCS_CMD(0xD1, 0x30),
+
+ _INIT_DCS_CMD(0xD6, 0x55),
+
+ _INIT_DCS_CMD(0xD0, 0x01),
+ _INIT_DCS_CMD(0xE3, 0x93),
+ _INIT_DCS_CMD(0xE4, 0x00),
+ _INIT_DCS_CMD(0xE5, 0x80),
+
+ _INIT_DCS_CMD(0x31, 0x07),
+ _INIT_DCS_CMD(0x32, 0x07),
+ _INIT_DCS_CMD(0x33, 0x07),
+ _INIT_DCS_CMD(0x34, 0x07),
+ _INIT_DCS_CMD(0x35, 0x07),
+ _INIT_DCS_CMD(0x36, 0x01),
+ _INIT_DCS_CMD(0x37, 0x00),
+ _INIT_DCS_CMD(0x38, 0x28),
+ _INIT_DCS_CMD(0x39, 0x29),
+ _INIT_DCS_CMD(0x3A, 0x11),
+ _INIT_DCS_CMD(0x3B, 0x13),
+ _INIT_DCS_CMD(0x3C, 0x15),
+ _INIT_DCS_CMD(0x3D, 0x17),
+ _INIT_DCS_CMD(0x3E, 0x09),
+ _INIT_DCS_CMD(0x3F, 0x0D),
+ _INIT_DCS_CMD(0x40, 0x02),
+ _INIT_DCS_CMD(0x41, 0x02),
+ _INIT_DCS_CMD(0x42, 0x02),
+ _INIT_DCS_CMD(0x43, 0x02),
+ _INIT_DCS_CMD(0x44, 0x02),
+ _INIT_DCS_CMD(0x45, 0x02),
+ _INIT_DCS_CMD(0x46, 0x02),
+
+ _INIT_DCS_CMD(0x47, 0x07),
+ _INIT_DCS_CMD(0x48, 0x07),
+ _INIT_DCS_CMD(0x49, 0x07),
+ _INIT_DCS_CMD(0x4A, 0x07),
+ _INIT_DCS_CMD(0x4B, 0x07),
+ _INIT_DCS_CMD(0x4C, 0x01),
+ _INIT_DCS_CMD(0x4D, 0x00),
+ _INIT_DCS_CMD(0x4E, 0x28),
+ _INIT_DCS_CMD(0x4F, 0x29),
+ _INIT_DCS_CMD(0x50, 0x10),
+ _INIT_DCS_CMD(0x51, 0x12),
+ _INIT_DCS_CMD(0x52, 0x14),
+ _INIT_DCS_CMD(0x53, 0x16),
+ _INIT_DCS_CMD(0x54, 0x08),
+ _INIT_DCS_CMD(0x55, 0x0C),
+ _INIT_DCS_CMD(0x56, 0x02),
+ _INIT_DCS_CMD(0x57, 0x02),
+ _INIT_DCS_CMD(0x58, 0x02),
+ _INIT_DCS_CMD(0x59, 0x02),
+ _INIT_DCS_CMD(0x5A, 0x02),
+ _INIT_DCS_CMD(0x5B, 0x02),
+ _INIT_DCS_CMD(0x5C, 0x02),
+
+ _INIT_DCS_CMD(0x61, 0x07),
+ _INIT_DCS_CMD(0x62, 0x07),
+ _INIT_DCS_CMD(0x63, 0x07),
+ _INIT_DCS_CMD(0x64, 0x07),
+ _INIT_DCS_CMD(0x65, 0x07),
+ _INIT_DCS_CMD(0x66, 0x01),
+ _INIT_DCS_CMD(0x67, 0x00),
+ _INIT_DCS_CMD(0x68, 0x28),
+ _INIT_DCS_CMD(0x69, 0x29),
+ _INIT_DCS_CMD(0x6A, 0x16),
+ _INIT_DCS_CMD(0x6B, 0x14),
+ _INIT_DCS_CMD(0x6C, 0x12),
+ _INIT_DCS_CMD(0x6D, 0x10),
+ _INIT_DCS_CMD(0x6E, 0x0C),
+ _INIT_DCS_CMD(0x6F, 0x08),
+ _INIT_DCS_CMD(0x70, 0x02),
+ _INIT_DCS_CMD(0x71, 0x02),
+ _INIT_DCS_CMD(0x72, 0x02),
+ _INIT_DCS_CMD(0x73, 0x02),
+ _INIT_DCS_CMD(0x74, 0x02),
+ _INIT_DCS_CMD(0x75, 0x02),
+ _INIT_DCS_CMD(0x76, 0x02),
+
+ _INIT_DCS_CMD(0x77, 0x07),
+ _INIT_DCS_CMD(0x78, 0x07),
+ _INIT_DCS_CMD(0x79, 0x07),
+ _INIT_DCS_CMD(0x7A, 0x07),
+ _INIT_DCS_CMD(0x7B, 0x07),
+ _INIT_DCS_CMD(0x7C, 0x01),
+ _INIT_DCS_CMD(0x7D, 0x00),
+ _INIT_DCS_CMD(0x7E, 0x28),
+ _INIT_DCS_CMD(0x7F, 0x29),
+ _INIT_DCS_CMD(0x80, 0x17),
+ _INIT_DCS_CMD(0x81, 0x15),
+ _INIT_DCS_CMD(0x82, 0x13),
+ _INIT_DCS_CMD(0x83, 0x11),
+ _INIT_DCS_CMD(0x84, 0x0D),
+ _INIT_DCS_CMD(0x85, 0x09),
+ _INIT_DCS_CMD(0x86, 0x02),
+ _INIT_DCS_CMD(0x87, 0x07),
+ _INIT_DCS_CMD(0x88, 0x07),
+ _INIT_DCS_CMD(0x89, 0x07),
+ _INIT_DCS_CMD(0x8A, 0x07),
+ _INIT_DCS_CMD(0x8B, 0x07),
+ _INIT_DCS_CMD(0x8C, 0x07),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x02),
+ _INIT_DCS_CMD(0x29, 0x3A),
+ _INIT_DCS_CMD(0x2A, 0x3B),
+
+ _INIT_DCS_CMD(0x06, 0x01),
+ _INIT_DCS_CMD(0x07, 0x01),
+ _INIT_DCS_CMD(0x08, 0x0C),
+ _INIT_DCS_CMD(0x09, 0x44),
+
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x11),
+ _INIT_DCS_CMD(0x3D, 0x00),
+ _INIT_DCS_CMD(0x3A, 0x0C),
+ _INIT_DCS_CMD(0x3B, 0x44),
+
+ _INIT_DCS_CMD(0x53, 0x1F),
+ _INIT_DCS_CMD(0x5E, 0x40),
+ _INIT_DCS_CMD(0x84, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x03),
+ _INIT_DCS_CMD(0x20, 0x01),
+ _INIT_DCS_CMD(0x21, 0x3C),
+ _INIT_DCS_CMD(0x22, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0A),
+ _INIT_DCS_CMD(0xE0, 0x01),
+ _INIT_DCS_CMD(0xE2, 0x01),
+ _INIT_DCS_CMD(0xE5, 0x91),
+ _INIT_DCS_CMD(0xE6, 0x3C),
+ _INIT_DCS_CMD(0xE7, 0x00),
+ _INIT_DCS_CMD(0xE8, 0xFA),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x12),
+ _INIT_DCS_CMD(0x87, 0x2C),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x73, 0xE5),
+ _INIT_DCS_CMD(0x7F, 0x6B),
+ _INIT_DCS_CMD(0x6D, 0xA4),
+ _INIT_DCS_CMD(0x79, 0x54),
+ _INIT_DCS_CMD(0x69, 0x97),
+ _INIT_DCS_CMD(0x6A, 0x97),
+ _INIT_DCS_CMD(0xA5, 0x3F),
+ _INIT_DCS_CMD(0x61, 0xDA),
+ _INIT_DCS_CMD(0xA7, 0xF1),
+ _INIT_DCS_CMD(0x5F, 0x01),
+ _INIT_DCS_CMD(0x62, 0x3F),
+ _INIT_DCS_CMD(0x1D, 0x90),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0xC0, 0x80),
+ _INIT_DCS_CMD(0xC1, 0x07),
+ _INIT_DCS_CMD(0xCA, 0x58),
+ _INIT_DCS_CMD(0xCB, 0x02),
+ _INIT_DCS_CMD(0xCE, 0x58),
+ _INIT_DCS_CMD(0xCF, 0x02),
+ _INIT_DCS_CMD(0x67, 0x60),
+ _INIT_DCS_CMD(0x10, 0x00),
+ _INIT_DCS_CMD(0x92, 0x22),
+ _INIT_DCS_CMD(0xD3, 0x08),
+ _INIT_DCS_CMD(0xD6, 0x55),
+ _INIT_DCS_CMD(0xDC, 0x38),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x08),
+ _INIT_DCS_CMD(0xE0, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+ _INIT_DCS_CMD(0xE1, 0x00, 0x10, 0x2A, 0x4D, 0x61, 0x56, 0x6A, 0x6E, 0x79, 0x76, 0x8F, 0x95, 0x98, 0xAE, 0xAA, 0xB2, 0xBB, 0xCE, 0xC6, 0xBD, 0xD5, 0xE2, 0xE8),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x81),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0C),
+ _INIT_DCS_CMD(0x00, 0x02),
+ _INIT_DCS_CMD(0x01, 0x00),
+ _INIT_DCS_CMD(0x02, 0x03),
+ _INIT_DCS_CMD(0x03, 0x01),
+ _INIT_DCS_CMD(0x04, 0x03),
+ _INIT_DCS_CMD(0x05, 0x02),
+ _INIT_DCS_CMD(0x06, 0x04),
+ _INIT_DCS_CMD(0x07, 0x03),
+ _INIT_DCS_CMD(0x08, 0x03),
+ _INIT_DCS_CMD(0x09, 0x04),
+ _INIT_DCS_CMD(0x0A, 0x04),
+ _INIT_DCS_CMD(0x0B, 0x05),
+ _INIT_DCS_CMD(0x0C, 0x04),
+ _INIT_DCS_CMD(0x0D, 0x06),
+ _INIT_DCS_CMD(0x0E, 0x05),
+ _INIT_DCS_CMD(0x0F, 0x07),
+ _INIT_DCS_CMD(0x10, 0x04),
+ _INIT_DCS_CMD(0x11, 0x08),
+ _INIT_DCS_CMD(0x12, 0x05),
+ _INIT_DCS_CMD(0x13, 0x09),
+ _INIT_DCS_CMD(0x14, 0x05),
+ _INIT_DCS_CMD(0x15, 0x0A),
+ _INIT_DCS_CMD(0x16, 0x06),
+ _INIT_DCS_CMD(0x17, 0x0B),
+ _INIT_DCS_CMD(0x18, 0x05),
+ _INIT_DCS_CMD(0x19, 0x0C),
+ _INIT_DCS_CMD(0x1A, 0x06),
+ _INIT_DCS_CMD(0x1B, 0x0D),
+ _INIT_DCS_CMD(0x1C, 0x06),
+ _INIT_DCS_CMD(0x1D, 0x0E),
+ _INIT_DCS_CMD(0x1E, 0x07),
+ _INIT_DCS_CMD(0x1F, 0x0F),
+ _INIT_DCS_CMD(0x20, 0x06),
+ _INIT_DCS_CMD(0x21, 0x10),
+ _INIT_DCS_CMD(0x22, 0x07),
+ _INIT_DCS_CMD(0x23, 0x11),
+ _INIT_DCS_CMD(0x24, 0x07),
+ _INIT_DCS_CMD(0x25, 0x12),
+ _INIT_DCS_CMD(0x26, 0x08),
+ _INIT_DCS_CMD(0x27, 0x13),
+ _INIT_DCS_CMD(0x28, 0x07),
+ _INIT_DCS_CMD(0x29, 0x14),
+ _INIT_DCS_CMD(0x2A, 0x08),
+ _INIT_DCS_CMD(0x2B, 0x15),
+ _INIT_DCS_CMD(0x2C, 0x08),
+ _INIT_DCS_CMD(0x2D, 0x16),
+ _INIT_DCS_CMD(0x2E, 0x09),
+ _INIT_DCS_CMD(0x2F, 0x17),
+ _INIT_DCS_CMD(0x30, 0x08),
+ _INIT_DCS_CMD(0x31, 0x18),
+ _INIT_DCS_CMD(0x32, 0x09),
+ _INIT_DCS_CMD(0x33, 0x19),
+ _INIT_DCS_CMD(0x34, 0x09),
+ _INIT_DCS_CMD(0x35, 0x1A),
+ _INIT_DCS_CMD(0x36, 0x0A),
+ _INIT_DCS_CMD(0x37, 0x1B),
+ _INIT_DCS_CMD(0x38, 0x0A),
+ _INIT_DCS_CMD(0x39, 0x1C),
+ _INIT_DCS_CMD(0x3A, 0x0A),
+ _INIT_DCS_CMD(0x3B, 0x1D),
+ _INIT_DCS_CMD(0x3C, 0x0A),
+ _INIT_DCS_CMD(0x3D, 0x1E),
+ _INIT_DCS_CMD(0x3E, 0x0A),
+ _INIT_DCS_CMD(0x3F, 0x1F),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x04),
+ _INIT_DCS_CMD(0xBA, 0x01),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0E),
+ _INIT_DCS_CMD(0x02, 0x0C),
+ _INIT_DCS_CMD(0x20, 0x10),
+ _INIT_DCS_CMD(0x25, 0x16),
+ _INIT_DCS_CMD(0x26, 0xE0),
+ _INIT_DCS_CMD(0x27, 0x00),
+ _INIT_DCS_CMD(0x29, 0x71),
+ _INIT_DCS_CMD(0x2A, 0x46),
+ _INIT_DCS_CMD(0x2B, 0x1F),
+ _INIT_DCS_CMD(0x2D, 0xC7),
+ _INIT_DCS_CMD(0x31, 0x02),
+ _INIT_DCS_CMD(0x32, 0xDF),
+ _INIT_DCS_CMD(0x33, 0x5A),
+ _INIT_DCS_CMD(0x34, 0xC0),
+ _INIT_DCS_CMD(0x35, 0x5A),
+ _INIT_DCS_CMD(0x36, 0xC0),
+ _INIT_DCS_CMD(0x38, 0x65),
+ _INIT_DCS_CMD(0x80, 0x3E),
+ _INIT_DCS_CMD(0x81, 0xA0),
+ _INIT_DCS_CMD(0xB0, 0x01),
+ _INIT_DCS_CMD(0xB1, 0xCC),
+ _INIT_DCS_CMD(0xC0, 0x12),
+ _INIT_DCS_CMD(0xC2, 0xCC),
+ _INIT_DCS_CMD(0xC3, 0xCC),
+ _INIT_DCS_CMD(0xC4, 0xCC),
+ _INIT_DCS_CMD(0xC5, 0xCC),
+ _INIT_DCS_CMD(0xC6, 0xCC),
+ _INIT_DCS_CMD(0xC7, 0xCC),
+ _INIT_DCS_CMD(0xC8, 0xCC),
+ _INIT_DCS_CMD(0xC9, 0xCC),
+ _INIT_DCS_CMD(0x30, 0x00),
+ _INIT_DCS_CMD(0x00, 0x81),
+ _INIT_DCS_CMD(0x08, 0x02),
+ _INIT_DCS_CMD(0x09, 0x00),
+ _INIT_DCS_CMD(0x07, 0x21),
+ _INIT_DCS_CMD(0x04, 0x10),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x1E),
+ _INIT_DCS_CMD(0x60, 0x00),
+ _INIT_DCS_CMD(0x64, 0x00),
+ _INIT_DCS_CMD(0x6D, 0x00),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x0B),
+ _INIT_DCS_CMD(0xA6, 0x44),
+ _INIT_DCS_CMD(0xA7, 0xB6),
+ _INIT_DCS_CMD(0xA8, 0x03),
+ _INIT_DCS_CMD(0xA9, 0x03),
+ _INIT_DCS_CMD(0xAA, 0x51),
+ _INIT_DCS_CMD(0xAB, 0x51),
+ _INIT_DCS_CMD(0xAC, 0x04),
+ _INIT_DCS_CMD(0xBD, 0x92),
+ _INIT_DCS_CMD(0xBE, 0xA1),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x05),
+ _INIT_DCS_CMD(0x86, 0x87),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x06),
+ _INIT_DCS_CMD(0x92, 0x22),
+
+ _INIT_DCS_CMD(0xFF, 0x98, 0x82, 0x00),
+ _INIT_DCS_CMD(0x11),
+ _INIT_DELAY_CMD(120),
+ _INIT_DCS_CMD(0x29),
+ _INIT_DELAY_CMD(20),
+ {},
+};
+
static inline struct boe_panel *to_boe_panel(struct drm_panel *panel)
{
return container_of(panel, struct boe_panel, base);
@@ -1795,6 +2135,34 @@ static const struct panel_desc starry_himax83102_j02_desc = {
.lp11_before_reset = true,
};
+static const struct drm_display_mode starry_ili9882t_default_mode = {
+ .clock = 165280,
+ .hdisplay = 1200,
+ .hsync_start = 1200 + 32,
+ .hsync_end = 1200 + 32 + 30,
+ .htotal = 1200 + 32 + 30 + 32,
+ .vdisplay = 1920,
+ .vsync_start = 1920 + 68,
+ .vsync_end = 1920 + 68 + 2,
+ .vtotal = 1920 + 68 + 2 + 10,
+ .type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct panel_desc starry_ili9882t_desc = {
+ .modes = &starry_ili9882t_default_mode,
+ .bpc = 8,
+ .size = {
+ .width_mm = 141,
+ .height_mm = 226,
+ },
+ .lanes = 4,
+ .format = MIPI_DSI_FMT_RGB888,
+ .mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
+ MIPI_DSI_MODE_LPM,
+ .init_cmds = starry_ili9882t_init_cmd,
+ .lp11_before_reset = true,
+};
+
static int boe_panel_get_modes(struct drm_panel *panel,
struct drm_connector *connector)
{
@@ -1971,6 +2339,9 @@ static const struct of_device_id boe_of_match[] = {
{ .compatible = "starry,himax83102-j02",
.data = &starry_himax83102_j02_desc
},
+ { .compatible = "starry,ili9882t",
+ .data = &starry_ili9882t_desc
+ },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, boe_of_match);
--
2.25.1
^ permalink raw reply related [flat|nested] 41+ messages in thread
* Re: [v4 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 9:31 ` [v4 " Cong Yang
` (3 preceding siblings ...)
2023-05-25 9:31 ` [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-06-01 15:54 ` Doug Anderson
4 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-06-01 15:54 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> Copare V3:Resend without Conor's acks on patches 2 and 4.
>
> Cong Yang (4):
> dt-bindings: display: panel: Add compatible for Starry himax83102-j02
> drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
> dt-bindings: display: panel: Add compatible for Starry ili9882t
> drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
>
> .../display/panel/boe,tv101wum-nl6.yaml | 4 +
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 471 ++++++++++++++++++
> 2 files changed, 475 insertions(+)
For future reference: please don't send your patch series
"In-Reply-To" the previous version (or in In-Reply-To anything). This
messes up a bunch of threading and generally people don't like it. No
need to resend this patch series.
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02
2023-05-25 9:31 ` [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
@ 2023-06-01 15:55 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-06-01 15:55 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel, Conor Dooley
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The STARRY himax83102-j02 is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Applied to drm-misc-next:
06c3269cd574 dt-bindings: display: panel: Add compatible for Starry
himax83102-j02
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
2023-05-25 9:31 ` [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
@ 2023-06-01 15:55 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-06-01 15:55 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The Starry-himax83102-j02 is a 10.51" WUXGA TFT panel. which fits in nicely
> with the existing panel-boe-tv101wum-nl6 driver. From the datasheet[1], MIPI
> needs to keep the LP11 state before the lcm_reset pin is pulled high, so
> increase lp11_before_reset flag.
>
> [1]: https://github.com/HimaxSoftware/Doc/tree/main/Himax_Chipset_Power_Sequence
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> ---
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 100 ++++++++++++++++++
> 1 file changed, 100 insertions(+)
Applied to drm-misc-next:
1bc2ef065f13 drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t
2023-05-25 9:31 ` [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
@ 2023-06-01 15:55 ` Doug Anderson
0 siblings, 0 replies; 41+ messages in thread
From: Doug Anderson @ 2023-06-01 15:55 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel, Conor Dooley
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The STARRY ili9882t is a 10.51" WUXGA TFT LCD panel,
> which fits in nicely with the existing panel-boe-tv101wum-nl6
> driver. Hence, we add a new compatible with panel specific config.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../devicetree/bindings/display/panel/boe,tv101wum-nl6.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Applied to drm-misc-next:
0a73471ca1f7 dt-bindings: display: panel: Add compatible for Starry ili9882t
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-05-25 9:31 ` [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
@ 2023-06-01 15:55 ` Doug Anderson
2023-07-04 7:46 ` Linus Walleij
0 siblings, 1 reply; 41+ messages in thread
From: Doug Anderson @ 2023-06-01 15:55 UTC (permalink / raw)
To: Cong Yang
Cc: daniel, neil.armstrong, sam, airlied, robh+dt,
krzysztof.kozlowski+dt, hsinyi, conor+dt, devicetree, dri-devel,
linux-kernel
Hi,
On Thu, May 25, 2023 at 2:32 AM Cong Yang
<yangcong5@huaqin.corp-partner.google.com> wrote:
>
> The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> to keep the LP11 state before the lcm_reset pin is pulled high. So add
> lp11_before_reset flag.
>
> Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> Reviewed-by: Douglas Anderson <dianders@chromium.org>
> ---
> .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
> 1 file changed, 371 insertions(+)
Applied to drm-misc-next:
8716a6473e6c drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-06-01 15:55 ` Doug Anderson
@ 2023-07-04 7:46 ` Linus Walleij
2023-07-06 21:25 ` Doug Anderson
0 siblings, 1 reply; 41+ messages in thread
From: Linus Walleij @ 2023-07-04 7:46 UTC (permalink / raw)
To: Doug Anderson
Cc: Cong Yang, neil.armstrong, conor+dt, devicetree, sam,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
On Thu, Jun 1, 2023 at 5:55 PM Doug Anderson <dianders@google.com> wrote:
> On Thu, May 25, 2023 at 2:32 AM Cong Yang
> <yangcong5@huaqin.corp-partner.google.com> wrote:
> >
> > The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> > the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> > to keep the LP11 state before the lcm_reset pin is pulled high. So add
> > lp11_before_reset flag.
> >
> > Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> > Reviewed-by: Douglas Anderson <dianders@chromium.org>
> > ---
> > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
> > 1 file changed, 371 insertions(+)
>
> Applied to drm-misc-next:
>
> 8716a6473e6c drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
Sorry for noticing too late and coming after the fact and complaining.
We must stop using the panel-boe-tv101wum-nl6.c driver as a
one-stop-shop for Chromium panels. The Starry panel in particular
hardware-wise has nothing in common with the other panels in this
driver and I'm suspicious about patch 3/4 as well.
Please check my patch breaking it out to a separate driver, and
if you could check internally if you have a datasheet for Ilitek
ILI9882t or can use your vendor leverage to get one to improve
on the driver (such as define the DCS commands...) that would
be great.
There are good reasons for grouping the panel drivers into
respective display controller such as fixing bugs in one place
and if we ever want to properly support things such as
gamma correction it will provide the proper per-display-controller
approach.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-07-04 7:46 ` Linus Walleij
@ 2023-07-06 21:25 ` Doug Anderson
2023-07-06 21:36 ` Linus Walleij
2023-07-07 5:58 ` Sam Ravnborg
0 siblings, 2 replies; 41+ messages in thread
From: Doug Anderson @ 2023-07-06 21:25 UTC (permalink / raw)
To: Linus Walleij
Cc: Cong Yang, neil.armstrong, conor+dt, devicetree, sam,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
Hi,
On Tue, Jul 4, 2023 at 12:47 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Thu, Jun 1, 2023 at 5:55 PM Doug Anderson <dianders@google.com> wrote:
> > On Thu, May 25, 2023 at 2:32 AM Cong Yang
> > <yangcong5@huaqin.corp-partner.google.com> wrote:
> > >
> > > The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> > > the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> > > to keep the LP11 state before the lcm_reset pin is pulled high. So add
> > > lp11_before_reset flag.
> > >
> > > Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> > > Reviewed-by: Douglas Anderson <dianders@chromium.org>
> > > ---
> > > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
> > > 1 file changed, 371 insertions(+)
> >
> > Applied to drm-misc-next:
> >
> > 8716a6473e6c drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
>
> Sorry for noticing too late and coming after the fact and complaining.
>
> We must stop using the panel-boe-tv101wum-nl6.c driver as a
> one-stop-shop for Chromium panels. The Starry panel in particular
> hardware-wise has nothing in common with the other panels in this
> driver and I'm suspicious about patch 3/4 as well.
>
> Please check my patch breaking it out to a separate driver, and
> if you could check internally if you have a datasheet for Ilitek
> ILI9882t or can use your vendor leverage to get one to improve
> on the driver (such as define the DCS commands...) that would
> be great.
>
> There are good reasons for grouping the panel drivers into
> respective display controller such as fixing bugs in one place
> and if we ever want to properly support things such as
> gamma correction it will provide the proper per-display-controller
> approach.
I mentioned in response to your patch #3 also [1], but closing the
loop here as well. The original reason several panels all ended up in
one driver was in response to Sam's feedback [2]. That was even
documented when the first of the "Chromium" panels landed in commit
93ee1a2c0f08 ("drm/panel: support for BOE and INX video mode panel").
In my mind it's really a tradeoff and I'm happy to go with whatever
consensus that others agree with. What I'm never super happy with,
though, is changing the bikeshed color too often, so I'd be really
curious to hear Sam's thoughts on the issue and whether he'd like to
see this driver broken out into a dozen drivers.
[1] https://lore.kernel.org/r/CAD=FV=Xkr3Qpd8m_6Xta_2jL_ezbxsmMyarbKXTXL+UJLG9xNw@mail.gmail.com
[2] https://lore.kernel.org/all/YSPAseE6WD8dDRuz@ravnborg.org/
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-07-06 21:25 ` Doug Anderson
@ 2023-07-06 21:36 ` Linus Walleij
2023-07-06 21:58 ` Doug Anderson
2023-07-07 5:58 ` Sam Ravnborg
1 sibling, 1 reply; 41+ messages in thread
From: Linus Walleij @ 2023-07-06 21:36 UTC (permalink / raw)
To: Doug Anderson
Cc: Cong Yang, neil.armstrong, conor+dt, devicetree, sam,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
On Thu, Jul 6, 2023 at 11:25 PM Doug Anderson <dianders@google.com> wrote:
> In my mind it's really a tradeoff and I'm happy to go with whatever
> consensus that others agree with. What I'm never super happy with,
> though, is changing the bikeshed color too often, so I'd be really
> curious to hear Sam's thoughts on the issue and whether he'd like to
> see this driver broken out into a dozen drivers.
This is not question about a dozen drivers, to be clear.
I just want to break out the drivers that have an identifiable
display controller that differs from the others, especially this one.
The rest of the drivers inside of this boe driver I can't really tell,
they seem related? We don't know?
So the Ilitek ILI9882t is an obvious break-out.
For the rest, I guess I would be happier if the Chromium people
could use their leverage with vendors to muscle out the details
about display controller vendors and provide #defines for all
magic commands, we all dislike these opaque firmware-looking
jam tables.
Cong already stated that he indeed has the datasheet for the
ILI9882t controller at hand, had I come in earlier I would have
asked for all of those sequences to be provided with proper
#defines instead of 0xff 0x98 0x82 0x01... but I'm late to the
show.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-07-06 21:36 ` Linus Walleij
@ 2023-07-06 21:58 ` Doug Anderson
2023-07-06 22:21 ` Linus Walleij
0 siblings, 1 reply; 41+ messages in thread
From: Doug Anderson @ 2023-07-06 21:58 UTC (permalink / raw)
To: Linus Walleij
Cc: Cong Yang, neil.armstrong, conor+dt, devicetree, sam,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
Hi,
On Thu, Jul 6, 2023 at 2:36 PM Linus Walleij <linus.walleij@linaro.org> wrote:
>
> On Thu, Jul 6, 2023 at 11:25 PM Doug Anderson <dianders@google.com> wrote:
>
> > In my mind it's really a tradeoff and I'm happy to go with whatever
> > consensus that others agree with. What I'm never super happy with,
> > though, is changing the bikeshed color too often, so I'd be really
> > curious to hear Sam's thoughts on the issue and whether he'd like to
> > see this driver broken out into a dozen drivers.
>
> This is not question about a dozen drivers, to be clear.
>
> I just want to break out the drivers that have an identifiable
> display controller that differs from the others, especially this one.
>
> The rest of the drivers inside of this boe driver I can't really tell,
> they seem related? We don't know?
>
> So the Ilitek ILI9882t is an obvious break-out.
I guess. To me it feels like the concept of breaking the driver into
multiple sub-drivers and the idea of supporting ILI9882t more cleanly
are orthogonal. You could still do your patch #4 and break out the
page switching function without breaking up the driver.
It feels to me fairly likely that many of the panels here are just as
different from each other as the ILI9882t is from them. I guess it's
not a dozen, but it feels like using the same "how different are they
from each other" metric we'd end up with at least 5-6 new drivers. It
seems clear to me that the panel that Sam first commented on is as
different from the others in the BOE driver as the ILI9882t is.
Certainly it has a pretty darn big unique command sequence for init...
> For the rest, I guess I would be happier if the Chromium people
> could use their leverage with vendors to muscle out the details
> about display controller vendors and provide #defines for all
> magic commands, we all dislike these opaque firmware-looking
> jam tables.
Yeah, I've grumbled about this with each new blob added. For instance:
https://lore.kernel.org/r/CAD=FV=Uo-7rFWGiJG0oJ0ydosA4DxhFqiWGrab1zoZyxyPsOBg@mail.gmail.com/
Where I said:
> I'm not really an expert on
> MIPI panels but the convention of a big stream of binary commands
> seems to match what other panels in this driver do, even if their
> table of binary data isn't quite as long as yours (are all of yours
> actually needed?)
The problem is that it's hard for me to make a strong argument here
when there is prior art of panels being supported with blob-sequences.
In this case, I think you as an upstream developer have more leverage.
I can help put pressure to make sure that upstream concerns are
addressed, but I think it's on upstream to put their foot down and say
that these blob sequences are not OK for new panels. In each case I
landed a patch with a new blob sequence I tried to give the community
time to respond and I tried to telegraph what I was going to do to
make sure nobody was surprised...
-Doug
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-07-06 21:58 ` Doug Anderson
@ 2023-07-06 22:21 ` Linus Walleij
0 siblings, 0 replies; 41+ messages in thread
From: Linus Walleij @ 2023-07-06 22:21 UTC (permalink / raw)
To: Doug Anderson
Cc: Cong Yang, neil.armstrong, conor+dt, devicetree, sam,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
On Thu, Jul 6, 2023 at 11:58 PM Doug Anderson <dianders@google.com> wrote:
> > So the Ilitek ILI9882t is an obvious break-out.
>
> I guess. To me it feels like the concept of breaking the driver into
> multiple sub-drivers and the idea of supporting ILI9882t more cleanly
> are orthogonal. You could still do your patch #4 and break out the
> page switching function without breaking up the driver.
Yeah that's true. But with Ilitek in particular we have these nice
precedents:
drivers/gpu/drm/panel/panel-ilitek-ili9322.c
drivers/gpu/drm/panel/panel-ilitek-ili9341.c
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
So it looks disorganized to me if this one Ilitek panel controller
now goes inside another driver with other completely unrelated
drivers.
> It feels to me fairly likely that many of the panels here are just as
> different from each other as the ILI9882t is from them. I guess it's
> not a dozen, but it feels like using the same "how different are they
> from each other" metric we'd end up with at least 5-6 new drivers. It
> seems clear to me that the panel that Sam first commented on is as
> different from the others in the BOE driver as the ILI9882t is.
> Certainly it has a pretty darn big unique command sequence for init...
It doesn't really matter until we can say certainly what display controller
each of them is. It seems we can't, but for this one we can.
> The problem is that it's hard for me to make a strong argument here
> when there is prior art of panels being supported with blob-sequences.
> In this case, I think you as an upstream developer have more leverage.
> I can help put pressure to make sure that upstream concerns are
> addressed, but I think it's on upstream to put their foot down and say
> that these blob sequences are not OK for new panels. In each case I
> landed a patch with a new blob sequence I tried to give the community
> time to respond and I tried to telegraph what I was going to do to
> make sure nobody was surprised...
I would say it is not fair to block driver coming from hobbyists or minor
vendors just trying to make something work. In general I think a working
something is better than nothing so I wouldn't block anything.
But with big companies who actually talk to Ilitek, Novotek and the other
companies ending with -tek that make these display controllers I would
certainly like to send the message that datasheets and proper
defines would be appreciated, and say it is also for their best, because
I mentioned proper gamma correction is possible if the driver author
just invest time and works with the DRM community and that should
be in their best interest. Feel free to pass this along the supply
chain if you can.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
2023-07-06 21:25 ` Doug Anderson
2023-07-06 21:36 ` Linus Walleij
@ 2023-07-07 5:58 ` Sam Ravnborg
1 sibling, 0 replies; 41+ messages in thread
From: Sam Ravnborg @ 2023-07-07 5:58 UTC (permalink / raw)
To: Doug Anderson
Cc: Linus Walleij, Cong Yang, neil.armstrong, conor+dt, devicetree,
linux-kernel, dri-devel, robh+dt, krzysztof.kozlowski+dt, hsinyi
Hi all,
On Thu, Jul 06, 2023 at 02:25:16PM -0700, Doug Anderson wrote:
> Hi,
>
> On Tue, Jul 4, 2023 at 12:47 AM Linus Walleij <linus.walleij@linaro.org> wrote:
> >
> > On Thu, Jun 1, 2023 at 5:55 PM Doug Anderson <dianders@google.com> wrote:
> > > On Thu, May 25, 2023 at 2:32 AM Cong Yang
> > > <yangcong5@huaqin.corp-partner.google.com> wrote:
> > > >
> > > > The Starry-ili9882 is a 10.51" WUXGA TFT panel. which fits in nicely with
> > > > the existing panel-boe-tv101wum-nl6 driver. From the datasheet,MIPI need
> > > > to keep the LP11 state before the lcm_reset pin is pulled high. So add
> > > > lp11_before_reset flag.
> > > >
> > > > Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com>
> > > > Reviewed-by: Douglas Anderson <dianders@chromium.org>
> > > > ---
> > > > .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 371 ++++++++++++++++++
> > > > 1 file changed, 371 insertions(+)
> > >
> > > Applied to drm-misc-next:
> > >
> > > 8716a6473e6c drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel
> >
> > Sorry for noticing too late and coming after the fact and complaining.
> >
> > We must stop using the panel-boe-tv101wum-nl6.c driver as a
> > one-stop-shop for Chromium panels. The Starry panel in particular
> > hardware-wise has nothing in common with the other panels in this
> > driver and I'm suspicious about patch 3/4 as well.
> >
> > Please check my patch breaking it out to a separate driver, and
> > if you could check internally if you have a datasheet for Ilitek
> > ILI9882t or can use your vendor leverage to get one to improve
> > on the driver (such as define the DCS commands...) that would
> > be great.
> >
> > There are good reasons for grouping the panel drivers into
> > respective display controller such as fixing bugs in one place
> > and if we ever want to properly support things such as
> > gamma correction it will provide the proper per-display-controller
> > approach.
>
> I mentioned in response to your patch #3 also [1], but closing the
> loop here as well. The original reason several panels all ended up in
> one driver was in response to Sam's feedback [2]. That was even
> documented when the first of the "Chromium" panels landed in commit
> 93ee1a2c0f08 ("drm/panel: support for BOE and INX video mode panel").
If we should go with any sort of guideline then one-driver-per-controller.
So we do not mix display controllers in one driver, but we can have
different panels in one driver.
Then there may be two almost identical controllers that can share the
same driver, or there can be controllers used in two different ways so
they warrant independent drivers. In other words this should be used
with common sense.
And if someone can help naming all the magic constant that would be
super.
Sam
^ permalink raw reply [flat|nested] 41+ messages in thread
end of thread, other threads:[~2023-07-07 5:59 UTC | newest]
Thread overview: 41+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-05-19 3:23 [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-05-19 8:01 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** Cong Yang
2023-05-19 8:01 ` [v1 1/2] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-05-19 17:17 ` Doug Anderson
2023-05-19 8:01 ` [v1 2/2] drm/panel: Support for Starry-ili9882t " Cong Yang
2023-05-22 7:24 ` [v1 0/2] *** Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel *** neil.armstrong
[not found] ` <CAHwB_NK8wKaXw6Gy9CFnsZB0XrqokiHGXoMNAzd0R+myYg4gxQ@mail.gmail.com>
2023-05-23 21:04 ` Doug Anderson
2023-05-24 7:28 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-24 7:28 ` [v2 1/4] drm/panel: Support for Starry-himax83102-j02 " Cong Yang
2023-05-24 21:12 ` Doug Anderson
2023-05-24 20:22 ` [v2 0/4] Support Starry-himax83102-j02 and Starry-ili9882t " Conor Dooley
2023-05-24 7:44 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-24 7:44 ` [v2 3/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-24 21:12 ` Doug Anderson
2023-05-24 7:44 ` [v2 4/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
2023-05-24 21:13 ` Doug Anderson
2023-05-25 2:49 ` [v3 0/4] Support Starry-himax83102-j02 and Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-25 2:49 ` [v3 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-05-25 2:49 ` [v3 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-05-25 6:26 ` Conor Dooley
2023-05-25 2:49 ` [v3 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
2023-05-25 2:50 ` [v3 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-05-25 7:59 ` [v3 0/4] Support Starry-himax83102-j02 and " neil.armstrong
2023-05-25 9:31 ` [v4 " Cong Yang
2023-05-25 9:31 ` [v4 1/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 2/4] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 3/4] dt-bindings: display: panel: Add compatible for Starry ili9882t Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-05-25 9:31 ` [v4 4/4] drm/panel: Support for Starry-ili9882t TDDI MIPI-DSI panel Cong Yang
2023-06-01 15:55 ` Doug Anderson
2023-07-04 7:46 ` Linus Walleij
2023-07-06 21:25 ` Doug Anderson
2023-07-06 21:36 ` Linus Walleij
2023-07-06 21:58 ` Doug Anderson
2023-07-06 22:21 ` Linus Walleij
2023-07-07 5:58 ` Sam Ravnborg
2023-06-01 15:54 ` [v4 0/4] Support Starry-himax83102-j02 and " Doug Anderson
2023-05-24 21:12 ` [v2 2/4] dt-bindings: display: panel: Add compatible for Starry himax83102-j02 Doug Anderson
2023-05-22 9:13 ` [PATCH] drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel neil.armstrong
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