* [PATCH v3] riscv: dts: allwinner: d1: Add PMU event node
@ 2023-08-27 6:45 Inochi Amaoto
2023-08-27 12:25 ` Conor Dooley
0 siblings, 1 reply; 2+ messages in thread
From: Inochi Amaoto @ 2023-08-27 6:45 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Inochi Amaoto, Heiko Stuebner, Wei Fu, Pei Chen,
Wenhan Chen, Guo Ren
Cc: devicetree, linux-arm-kernel, linux-sunxi, linux-riscv, linux-kernel
D1 has several pmu events supported by opensbi.
These events can be used by perf for profiling.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf
---
changed from v2:
1. move pmu node from /soc to / to avoid warnings when cheching.
The meaning of T-HEAD events can be found in this pending patch:
https://lore.kernel.org/linux-perf-users/IA1PR20MB4953DD82D0116EC291C21777BBE2A@IA1PR20MB4953.namprd20.prod.outlook.com
The patch above also provides a example that shows how to setup
environment and use perf with T-HEAD events.
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 8275630af977..ed981af63b55 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -73,4 +73,44 @@ plic: interrupt-controller@10000000 {
#interrupt-cells = <2>;
};
};
+
+ pmu {
+ compatible = "riscv,pmu";
+ riscv,event-to-mhpmcounters =
+ <0x00003 0x00003 0x00000008>,
+ <0x00004 0x00004 0x00000010>,
+ <0x00005 0x00005 0x00000200>,
+ <0x00006 0x00006 0x00000100>,
+ <0x10000 0x10000 0x00004000>,
+ <0x10001 0x10001 0x00008000>,
+ <0x10002 0x10002 0x00010000>,
+ <0x10003 0x10003 0x00020000>,
+ <0x10019 0x10019 0x00000040>,
+ <0x10021 0x10021 0x00000020>;
+ riscv,event-to-mhpmevent =
+ <0x00003 0x00000000 0x00000001>,
+ <0x00004 0x00000000 0x00000002>,
+ <0x00005 0x00000000 0x00000007>,
+ <0x00006 0x00000000 0x00000006>,
+ <0x0000a 0x00000000 0x0000000b>,
+ <0x10000 0x00000000 0x0000000c>,
+ <0x10001 0x00000000 0x0000000d>,
+ <0x10002 0x00000000 0x0000000e>,
+ <0x10003 0x00000000 0x0000000f>,
+ <0x10019 0x00000000 0x00000004>,
+ <0x10021 0x00000000 0x00000003>;
+ riscv,raw-event-to-mhpmcounters =
+ <0x00000000 0x00000001 0xffffffff 0xffffffff 0x00000008>,
+ <0x00000000 0x00000002 0xffffffff 0xffffffff 0x00000010>,
+ <0x00000000 0x00000003 0xffffffff 0xffffffff 0x00000020>,
+ <0x00000000 0x00000004 0xffffffff 0xffffffff 0x00000040>,
+ <0x00000000 0x00000005 0xffffffff 0xffffffff 0x00000080>,
+ <0x00000000 0x00000006 0xffffffff 0xffffffff 0x00000100>,
+ <0x00000000 0x00000007 0xffffffff 0xffffffff 0x00000200>,
+ <0x00000000 0x0000000b 0xffffffff 0xffffffff 0x00002000>,
+ <0x00000000 0x0000000c 0xffffffff 0xffffffff 0x00004000>,
+ <0x00000000 0x0000000d 0xffffffff 0xffffffff 0x00008000>,
+ <0x00000000 0x0000000e 0xffffffff 0xffffffff 0x00010000>,
+ <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>;
+ };
};
--
2.42.0
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v3] riscv: dts: allwinner: d1: Add PMU event node
2023-08-27 6:45 [PATCH v3] riscv: dts: allwinner: d1: Add PMU event node Inochi Amaoto
@ 2023-08-27 12:25 ` Conor Dooley
0 siblings, 0 replies; 2+ messages in thread
From: Conor Dooley @ 2023-08-27 12:25 UTC (permalink / raw)
To: Inochi Amaoto
Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Chen-Yu Tsai,
Jernej Skrabec, Samuel Holland, Paul Walmsley, Palmer Dabbelt,
Albert Ou, Heiko Stuebner, Wei Fu, Pei Chen, Wenhan Chen,
Guo Ren, devicetree, linux-arm-kernel, linux-sunxi, linux-riscv,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 782 bytes --]
On Sun, Aug 27, 2023 at 02:45:01PM +0800, Inochi Amaoto wrote:
> D1 has several pmu events supported by opensbi.
> These events can be used by perf for profiling.
>
> Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
> Link: https://dl.linux-sunxi.org/D1/Xuantie_C906_R1S0_User_Manual.pdf
> ---
> changed from v2:
> 1. move pmu node from /soc to / to avoid warnings when cheching.
>
> The meaning of T-HEAD events can be found in this pending patch:
> https://lore.kernel.org/linux-perf-users/IA1PR20MB4953DD82D0116EC291C21777BBE2A@IA1PR20MB4953.namprd20.prod.outlook.com
>
> The patch above also provides a example that shows how to setup
> environment and use perf with T-HEAD events.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Thanks,
Conor.
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