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* linux-next: manual merge of the tip tree with the asm-generic tree
@ 2023-10-12  2:44 Stephen Rothwell
  2023-10-15 22:15 ` Stephen Rothwell
  0 siblings, 1 reply; 5+ messages in thread
From: Stephen Rothwell @ 2023-10-12  2:44 UTC (permalink / raw)
  To: Thomas Gleixner, Ingo Molnar, H. Peter Anvin, Peter Zijlstra,
	Arnd Bergmann
  Cc: Ard Biesheuvel, Linux Kernel Mailing List,
	Linux Next Mailing List, Russell King (Oracle)

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Hi all,

Today's linux-next merge of the tip tree got a conflict in:

  arch/ia64/include/asm/cpu.h
  arch/ia64/kernel/topology.c

between commit:

  cf8e8658100d ("arch: Remove Itanium (IA-64) architecture")

from the asm-generic tree and commit:

  c4dd854f740c ("cpu-hotplug: Provide prototypes for arch CPU registration")

from the tip tree.

I fixed it up (I deleted the files) and can carry the fix as
necessary. This is now fixed as far as linux-next is concerned, but any
non trivial conflicts should be mentioned to your upstream maintainer
when your tree is submitted for merging.  You may also want to consider
cooperating with the maintainer of the conflicting tree to minimise any
particularly complex conflicts.

-- 
Cheers,
Stephen Rothwell

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^ permalink raw reply	[flat|nested] 5+ messages in thread
* linux-next: manual merge of the tip tree with the asm-generic tree
@ 2021-08-16  1:47 Stephen Rothwell
  2021-09-01  3:20 ` Stephen Rothwell
  0 siblings, 1 reply; 5+ messages in thread
From: Stephen Rothwell @ 2021-08-16  1:47 UTC (permalink / raw)
  To: Thomas Gleixner, Ingo Molnar, H. Peter Anvin, Peter Zijlstra,
	Arnd Bergmann
  Cc: Linux Kernel Mailing List, Linux Next Mailing List, Mark Rutland,
	Vineet Gupta, Vineet Gupta

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Hi all,

Today's linux-next merge of the tip tree got a conflict in:

  include/asm-generic/bitops/non-atomic.h

between commit:

  8f76f9c46952 ("bitops/non-atomic: make @nr unsigned to avoid any DIV")

from the asm-generic tree and commit:

  cf3ee3c8c29d ("locking/atomic: add generic arch_*() bitops")

from the tip tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc include/asm-generic/bitops/non-atomic.h
index c5a7d8eb9c2b,365377fb104b..000000000000
--- a/include/asm-generic/bitops/non-atomic.h
+++ b/include/asm-generic/bitops/non-atomic.h
@@@ -13,15 -13,18 +13,18 @@@
   * If it's called on the same region of memory simultaneously, the effect
   * may be that only one operation succeeds.
   */
- static inline void __set_bit(unsigned int nr, volatile unsigned long *addr)
+ static __always_inline void
 -arch___set_bit(int nr, volatile unsigned long *addr)
++arch___set_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
  
  	*p  |= mask;
  }
+ #define __set_bit arch___set_bit
  
- static inline void __clear_bit(unsigned int nr, volatile unsigned long *addr)
+ static __always_inline void
 -arch___clear_bit(int nr, volatile unsigned long *addr)
++arch___clear_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
@@@ -38,7 -42,8 +42,8 @@@
   * If it's called on the same region of memory simultaneously, the effect
   * may be that only one operation succeeds.
   */
- static inline void __change_bit(unsigned int nr, volatile unsigned long *addr)
+ static __always_inline
 -void arch___change_bit(int nr, volatile unsigned long *addr)
++void arch___change_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
@@@ -55,7 -61,8 +61,8 @@@
   * If two examples of this operation race, one can appear to succeed
   * but actually fail.  You must protect multiple accesses with a lock.
   */
- static inline int __test_and_set_bit(unsigned int nr, volatile unsigned long *addr)
+ static __always_inline int
 -arch___test_and_set_bit(int nr, volatile unsigned long *addr)
++arch___test_and_set_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
@@@ -74,7 -82,8 +82,8 @@@
   * If two examples of this operation race, one can appear to succeed
   * but actually fail.  You must protect multiple accesses with a lock.
   */
- static inline int __test_and_clear_bit(unsigned int nr, volatile unsigned long *addr)
+ static __always_inline int
 -arch___test_and_clear_bit(int nr, volatile unsigned long *addr)
++arch___test_and_clear_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
@@@ -83,10 -92,11 +92,11 @@@
  	*p = old & ~mask;
  	return (old & mask) != 0;
  }
+ #define __test_and_clear_bit arch___test_and_clear_bit
  
  /* WARNING: non atomic and it can be reordered! */
- static inline int __test_and_change_bit(unsigned int nr,
- 					    volatile unsigned long *addr)
+ static __always_inline int
 -arch___test_and_change_bit(int nr, volatile unsigned long *addr)
++arch___test_and_change_bit(unsigned int nr, volatile unsigned long *addr)
  {
  	unsigned long mask = BIT_MASK(nr);
  	unsigned long *p = ((unsigned long *)addr) + BIT_WORD(nr);
@@@ -101,7 -112,8 +112,8 @@@
   * @nr: bit number to test
   * @addr: Address to start counting from
   */
- static inline int test_bit(unsigned int nr, const volatile unsigned long *addr)
+ static __always_inline int
 -arch_test_bit(int nr, const volatile unsigned long *addr)
++arch_test_bit(unsigned int nr, const volatile unsigned long *addr)
  {
  	return 1UL & (addr[BIT_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
  }

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^ permalink raw reply	[flat|nested] 5+ messages in thread
* linux-next: manual merge of the tip tree with the asm-generic tree
@ 2019-04-24  5:10 Stephen Rothwell
  0 siblings, 0 replies; 5+ messages in thread
From: Stephen Rothwell @ 2019-04-24  5:10 UTC (permalink / raw)
  To: Thomas Gleixner, Ingo Molnar, H. Peter Anvin, Peter Zijlstra,
	Arnd Bergmann
  Cc: Linux Next Mailing List, Linux Kernel Mailing List, Waiman Long,
	Christoph Hellwig

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Hi all,

Today's linux-next merge of the tip tree got a conflict in:

  arch/arm64/include/asm/Kbuild

between commit:

  c67fdc1f00cb ("arch: mostly remove <asm/segment.h>")

from the asm-generic tree and commit:

  46ad0840b158 ("locking/rwsem: Remove arch specific rwsem files")

from the tip tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc arch/arm64/include/asm/Kbuild
index afd8a3740b18,60a933b07001..000000000000
--- a/arch/arm64/include/asm/Kbuild
+++ b/arch/arm64/include/asm/Kbuild
@@@ -17,7 -16,7 +17,6 @@@ generic-y += mmiowb.
  generic-y += msi.h
  generic-y += qrwlock.h
  generic-y += qspinlock.h
- generic-y += rwsem.h
 -generic-y += segment.h
  generic-y += serial.h
  generic-y += set_memory.h
  generic-y += sizes.h

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^ permalink raw reply	[flat|nested] 5+ messages in thread
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