From: Nikunj A Dadhania <nikunj@amd.com>
To: <linux-kernel@vger.kernel.org>, <thomas.lendacky@amd.com>,
<x86@kernel.org>, <kvm@vger.kernel.org>
Cc: <bp@alien8.de>, <mingo@redhat.com>, <tglx@linutronix.de>,
<dave.hansen@linux.intel.com>, <dionnaglaze@google.com>,
<pgonda@google.com>, <seanjc@google.com>, <pbonzini@redhat.com>,
<nikunj@amd.com>
Subject: [PATCH v6 09/16] x86/cpufeatures: Add synthetic Secure TSC bit
Date: Tue, 28 Nov 2023 18:29:52 +0530 [thread overview]
Message-ID: <20231128125959.1810039-10-nikunj@amd.com> (raw)
In-Reply-To: <20231128125959.1810039-1-nikunj@amd.com>
Add support for the synthetic CPUID flag which indicates that the SNP
guest is running with secure tsc enabled (MSR_AMD64_SEV Bit 11 -
SecureTsc_Enabled) . This flag is there so that this capability in the
guests can be detected easily without reading MSRs every time accessors.
Suggested-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 4af140cf5719..e9dafc8cd9dc 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -237,6 +237,7 @@
#define X86_FEATURE_PVUNLOCK ( 8*32+20) /* "" PV unlock function */
#define X86_FEATURE_VCPUPREEMPT ( 8*32+21) /* "" PV vcpu_is_preempted function */
#define X86_FEATURE_TDX_GUEST ( 8*32+22) /* Intel Trust Domain Extensions Guest */
+#define X86_FEATURE_SNP_SECURE_TSC ( 8*32+23) /* "" AMD SNP Secure TSC */
/* Intel-defined CPU features, CPUID level 0x00000007:0 (EBX), word 9 */
#define X86_FEATURE_FSGSBASE ( 9*32+ 0) /* RDFSBASE, WRFSBASE, RDGSBASE, WRGSBASE instructions*/
--
2.34.1
next prev parent reply other threads:[~2023-11-28 13:02 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 12:59 [PATCH v6 00/16] Add Secure TSC support for SNP guests Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 01/16] virt: sev-guest: Use AES GCM crypto library Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 02/16] virt: sev-guest: Move mutex to SNP guest device structure Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 03/16] virt: sev-guest: Replace dev_dbg with pr_debug Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 04/16] virt: sev-guest: Add SNP guest request structure Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 05/16] virt: sev-guest: Add vmpck_id to snp_guest_dev struct Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 06/16] x86/sev: Cache the secrets page address Nikunj A Dadhania
2023-12-06 22:21 ` Dionna Amalie Glaze
2023-12-07 6:06 ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 07/16] x86/sev: Move and reorganize sev guest request api Nikunj A Dadhania
2023-11-28 22:50 ` kernel test robot
2023-11-29 2:40 ` kernel test robot
2023-12-05 17:13 ` Dionna Amalie Glaze
2023-12-06 4:24 ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 08/16] x86/mm: Add generic guest initialization hook Nikunj A Dadhania
2023-11-28 12:59 ` Nikunj A Dadhania [this message]
2023-11-28 12:59 ` [PATCH v6 10/16] x86/sev: Add Secure TSC support for SNP guests Nikunj A Dadhania
2023-11-29 4:08 ` kernel test robot
2023-11-28 12:59 ` [PATCH v6 11/16] x86/sev: Change TSC MSR behavior for Secure TSC enabled guests Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 12/16] x86/sev: Prevent RDTSC/RDTSCP interception " Nikunj A Dadhania
2023-12-05 17:16 ` Dionna Amalie Glaze
2023-12-06 4:37 ` Nikunj A. Dadhania
2023-12-06 18:45 ` Dionna Amalie Glaze
2023-12-07 6:12 ` Nikunj A. Dadhania
2023-11-28 12:59 ` [PATCH v6 13/16] x86/kvmclock: Skip kvmclock when Secure TSC is available Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 14/16] x86/sev: Mark Secure TSC as reliable Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 15/16] x86/cpu/amd: Do not print FW_BUG for Secure TSC Nikunj A Dadhania
2023-11-28 12:59 ` [PATCH v6 16/16] x86/sev: Enable Secure TSC for SNP guests Nikunj A Dadhania
2023-12-06 17:46 ` [PATCH v6 00/16] Add Secure TSC support " Peter Gonda
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