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From: Thomas Gleixner <tglx@linutronix.de>
To: LKML <linux-kernel@vger.kernel.org>
Cc: x86@kernel.org, Tom Lendacky <thomas.lendacky@amd.com>,
	Andrew Cooper <andrew.cooper3@citrix.com>,
	Arjan van de Ven <arjan@linux.intel.com>,
	Huang Rui <ray.huang@amd.com>, Juergen Gross <jgross@suse.com>,
	Dimitri Sivanich <dimitri.sivanich@hpe.com>,
	Sohil Mehta <sohil.mehta@intel.com>,
	K Prateek Nayak <kprateek.nayak@amd.com>,
	Kan Liang <kan.liang@linux.intel.com>,
	Zhang Rui <rui.zhang@intel.com>,
	"Paul E. McKenney" <paulmck@kernel.org>,
	Feng Tang <feng.tang@intel.com>,
	Andy Shevchenko <andy@infradead.org>,
	Michael Kelley <mhklinux@outlook.com>,
	"Peter Zijlstra (Intel)" <peterz@infradead.org>
Subject: [patch v5 04/19] x86/cpu: Use common topology code for Centaur and Zhaoxin
Date: Tue, 23 Jan 2024 13:53:35 +0100 (CET)	[thread overview]
Message-ID: <20240117115908.542473474@linutronix.de> (raw)
In-Reply-To: 20240117115752.863482697@linutronix.de

From: Thomas Gleixner <tglx@linutronix.de>

Centaur and Zhaoxin CPUs use only the legacy SMP detection. Remove the
invocations from their 32bit path and exempt them from the call 64bit.

No functional change intended.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mhklinux@outlook.com>


---
 arch/x86/kernel/cpu/centaur.c         |    4 ----
 arch/x86/kernel/cpu/topology_common.c |   11 ++++++++---
 arch/x86/kernel/cpu/zhaoxin.c         |    4 ----
 3 files changed, 8 insertions(+), 11 deletions(-)
---
--- a/arch/x86/kernel/cpu/centaur.c
+++ b/arch/x86/kernel/cpu/centaur.c
@@ -128,10 +128,6 @@ static void init_centaur(struct cpuinfo_
 #endif
 	early_init_centaur(c);
 	init_intel_cacheinfo(c);
-	detect_num_cpu_cores(c);
-#ifdef CONFIG_X86_32
-	detect_ht(c);
-#endif
 
 	if (c->cpuid_level > 9) {
 		unsigned int eax = cpuid_eax(10);
--- a/arch/x86/kernel/cpu/topology_common.c
+++ b/arch/x86/kernel/cpu/topology_common.c
@@ -42,7 +42,7 @@ static unsigned int parse_num_cores(stru
 	return eax.ncores + 1;
 }
 
-static void __maybe_unused parse_legacy(struct topo_scan *tscan)
+static void parse_legacy(struct topo_scan *tscan)
 {
 	unsigned int cores, core_shift, smt_shift = 0;
 	struct cpuinfo_x86 *c = tscan->c;
@@ -71,10 +71,8 @@ bool topo_is_converted(struct cpuinfo_x8
 	/* Temporary until everything is converted over. */
 	switch (boot_cpu_data.x86_vendor) {
 	case X86_VENDOR_AMD:
-	case X86_VENDOR_CENTAUR:
 	case X86_VENDOR_INTEL:
 	case X86_VENDOR_HYGON:
-	case X86_VENDOR_ZHAOXIN:
 		return false;
 	default:
 		/* Let all UP systems use the below */
@@ -132,6 +130,13 @@ static void parse_topology(struct topo_s
 		return;
 
 	tscan->ebx1_nproc_shift = get_count_order(ebx.nproc);
+
+	switch (c->x86_vendor) {
+	case X86_VENDOR_CENTAUR:
+	case X86_VENDOR_ZHAOXIN:
+		parse_legacy(tscan);
+		break;
+	}
 }
 
 static void topo_set_ids(struct topo_scan *tscan)
--- a/arch/x86/kernel/cpu/zhaoxin.c
+++ b/arch/x86/kernel/cpu/zhaoxin.c
@@ -71,10 +71,6 @@ static void init_zhaoxin(struct cpuinfo_
 {
 	early_init_zhaoxin(c);
 	init_intel_cacheinfo(c);
-	detect_num_cpu_cores(c);
-#ifdef CONFIG_X86_32
-	detect_ht(c);
-#endif
 
 	if (c->cpuid_level > 9) {
 		unsigned int eax = cpuid_eax(10);


  parent reply	other threads:[~2024-01-23 12:53 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-23 12:53 [patch v5 00/19] x86/cpu: Rework topology evaluation Thomas Gleixner
2024-01-23 12:53 ` [patch v5 01/19] x86/cpu: Provide cpuid_read() et al Thomas Gleixner
2024-01-24 12:25   ` Borislav Petkov
2024-01-24 20:02     ` Borislav Petkov
2024-02-12 13:57       ` Thomas Gleixner
2024-01-23 12:53 ` [patch v5 02/19] x86/cpu: Provide cpu_init/parse_topology() Thomas Gleixner
2024-02-01 22:16   ` Sohil Mehta
2024-01-23 12:53 ` [patch v5 03/19] x86/cpu: Add legacy topology parser Thomas Gleixner
2024-01-24 20:12   ` Borislav Petkov
2024-01-23 12:53 ` Thomas Gleixner [this message]
2024-01-30 19:09   ` [patch v5 04/19] x86/cpu: Use common topology code for Centaur and Zhaoxin Borislav Petkov
2024-01-23 12:53 ` [patch v5 05/19] x86/cpu: Move __max_die_per_package to common.c Thomas Gleixner
2024-01-23 12:53 ` [patch v5 06/19] x86/cpu: Provide a sane leaf 0xb/0x1f parser Thomas Gleixner
2024-01-30 19:31   ` Borislav Petkov
2024-02-12 14:17     ` Thomas Gleixner
2024-02-12 15:00       ` Borislav Petkov
2024-02-12 15:08         ` Thomas Gleixner
2024-02-12 15:43           ` Borislav Petkov
2024-02-12 23:02             ` Thomas Gleixner
2024-02-12 15:03       ` Thomas Gleixner
2024-02-12 15:05         ` Borislav Petkov
2024-02-13 14:30     ` [tip: x86/misc] Documentation/maintainer-tip: Add C++ tail comments exception tip-bot2 for Borislav Petkov (AMD)
2024-01-23 12:53 ` [patch v5 07/19] x86/cpu: Use common topology code for Intel Thomas Gleixner
2024-02-01 15:07   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 08/19] x86/cpu/amd: Provide a separate accessor for Node ID Thomas Gleixner
2024-02-01 15:19   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 09/19] x86/cpu: Provide an AMD/HYGON specific topology parser Thomas Gleixner
2024-02-01 15:55   ` Borislav Petkov
2024-02-02 12:30   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 10/19] x86/smpboot: Teach it about topo.amd_node_id Thomas Gleixner
2024-02-06 15:48   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 11/19] x86/cpu: Use common topology code for AMD Thomas Gleixner
2024-02-06 15:58   ` Borislav Petkov
2024-02-12 14:50     ` Thomas Gleixner
2024-02-12 15:06       ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 12/19] x86/cpu: Use common topology code for HYGON Thomas Gleixner
2024-01-23 12:53 ` [patch v5 13/19] x86/mm/numa: Use core domain size on AMD Thomas Gleixner
2024-02-12 15:56   ` Borislav Petkov
2024-01-23 12:53 ` [patch v5 14/19] x86/cpu: Make topology_amd_node_id() use the actual node info Thomas Gleixner
2024-01-23 12:53 ` [patch v5 15/19] x86/cpu: Remove topology.c Thomas Gleixner
2024-01-23 12:53 ` [patch v5 16/19] x86/cpu: Remove x86_coreid_bits Thomas Gleixner
2024-01-23 12:53 ` [patch v5 17/19] x86/apic: Remove unused phys_pkg_id() callback Thomas Gleixner
2024-01-23 12:53 ` [patch v5 18/19] x86/xen/smp_pv: Remove cpudata fiddling Thomas Gleixner
2024-01-23 12:53 ` [patch v5 19/19] x86/apic/uv: Remove the private leaf 0xb parser Thomas Gleixner
2024-01-31  7:40 ` [patch v5 00/19] x86/cpu: Rework topology evaluation Zhang, Rui

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