From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Vinod Koul <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
cros-qcom-dts-watchers@chromium.org
Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: [PATCH 04/14] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix the usage of aux clk
Date: Wed, 24 Jan 2024 13:06:32 +0530 [thread overview]
Message-ID: <20240124-pcie-aux-clk-fix-v1-4-d8a4852b6ba6@linaro.org> (raw)
In-Reply-To: <20240124-pcie-aux-clk-fix-v1-0-d8a4852b6ba6@linaro.org>
On some platforms, PHY block requires PCIE_PHY_AUX_CLK to be used when the
PCIe link enters L1SS state. On those platforms, a dedicated
PCIE_PHY_AUX_CLK is available from GCC. Other than this, the PHY block
doesn't require any other "aux" clock, including PCIE_AUX_CLK which only
required by the PCIe controller.
Historically, the DTs of the platforms requiring "aux" clock passed
PCIE_PHY_AUX_CLK as "aux" clock. But over the period of time, platforms
that do not require this dedicated "aux" clock mistakenly started passing
the PCIE_AUX_CLK as the "aux" clock. More recently, SA8775P platform passed
both "aux" (PCIE_AUX_CLK) and "phy_aux" (PCIE_PHY_AUX_CLK) clocks.
So to clean up this mess, let's remove the newly introduced "phy_aux" clock
and just use "aux" clock to supply PCIE_PHY_AUX_CLK for platforms that
require it. For the platforms that do not require a dedicated "aux" clock,
the clock is removed from DT.
While at it, let's also define "qcom,sc7280-qmp-pcie-phy" compatible for
SC7280 SoC which was earlier using the compatible
"qcom,sm8250-qmp-gen3x2-pcie-phy" as the clock requirement has changed and
also restructure the "clock-names" property for the affected platforms.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
.../bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 79 ++++++++++++++--------
1 file changed, 52 insertions(+), 27 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index 6c03f2d5fca3..2396a457f9c8 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -18,6 +18,7 @@ properties:
enum:
- qcom,sa8775p-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x4-pcie-phy
+ - qcom,sc7280-qmp-pcie-phy
- qcom,sc8180x-qmp-pcie-phy
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
@@ -44,19 +45,12 @@ properties:
maxItems: 2
clocks:
- minItems: 5
- maxItems: 7
+ minItems: 4
+ maxItems: 6
clock-names:
- minItems: 5
- items:
- - const: aux
- - const: cfg_ahb
- - const: ref
- - enum: [rchng, refgen]
- - const: pipe
- - const: pipediv2
- - const: phy_aux
+ minItems: 4
+ maxItems: 6
power-domains:
maxItems: 1
@@ -130,6 +124,28 @@ allOf:
reg:
maxItems: 1
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7280-qmp-pcie-phy
+ - qcom,sm8350-qmp-gen3x1-pcie-phy
+ - qcom,sm8450-qmp-gen3x1-pcie-phy
+ - qcom,sm8450-qmp-gen3x2-pcie-phy
+ - qcom,sm8550-qmp-gen3x2-pcie-phy
+ - qcom,sm8650-qmp-gen3x2-pcie-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ items:
+ - const: cfg_ahb
+ - const: ref
+ - enum: [rchng, refgen]
+ - const: pipe
+
- if:
properties:
compatible:
@@ -144,19 +160,19 @@ allOf:
- qcom,sm8250-qmp-gen3x1-pcie-phy
- qcom,sm8250-qmp-gen3x2-pcie-phy
- qcom,sm8250-qmp-modem-pcie-phy
- - qcom,sm8350-qmp-gen3x1-pcie-phy
- - qcom,sm8450-qmp-gen3x1-pcie-phy
- - qcom,sm8450-qmp-gen3x2-pcie-phy
- - qcom,sm8550-qmp-gen3x2-pcie-phy
- qcom,sm8550-qmp-gen4x2-pcie-phy
- - qcom,sm8650-qmp-gen3x2-pcie-phy
- qcom,sm8650-qmp-gen4x2-pcie-phy
then:
properties:
clocks:
maxItems: 5
clock-names:
- maxItems: 5
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: ref
+ - enum: [rchng, refgen]
+ - const: pipe
- if:
properties:
@@ -169,9 +185,14 @@ allOf:
then:
properties:
clocks:
- minItems: 6
+ maxItems: 5
clock-names:
- minItems: 6
+ items:
+ - const: cfg_ahb
+ - const: ref
+ - const: rchng
+ - const: pipe
+ - const: pipediv2
- if:
properties:
@@ -183,9 +204,15 @@ allOf:
then:
properties:
clocks:
- minItems: 7
+ minItems: 6
clock-names:
- minItems: 7
+ items:
+ - const: aux
+ - const: cfg_ahb
+ - const: ref
+ - const: rchng
+ - const: pipe
+ - const: pipediv2
- if:
properties:
@@ -215,13 +242,12 @@ examples:
compatible = "qcom,sc8280xp-qmp-gen3x2-pcie-phy";
reg = <0x01c18000 0x2000>;
- clocks = <&gcc GCC_PCIE_2B_AUX_CLK>,
- <&gcc GCC_PCIE_2B_CFG_AHB_CLK>,
+ clocks = <&gcc GCC_PCIE_2B_CFG_AHB_CLK>,
<&gcc GCC_PCIE_2A2B_CLKREF_CLK>,
<&gcc GCC_PCIE2B_PHY_RCHNG_CLK>,
<&gcc GCC_PCIE_2B_PIPE_CLK>,
<&gcc GCC_PCIE_2B_PIPEDIV2_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "rchng",
+ clock-names = "cfg_ahb", "ref", "rchng",
"pipe", "pipediv2";
power-domains = <&gcc PCIE_2B_GDSC>;
@@ -242,13 +268,12 @@ examples:
compatible = "qcom,sc8280xp-qmp-gen3x4-pcie-phy";
reg = <0x01c24000 0x2000>, <0x01c26000 0x2000>;
- clocks = <&gcc GCC_PCIE_2A_AUX_CLK>,
- <&gcc GCC_PCIE_2A_CFG_AHB_CLK>,
+ clocks = <&gcc GCC_PCIE_2A_CFG_AHB_CLK>,
<&gcc GCC_PCIE_2A2B_CLKREF_CLK>,
<&gcc GCC_PCIE2A_PHY_RCHNG_CLK>,
<&gcc GCC_PCIE_2A_PIPE_CLK>,
<&gcc GCC_PCIE_2A_PIPEDIV2_CLK>;
- clock-names = "aux", "cfg_ahb", "ref", "rchng",
+ clock-names = "cfg_ahb", "ref", "rchng",
"pipe", "pipediv2";
power-domains = <&gcc PCIE_2A_GDSC>;
--
2.25.1
next prev parent reply other threads:[~2024-01-24 7:37 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-24 7:36 [PATCH 00/14] Drop PCIE_AUX_CLK from the PCIe PHY nodes of Qcom SoCs Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 01/14] dt-bindings: phy: qcom,ipq8074-qmp-pcie: Drop PCIE_AUX_CLK from pcie_phy node Manivannan Sadhasivam
2024-01-29 10:54 ` Krzysztof Kozlowski
2024-01-24 7:36 ` [PATCH 02/14] arm64: dts: qcom: ipq6018: " Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 03/14] arm64: dts: qcom: ipq8074: Drop PCIE_AUX_CLK from pcie_phy nodes Manivannan Sadhasivam
2024-01-24 7:36 ` Manivannan Sadhasivam [this message]
2024-01-29 10:54 ` [PATCH 04/14] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix the usage of aux clk Krzysztof Kozlowski
2024-01-30 17:14 ` Vinod Koul
2024-01-24 7:36 ` [PATCH 05/14] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document missing compatible for SM8350 3x2 PHY Manivannan Sadhasivam
2024-01-29 10:54 ` Krzysztof Kozlowski
2024-01-24 7:36 ` [PATCH 06/14] phy: qcom: qmp-pcie: Add a new compatible for SC7280 SoC Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 07/14] phy: qcom: qmp-pcie: Add a comment to clarify the use of "aux and "phy_aux" clocks Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 08/14] arm64: dts: qcom: sc7280: Drop PCIE_AUX_CLK from pcie_phy node Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 09/14] arm64: dts: qcom: sc8280xp: Drop PCIE_AUX_CLK from pcie_phy nodes Manivannan Sadhasivam
2024-01-24 13:22 ` Konrad Dybcio
2024-01-24 7:36 ` [PATCH 10/14] arm64: dts: qcom: sm8350: " Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 11/14] arm64: dts: qcom: sm8450: Drop PCIE_AUX_CLK from pcie_phy node Manivannan Sadhasivam
2024-01-24 7:36 ` [PATCH 12/14] arm64: dts: qcom: sm8550: " Manivannan Sadhasivam
2024-01-24 12:26 ` neil.armstrong
2024-01-24 7:36 ` [PATCH 13/14] arm64: dts: qcom: sm8650: " Manivannan Sadhasivam
2024-01-24 12:34 ` neil.armstrong
2024-01-24 7:36 ` [PATCH 14/14] arm64: dts: qcom: sa8775p: Drop PCIE_AUX_CLK from pcie_phy nodes Manivannan Sadhasivam
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