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* [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs
@ 2024-01-29  6:20 Qiuxu Zhuo
  2024-01-29  6:20 ` [PATCH 1/2] EDAC/igen6: Add one more Intel Alder Lake-N SoC support Qiuxu Zhuo
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Qiuxu Zhuo @ 2024-01-29  6:20 UTC (permalink / raw)
  To: Tony Luck
  Cc: Qiuxu Zhuo, Borislav Petkov, Aristeu Rozanski,
	Mauro Carvalho Chehab, linux-edac, linux-kernel, lili.li,
	ricardo.neri-calderon

Both patches solely add CPU IDs for EDAC support.

- Part1: Add a new Alder Lake-N SoC compute die ID for EDAC support.
- Part2: Add the Grand Ridge (micro-server) CPU model ID for EDAC support.

Lili Li (1):
  EDAC/igen6: Add one more Intel Alder Lake-N SoC support

Qiuxu Zhuo (1):
  EDAC/i10nm: Add Intel Grand Ridge micro-server support

 drivers/edac/i10nm_base.c | 1 +
 drivers/edac/igen6_edac.c | 2 ++
 2 files changed, 3 insertions(+)


base-commit: 6613476e225e090cc9aad49be7fa504e290dd33d
-- 
2.17.1


^ permalink raw reply	[flat|nested] 5+ messages in thread

* [PATCH 1/2] EDAC/igen6: Add one more Intel Alder Lake-N SoC support
  2024-01-29  6:20 [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Qiuxu Zhuo
@ 2024-01-29  6:20 ` Qiuxu Zhuo
  2024-01-29  6:20 ` [PATCH 2/2] EDAC/i10nm: Add Intel Grand Ridge micro-server support Qiuxu Zhuo
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Qiuxu Zhuo @ 2024-01-29  6:20 UTC (permalink / raw)
  To: Tony Luck
  Cc: Lili Li, Borislav Petkov, Aristeu Rozanski,
	Mauro Carvalho Chehab, Qiuxu Zhuo, linux-edac, linux-kernel,
	ricardo.neri-calderon

From: Lili Li <lili.li@intel.com>

Add a new Intel Alder Lake-N SoC compute die ID for EDAC support.

Signed-off-by: Lili Li <lili.li@intel.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/igen6_edac.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/edac/igen6_edac.c b/drivers/edac/igen6_edac.c
index 2b0ecdeba5cd..cdd8480e7368 100644
--- a/drivers/edac/igen6_edac.c
+++ b/drivers/edac/igen6_edac.c
@@ -238,6 +238,7 @@ static struct work_struct ecclog_work;
 #define DID_ADL_N_SKU9	0x4678
 #define DID_ADL_N_SKU10	0x4679
 #define DID_ADL_N_SKU11	0x467c
+#define DID_ADL_N_SKU12	0x4632
 
 /* Compute die IDs for Raptor Lake-P with IBECC */
 #define DID_RPL_P_SKU1	0xa706
@@ -583,6 +584,7 @@ static const struct pci_device_id igen6_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU9), (kernel_ulong_t)&adl_n_cfg },
 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU10), (kernel_ulong_t)&adl_n_cfg },
 	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU11), (kernel_ulong_t)&adl_n_cfg },
+	{ PCI_VDEVICE(INTEL, DID_ADL_N_SKU12), (kernel_ulong_t)&adl_n_cfg },
 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU1), (kernel_ulong_t)&rpl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU2), (kernel_ulong_t)&rpl_p_cfg },
 	{ PCI_VDEVICE(INTEL, DID_RPL_P_SKU3), (kernel_ulong_t)&rpl_p_cfg },
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/2] EDAC/i10nm: Add Intel Grand Ridge micro-server support
  2024-01-29  6:20 [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Qiuxu Zhuo
  2024-01-29  6:20 ` [PATCH 1/2] EDAC/igen6: Add one more Intel Alder Lake-N SoC support Qiuxu Zhuo
@ 2024-01-29  6:20 ` Qiuxu Zhuo
  2024-01-30  2:45 ` [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Ricardo Neri
  2024-02-01 20:47 ` Luck, Tony
  3 siblings, 0 replies; 5+ messages in thread
From: Qiuxu Zhuo @ 2024-01-29  6:20 UTC (permalink / raw)
  To: Tony Luck
  Cc: Qiuxu Zhuo, Borislav Petkov, Aristeu Rozanski,
	Mauro Carvalho Chehab, linux-edac, linux-kernel, lili.li,
	ricardo.neri-calderon

The Grand Ridge CPU model uses similar memory controller registers with
Granite Rapids server. Add Grand Ridge CPU model ID for EDAC support.

Tested-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
---
 drivers/edac/i10nm_base.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/edac/i10nm_base.c b/drivers/edac/i10nm_base.c
index 2b83d6de9352..3fd22a1eb1a9 100644
--- a/drivers/edac/i10nm_base.c
+++ b/drivers/edac/i10nm_base.c
@@ -951,6 +951,7 @@ static const struct x86_cpu_id i10nm_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(EMERALDRAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &spr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(GRANITERAPIDS_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT_X,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
+	X86_MATCH_INTEL_FAM6_MODEL_STEPPINGS(ATOM_CRESTMONT,	X86_STEPPINGS(0x0, 0xf), &gnr_cfg),
 	{}
 };
 MODULE_DEVICE_TABLE(x86cpu, i10nm_cpuids);
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs
  2024-01-29  6:20 [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Qiuxu Zhuo
  2024-01-29  6:20 ` [PATCH 1/2] EDAC/igen6: Add one more Intel Alder Lake-N SoC support Qiuxu Zhuo
  2024-01-29  6:20 ` [PATCH 2/2] EDAC/i10nm: Add Intel Grand Ridge micro-server support Qiuxu Zhuo
@ 2024-01-30  2:45 ` Ricardo Neri
  2024-02-01 20:47 ` Luck, Tony
  3 siblings, 0 replies; 5+ messages in thread
From: Ricardo Neri @ 2024-01-30  2:45 UTC (permalink / raw)
  To: Qiuxu Zhuo
  Cc: Tony Luck, Borislav Petkov, Aristeu Rozanski,
	Mauro Carvalho Chehab, linux-edac, linux-kernel, lili.li

On Mon, Jan 29, 2024 at 02:20:38PM +0800, Qiuxu Zhuo wrote:
> Both patches solely add CPU IDs for EDAC support.
> 
> - Part1: Add a new Alder Lake-N SoC compute die ID for EDAC support.
> - Part2: Add the Grand Ridge (micro-server) CPU model ID for EDAC support.
> 
> Lili Li (1):
>   EDAC/igen6: Add one more Intel Alder Lake-N SoC support
> 
> Qiuxu Zhuo (1):
>   EDAC/i10nm: Add Intel Grand Ridge micro-server support
> 
>  drivers/edac/i10nm_base.c | 1 +
>  drivers/edac/igen6_edac.c | 2 ++
>  2 files changed, 3 insertions(+)

For the whole series,

Tested-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* RE: [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs
  2024-01-29  6:20 [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Qiuxu Zhuo
                   ` (2 preceding siblings ...)
  2024-01-30  2:45 ` [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Ricardo Neri
@ 2024-02-01 20:47 ` Luck, Tony
  3 siblings, 0 replies; 5+ messages in thread
From: Luck, Tony @ 2024-02-01 20:47 UTC (permalink / raw)
  To: Zhuo, Qiuxu
  Cc: Borislav Petkov, Aristeu Rozanski, Mauro Carvalho Chehab,
	linux-edac, linux-kernel, Li, Lili, ricardo.neri-calderon

> Both patches solely add CPU IDs for EDAC support.
>
> - Part1: Add a new Alder Lake-N SoC compute die ID for EDAC support.
> - Part2: Add the Grand Ridge (micro-server) CPU model ID for EDAC support.
>
> Lili Li (1):
>   EDAC/igen6: Add one more Intel Alder Lake-N SoC support
>
> Qiuxu Zhuo (1):
>   EDAC/i10nm: Add Intel Grand Ridge micro-server support

Applied both patches.

Thanks

-Tony

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2024-02-01 20:47 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-01-29  6:20 [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Qiuxu Zhuo
2024-01-29  6:20 ` [PATCH 1/2] EDAC/igen6: Add one more Intel Alder Lake-N SoC support Qiuxu Zhuo
2024-01-29  6:20 ` [PATCH 2/2] EDAC/i10nm: Add Intel Grand Ridge micro-server support Qiuxu Zhuo
2024-01-30  2:45 ` [PATCH 0/2] EDAC/{igen6,i10nm}: Add EDAC support for two Intel CPUs Ricardo Neri
2024-02-01 20:47 ` Luck, Tony

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