* [PATCH v3 1/4] dt-bindings: spi: Convert spi-davinci.txt to YAML
@ 2024-02-01 22:50 Andrew Davis
2024-02-01 22:50 ` [PATCH v3 2/4] dt-bindings: clock: Convert keystone-gate.txt " Andrew Davis
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Andrew Davis @ 2024-02-01 22:50 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-doc, devicetree, linux-kernel, Andrew Davis
Convert spi-davinci.txt to ti,dm6441-spi.yaml.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes for v3:
- Add tags and rebase
Changes for v2:
- Fix typo s/dm6446/dm6441
.../devicetree/bindings/spi/spi-davinci.txt | 100 ------------------
.../bindings/spi/ti,dm6441-spi.yaml | 76 +++++++++++++
2 files changed, 76 insertions(+), 100 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt
create mode 100644 Documentation/devicetree/bindings/spi/ti,dm6441-spi.yaml
diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt
deleted file mode 100644
index f012888656eca..0000000000000
--- a/Documentation/devicetree/bindings/spi/spi-davinci.txt
+++ /dev/null
@@ -1,100 +0,0 @@
-Davinci SPI controller device bindings
-
-Links on DM:
-Keystone 2 - https://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
-dm644x - https://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
-OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
-
-Required properties:
-- #address-cells: number of cells required to define a chip select
- address on the SPI bus. Should be set to 1.
-- #size-cells: should be zero.
-- compatible:
- - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
- - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
- - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
- family
-- reg: Offset and length of SPI controller register space
-- num-cs: Number of chip selects. This includes internal as well as
- GPIO chip selects.
-- ti,davinci-spi-intr-line: interrupt line used to connect the SPI
- IP to the interrupt controller within the SoC. Possible values
- are 0 and 1. Manual says one of the two possible interrupt
- lines can be tied to the interrupt controller. Set this
- based on a specific SoC configuration.
-- interrupts: interrupt number mapped to CPU.
-- clocks: spi clk phandle
- For 66AK2G this property should be set per binding,
- Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
-
-SoC-specific Required Properties:
-
-The following are mandatory properties for Keystone 2 66AK2G SoCs only:
-
-- power-domains: Should contain a phandle to a PM domain provider node
- and an args specifier containing the SPI device id
- value. This property is as per the binding,
-
-Optional:
-- cs-gpios: gpio chip selects
- For example to have 3 internal CS and 2 GPIO CS, user could define
- cs-gpios = <0>, <0>, <0>, <&gpio1 30 0>, <&gpio1 31 0>;
- where first three are internal CS and last two are GPIO CS.
-
-Optional properties for slave devices:
-SPI slave nodes can contain the following properties.
-Not all SPI Peripherals from Texas Instruments support this.
-Please check SPI peripheral documentation for a device before using these.
-
-- ti,spi-wdelay : delay between transmission of words
- (SPIFMTn.WDELAY, SPIDAT1.WDEL) must be specified in number of SPI module
- clock periods.
-
- delay = WDELAY * SPI_module_clock_period + 2 * SPI_module_clock_period
-
-Below is timing diagram which shows functional meaning of
-"ti,spi-wdelay" parameter.
-
- +-+ +-+ +-+ +-+ +-+ +-+ +-+ +-+
-SPI_CLK | | | | | | | | | | | | | | | |
- +----------+ +-+ +-+ +-+ +-+ +---------------------------+ +-+ +-+ +-
-
-SPI_SOMI/SIMO+-----------------+ +-----------
- +----------+ word1 +---------------------------+word2
- +-----------------+ +-----------
- WDELAY
- <-------------------------->
-
-Example of a NOR flash slave device (n25q032) connected to DaVinci
-SPI controller device over the SPI bus.
-
-spi0:spi@20bf0000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "ti,dm6446-spi";
- reg = <0x20BF0000 0x1000>;
- num-cs = <4>;
- ti,davinci-spi-intr-line = <0>;
- interrupts = <338>;
- clocks = <&clkspi>;
-
- flash: flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "st,m25p32";
- spi-max-frequency = <25000000>;
- reg = <0>;
- ti,spi-wdelay = <8>;
-
- partition@0 {
- label = "u-boot-spl";
- reg = <0x0 0x80000>;
- read-only;
- };
-
- partition@1 {
- label = "test";
- reg = <0x80000 0x380000>;
- };
- };
-};
diff --git a/Documentation/devicetree/bindings/spi/ti,dm6441-spi.yaml b/Documentation/devicetree/bindings/spi/ti,dm6441-spi.yaml
new file mode 100644
index 0000000000000..a71e51fb87e4f
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/ti,dm6441-spi.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/ti,dm6441-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Davinci SPI Controller
+
+description:
+ SPI controllers on TI Davinci, OMAP-L138, and Keystone2 SoCs.
+
+maintainers:
+ - Andrew Davis <afd@ti.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - ti,dm6441-spi # for SPI used on DM644x SoC family
+ - ti,da830-spi # for SPI used on DA8xx SoC family
+ - ti,keystone-spi # for SPI used on Keystone2 SoC family
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ ti,davinci-spi-intr-line:
+ description:
+ Interrupt line used to connect the SPI IP to the interrupt controller
+ within the SoC. Possible values are 0 and 1. Manual says one of the
+ two possible interrupt lines can be tied to the interrupt controller.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@20bf0000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "ti,dm6441-spi";
+ reg = <0x20bf0000 0x1000>;
+ interrupts = <338>;
+ clocks = <&clkspi>;
+
+ num-cs = <4>;
+ ti,davinci-spi-intr-line = <0>;
+
+ flash@0 {
+ compatible = "st,m25p32";
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ ti,spi-wdelay = <8>;
+ };
+ };
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 2/4] dt-bindings: clock: Convert keystone-gate.txt to YAML
2024-02-01 22:50 [PATCH v3 1/4] dt-bindings: spi: Convert spi-davinci.txt to YAML Andrew Davis
@ 2024-02-01 22:50 ` Andrew Davis
2024-02-01 22:50 ` [PATCH v3 3/4] dt-bindings: arm: keystone: Convert keystone.txt " Andrew Davis
2024-02-01 22:50 ` [PATCH v3 4/4] dt-bindings: dma: Convert ti-edma.txt " Andrew Davis
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Davis @ 2024-02-01 22:50 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-doc, devicetree, linux-kernel, Andrew Davis
Convert keystone-gate.txt to ti,keystone,psc-clock.yaml.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes for v3:
- Add tags and rebase
- Update reference in keystone-gate.txt
.../bindings/clock/keystone-gate.txt | 29 ---------
.../bindings/clock/ti,keystone,psc-clock.yaml | 59 +++++++++++++++++++
.../bindings/remoteproc/ti,keystone-rproc.txt | 2 +-
3 files changed, 60 insertions(+), 30 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/keystone-gate.txt
create mode 100644 Documentation/devicetree/bindings/clock/ti,keystone,psc-clock.yaml
diff --git a/Documentation/devicetree/bindings/clock/keystone-gate.txt b/Documentation/devicetree/bindings/clock/keystone-gate.txt
deleted file mode 100644
index c5aa187026e3a..0000000000000
--- a/Documentation/devicetree/bindings/clock/keystone-gate.txt
+++ /dev/null
@@ -1,29 +0,0 @@
-Status: Unstable - ABI compatibility may be broken in the future
-
-Binding for Keystone gate control driver which uses PSC controller IP.
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Required properties:
-- compatible : shall be "ti,keystone,psc-clock".
-- #clock-cells : from common clock binding; shall be set to 0.
-- clocks : parent clock phandle
-- reg : psc control and domain address address space
-- reg-names : psc control and domain registers
-- domain-id : psc domain id needed to check the transition state register
-
-Optional properties:
-- clock-output-names : From common clock binding to override the
- default output clock name
-Example:
- clkusb: clkusb {
- #clock-cells = <0>;
- compatible = "ti,keystone,psc-clock";
- clocks = <&chipclk16>;
- clock-output-names = "usb";
- reg = <0x02350008 0xb00>, <0x02350000 0x400>;
- reg-names = "control", "domain";
- domain-id = <0>;
- };
diff --git a/Documentation/devicetree/bindings/clock/ti,keystone,psc-clock.yaml b/Documentation/devicetree/bindings/clock/ti,keystone,psc-clock.yaml
new file mode 100644
index 0000000000000..e65b7383ca4a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti,keystone,psc-clock.yaml
@@ -0,0 +1,59 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/ti,keystone,psc-clock.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Keystone gate control driver which uses PSC controller IP
+
+maintainers:
+ - Andrew Davis <afd@ti.com>
+
+properties:
+ compatible:
+ const: ti,keystone,psc-clock
+
+ reg:
+ items:
+ - description: PSC control registers
+ - description: Domain registers
+
+ reg-names:
+ items:
+ - const: control
+ - const: domain
+
+ domain-id:
+ description: PSC domain id needed to check the transition state register
+ $ref: /schemas/types.yaml#/definitions/uint32
+
+ clocks:
+ maxItems: 1
+
+ clock-output-names:
+ maxItems: 1
+
+ "#clock-cells":
+ const: 0
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - domain-id
+ - clocks
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ clkusb@2350008 {
+ compatible = "ti,keystone,psc-clock";
+ reg = <0x02350008 0xb00>, <0x02350000 0x400>;
+ reg-names = "control", "domain";
+ domain-id = <0>;
+ clocks = <&chipclk16>;
+ clock-output-names = "usb";
+ #clock-cells = <0>;
+ };
diff --git a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt
index 463a97c11eff3..08bc83ecfd3f9 100644
--- a/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt
+++ b/Documentation/devicetree/bindings/remoteproc/ti,keystone-rproc.txt
@@ -75,7 +75,7 @@ SoCs only:
- clocks: Should contain the device's input clock, and should be
defined as per the bindings in,
- Documentation/devicetree/bindings/clock/keystone-gate.txt
+ Documentation/devicetree/bindings/clock/ti,keystone,psc-clock.yaml
The following are mandatory properties for Keystone 2 66AK2G SoCs only:
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 3/4] dt-bindings: arm: keystone: Convert keystone.txt to YAML
2024-02-01 22:50 [PATCH v3 1/4] dt-bindings: spi: Convert spi-davinci.txt to YAML Andrew Davis
2024-02-01 22:50 ` [PATCH v3 2/4] dt-bindings: clock: Convert keystone-gate.txt " Andrew Davis
@ 2024-02-01 22:50 ` Andrew Davis
2024-02-01 22:50 ` [PATCH v3 4/4] dt-bindings: dma: Convert ti-edma.txt " Andrew Davis
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Davis @ 2024-02-01 22:50 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-doc, devicetree, linux-kernel, Andrew Davis
Convert keystone.txt to ti,keystone.yaml.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes for v3:
- Add tags and rebase
Documentation/arch/arm/keystone/overview.rst | 2 +-
.../bindings/arm/keystone/keystone.txt | 42 ---------------
.../bindings/arm/keystone/ti,keystone.yaml | 53 +++++++++++++++++++
3 files changed, 54 insertions(+), 43 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/keystone/keystone.txt
create mode 100644 Documentation/devicetree/bindings/arm/keystone/ti,keystone.yaml
diff --git a/Documentation/arch/arm/keystone/overview.rst b/Documentation/arch/arm/keystone/overview.rst
index cd90298c493c7..6d8896ba9a6e2 100644
--- a/Documentation/arch/arm/keystone/overview.rst
+++ b/Documentation/arch/arm/keystone/overview.rst
@@ -65,7 +65,7 @@ specified through DTS. Following are the DTS used:
The device tree documentation for the keystone machines are located at
- Documentation/devicetree/bindings/arm/keystone/keystone.txt
+ Documentation/devicetree/bindings/arm/keystone/ti,keystone.yaml
Document Author
---------------
diff --git a/Documentation/devicetree/bindings/arm/keystone/keystone.txt b/Documentation/devicetree/bindings/arm/keystone/keystone.txt
deleted file mode 100644
index f310bad044830..0000000000000
--- a/Documentation/devicetree/bindings/arm/keystone/keystone.txt
+++ /dev/null
@@ -1,42 +0,0 @@
-TI Keystone Platforms Device Tree Bindings
------------------------------------------------
-
-Boards with Keystone2 based devices (TCI66xxK2H) SOC shall have the
-following properties.
-
-Required properties:
- - compatible: All TI specific devices present in Keystone SOC should be in
- the form "ti,keystone-*". Generic devices like gic, arch_timers, ns16550
- type UART should use the specified compatible for those devices.
-
-SoC families:
-
-- Keystone 2 generic SoC:
- compatible = "ti,keystone"
-
-SoCs:
-
-- Keystone 2 Hawking/Kepler
- compatible = "ti,k2hk", "ti,keystone"
-- Keystone 2 Lamarr
- compatible = "ti,k2l", "ti,keystone"
-- Keystone 2 Edison
- compatible = "ti,k2e", "ti,keystone"
-- K2G
- compatible = "ti,k2g", "ti,keystone"
-
-Boards:
-- Keystone 2 Hawking/Kepler EVM
- compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone"
-
-- Keystone 2 Lamarr EVM
- compatible = "ti,k2l-evm", "ti, k2l", "ti,keystone"
-
-- Keystone 2 Edison EVM
- compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone"
-
-- K2G EVM
- compatible = "ti,k2g-evm", "ti,k2g", "ti-keystone"
-
-- K2G Industrial Communication Engine EVM
- compatible = "ti,k2g-ice", "ti,k2g", "ti-keystone"
diff --git a/Documentation/devicetree/bindings/arm/keystone/ti,keystone.yaml b/Documentation/devicetree/bindings/arm/keystone/ti,keystone.yaml
new file mode 100644
index 0000000000000..60af461af5ff9
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/keystone/ti,keystone.yaml
@@ -0,0 +1,53 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/keystone/ti,keystone.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments Keystone SoC architecture
+
+maintainers:
+ - Andrew Davis <afd@ti.com>
+
+description: |
+ Platforms based on Texas Instruments Keystone2 Multicore SoC architecture
+ shall have the following properties.
+
+properties:
+ $nodename:
+ const: '/'
+ compatible:
+ oneOf:
+
+ - description: Keystone 2 Hawking/Kepler
+ items:
+ - enum:
+ - ti,k2hk-evm # Keystone 2 Hawking/Kepler EVM
+ - const: ti,k2hk
+ - const: ti,keystone
+
+ - description: Keystone 2 Lamarr
+ items:
+ - enum:
+ - ti,k2l-evm # Keystone 2 Lamarr EVM
+ - const: ti,k2l
+ - const: ti,keystone
+
+ - description: Keystone 2 Edison
+ items:
+ - enum:
+ - ti,k2e-evm # Keystone 2 Edison EVM
+ - const: ti,k2e
+ - const: ti,keystone
+
+ - description: K2G
+ items:
+ - enum:
+ - ti,k2g-evm # K2G EVM
+ - ti,k2g-ice # K2G Industrial Communication Engine EVM
+ - const: ti,k2g
+ - const: ti,keystone
+
+additionalProperties: true
+
+...
--
2.39.2
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v3 4/4] dt-bindings: dma: Convert ti-edma.txt to YAML
2024-02-01 22:50 [PATCH v3 1/4] dt-bindings: spi: Convert spi-davinci.txt to YAML Andrew Davis
2024-02-01 22:50 ` [PATCH v3 2/4] dt-bindings: clock: Convert keystone-gate.txt " Andrew Davis
2024-02-01 22:50 ` [PATCH v3 3/4] dt-bindings: arm: keystone: Convert keystone.txt " Andrew Davis
@ 2024-02-01 22:50 ` Andrew Davis
2 siblings, 0 replies; 4+ messages in thread
From: Andrew Davis @ 2024-02-01 22:50 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-doc, devicetree, linux-kernel, Andrew Davis
Convert ti-edma.txt to ti/ti,edma3-tpcc.yaml and
ti/ti,edma3-tptc.yaml.
Signed-off-by: Andrew Davis <afd@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
---
Changes for v3:
- Add tags and rebase
.../devicetree/bindings/dma/ti-edma.txt | 238 ------------------
.../bindings/dma/ti/ti,edma3-tpcc.yaml | 128 ++++++++++
.../bindings/dma/ti/ti,edma3-tptc.yaml | 63 +++++
MAINTAINERS | 1 -
4 files changed, 191 insertions(+), 239 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/dma/ti-edma.txt
create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,edma3-tpcc.yaml
create mode 100644 Documentation/devicetree/bindings/dma/ti/ti,edma3-tptc.yaml
diff --git a/Documentation/devicetree/bindings/dma/ti-edma.txt b/Documentation/devicetree/bindings/dma/ti-edma.txt
deleted file mode 100644
index f719e1612b0a5..0000000000000
--- a/Documentation/devicetree/bindings/dma/ti-edma.txt
+++ /dev/null
@@ -1,238 +0,0 @@
-Texas Instruments eDMA
-
-The eDMA3 consists of two components: Channel controller (CC) and Transfer
-Controller(s) (TC). The CC is the main entry for DMA users since it is
-responsible for the DMA channel handling, while the TCs are responsible to
-execute the actual DMA tansfer.
-
-------------------------------------------------------------------------------
-eDMA3 Channel Controller
-
-Required properties:
---------------------
-- compatible: Should be:
- - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
- AM33xx and AM43xx SoCs.
- - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
- channel controller(s) on 66AK2G.
-- #dma-cells: Should be set to <2>. The first number is the DMA request
- number and the second is the TC the channel is serviced on.
-- reg: Memory map of eDMA CC
-- reg-names: "edma3_cc"
-- interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
-- interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
-- ti,tptcs: List of TPTCs associated with the eDMA in the following form:
- <&tptc_phandle TC_priority_number>. The highest priority is 0.
-
-SoC-specific Required properties:
---------------------------------
-The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
-- ti,hwmods: Name of the hwmods associated to the eDMA CC.
-
-The following are mandatory properties for 66AK2G SoCs only:
-- power-domains:Should contain a phandle to a PM domain provider node
- and an args specifier containing the device id
- value. This property is as per the binding,
- Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
-
-Optional properties:
--------------------
-- ti,edma-memcpy-channels: List of channels allocated to be used for memcpy, iow
- these channels will be SW triggered channels. See example.
-- ti,edma-reserved-slot-ranges: PaRAM slot ranges which should not be used by
- the driver, they are allocated to be used by for example the
- DSP. See example.
-- dma-channel-mask: Mask of usable channels.
- Single uint32 for EDMA with 32 channels, array of two uint32 for
- EDMA with 64 channels. See example and
- Documentation/devicetree/bindings/dma/dma-common.yaml
-
-
-------------------------------------------------------------------------------
-eDMA3 Transfer Controller
-
-Required properties:
---------------------
-- compatible: Should be:
- - "ti,edma3-tptc" for the transfer controller(s) on OMAP,
- AM33xx and AM43xx SoCs.
- - "ti,k2g-edma3-tptc", "ti,edma3-tptc" for the
- transfer controller(s) on 66AK2G.
-- reg: Memory map of eDMA TC
-- interrupts: Interrupt number for TCerrint.
-
-SoC-specific Required properties:
---------------------------------
-The following are mandatory properties for OMAP, AM33xx and AM43xx SoCs only:
-- ti,hwmods: Name of the hwmods associated to the eDMA TC.
-
-The following are mandatory properties for 66AK2G SoCs only:
-- power-domains:Should contain a phandle to a PM domain provider node
- and an args specifier containing the device id
- value. This property is as per the binding,
- Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
-
-Optional properties:
--------------------
-- interrupt-names: "edma3_tcerrint"
-
-------------------------------------------------------------------------------
-Examples:
-
-1.
-edma: edma@49000000 {
- compatible = "ti,edma3-tpcc";
- ti,hwmods = "tpcc";
- reg = <0x49000000 0x10000>;
- reg-names = "edma3_cc";
- interrupts = <12 13 14>;
- interrupt-names = "edma3_ccint", "edma3_mperr", "edma3_ccerrint";
- dma-requests = <64>;
- #dma-cells = <2>;
-
- ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 7>, <&edma_tptc2 0>;
-
- /* Channel 20 and 21 is allocated for memcpy */
- ti,edma-memcpy-channels = <20 21>;
- /* The following PaRAM slots are reserved: 35-44 and 100-109 */
- ti,edma-reserved-slot-ranges = <35 10>, <100 10>;
- /* The following channels are reserved: 35-44 */
- dma-channel-mask = <0xffffffff /* Channel 0-31 */
- 0xffffe007>; /* Channel 32-63 */
-};
-
-edma_tptc0: tptc@49800000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc0";
- reg = <0x49800000 0x100000>;
- interrupts = <112>;
- interrupt-names = "edm3_tcerrint";
-};
-
-edma_tptc1: tptc@49900000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc1";
- reg = <0x49900000 0x100000>;
- interrupts = <113>;
- interrupt-names = "edm3_tcerrint";
-};
-
-edma_tptc2: tptc@49a00000 {
- compatible = "ti,edma3-tptc";
- ti,hwmods = "tptc2";
- reg = <0x49a00000 0x100000>;
- interrupts = <114>;
- interrupt-names = "edm3_tcerrint";
-};
-
-sham: sham@53100000 {
- compatible = "ti,omap4-sham";
- ti,hwmods = "sham";
- reg = <0x53100000 0x200>;
- interrupts = <109>;
- /* DMA channel 36 executed on eDMA TC0 - low priority queue */
- dmas = <&edma 36 0>;
- dma-names = "rx";
-};
-
-mcasp0: mcasp@48038000 {
- compatible = "ti,am33xx-mcasp-audio";
- ti,hwmods = "mcasp0";
- reg = <0x48038000 0x2000>,
- <0x46000000 0x400000>;
- reg-names = "mpu", "dat";
- interrupts = <80>, <81>;
- interrupt-names = "tx", "rx";
- /* DMA channels 8 and 9 executed on eDMA TC2 - high priority queue */
- dmas = <&edma 8 2>,
- <&edma 9 2>;
- dma-names = "tx", "rx";
-};
-
-2.
-edma1: edma@2728000 {
- compatible = "ti,k2g-edma3-tpcc", "ti,edma3-tpcc";
- reg = <0x02728000 0x8000>;
- reg-names = "edma3_cc";
- interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 219 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 220 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "edma3_ccint", "emda3_mperr",
- "edma3_ccerrint";
- dma-requests = <64>;
- #dma-cells = <2>;
-
- ti,tptcs = <&edma1_tptc0 7>, <&edma1_tptc1 0>;
-
- /*
- * memcpy is disabled, can be enabled with:
- * ti,edma-memcpy-channels = <12 13 14 15>;
- * for example.
- */
-
- power-domains = <&k2g_pds 0x4f>;
-};
-
-edma1_tptc0: tptc@27b0000 {
- compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
- reg = <0x027b0000 0x400>;
- power-domains = <&k2g_pds 0x4f>;
-};
-
-edma1_tptc1: tptc@27b8000 {
- compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
- reg = <0x027b8000 0x400>;
- power-domains = <&k2g_pds 0x4f>;
-};
-
-mmc0: mmc@23000000 {
- compatible = "ti,k2g-hsmmc", "ti,omap4-hsmmc";
- reg = <0x23000000 0x400>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_EDGE_RISING>;
- dmas = <&edma1 24 0>, <&edma1 25 0>;
- dma-names = "tx", "rx";
- bus-width = <4>;
- ti,needs-special-reset;
- no-1-8-v;
- max-frequency = <96000000>;
- power-domains = <&k2g_pds 0xb>;
- clocks = <&k2g_clks 0xb 1>, <&k2g_clks 0xb 2>;
- clock-names = "fck", "mmchsdb_fck";
-};
-
-------------------------------------------------------------------------------
-DEPRECATED binding, new DTS files must use the ti,edma3-tpcc/ti,edma3-tptc
-binding.
-
-Required properties:
-- compatible : "ti,edma3"
-- #dma-cells: Should be set to <1>
- Clients should use a single channel number per DMA request.
-- reg: Memory map for accessing module
-- interrupts: Exactly 3 interrupts need to be specified in the order:
- 1. Transfer completion interrupt.
- 2. Memory protection interrupt.
- 3. Error interrupt.
-Optional properties:
-- ti,hwmods: Name of the hwmods associated to the EDMA
-- ti,edma-xbar-event-map: Crossbar event to channel map
-
-Deprecated properties:
-Listed here in case one wants to boot an old kernel with new DTB. These
-properties might need to be added to the new DTS files.
-- ti,edma-regions: Number of regions
-- ti,edma-slots: Number of slots
-- dma-channels: Specify total DMA channels per CC
-
-Example:
-
-edma: edma@49000000 {
- reg = <0x49000000 0x10000>;
- interrupt-parent = <&intc>;
- interrupts = <12 13 14>;
- compatible = "ti,edma3";
- ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
- #dma-cells = <1>;
- ti,edma-xbar-event-map = /bits/ 16 <1 12
- 2 13>;
-};
diff --git a/Documentation/devicetree/bindings/dma/ti/ti,edma3-tpcc.yaml b/Documentation/devicetree/bindings/dma/ti/ti,edma3-tpcc.yaml
new file mode 100644
index 0000000000000..c44dcfad31a10
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti/ti,edma3-tpcc.yaml
@@ -0,0 +1,128 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ti/ti,edma3-tpcc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments eDMA3 Channel Controller
+
+description: |
+ The eDMA3 consists of two components, Channel controller (CC) and Transfer
+ Controller(s) (TC). The CC is the main entry for DMA users since it is
+ responsible for the DMA channel handling, while the TCs are responsible to
+ execute the actual DMA tansfer. This documents the Channel Controller.
+
+maintainers:
+ - Andrew Davis <afd@ti.com>
+
+allOf:
+ - $ref: /schemas/dma/dma-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: ti,edma3-tpcc # OMAP, AM33xx, and AM43xx
+ - items:
+ - const: ti,k2g-edma3-tpcc # 66AK2G
+ - const: ti,edma3-tpcc
+
+ reg:
+ maxItems: 1
+
+ reg-names:
+ const: edma3_cc
+
+ interrupts:
+ items:
+ - description: CCINT Interrupt
+ - description: MPERR Interrupt
+ - description: CCERRINT Interrupt
+
+ interrupt-names:
+ items:
+ - const: edma3_ccint
+ - const: edma3_mperr
+ - const: edma3_ccerrint
+
+ "#dma-cells":
+ const: 2
+ description: |
+ The first cell is the DMA request number.
+ The second cell is the TC the channel is serviced on.
+
+ ti,tptcs:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: |
+ List of TPTCs associated with the eDMA in the following form,
+ <&tptc_phandle TC_priority_number>. The highest priority is 0.
+
+ power-domains:
+ maxItems: 1
+
+ ti,edma-memcpy-channels:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ List of channels allocated to be used for memcpy, iow
+ these channels will be SW triggered channels.
+
+ ti,edma-reserved-slot-ranges:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: |
+ PaRAM slot ranges which should not be used by the driver,
+ they are allocated to be used by for example the DSP.
+
+ dma-channel-mask:
+ description: |
+ Mask of usable channels. Single uint32 for EDMA with 32 channels,
+ array of two uint32 for EDMA with 64 channels.
+
+ dma-requests:
+ const: 64
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-names
+ - "#dma-cells"
+ - ti,tptcs
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,k2g-edma3-tptc
+then:
+ required:
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ dma-controller@49000000 {
+ compatible = "ti,edma3-tpcc";
+ reg = <0x49000000 0x10000>;
+ reg-names = "edma3_cc";
+ interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "edma3_ccint",
+ "edma3_mperr",
+ "edma3_ccerrint";
+ dma-requests = <64>;
+ #dma-cells = <2>;
+
+ ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 7>, <&edma_tptc2 0>;
+
+ /* Channel 20 and 21 is allocated for memcpy */
+ ti,edma-memcpy-channels = <20 21>;
+ /* The following PaRAM slots are reserved: 35-44 and 100-109 */
+ ti,edma-reserved-slot-ranges = <35 10>, <100 10>;
+ /* The following channels are reserved: 35-44 */
+ dma-channel-mask = <0xffffffff /* Channel 0-31 */
+ 0xffffe007>; /* Channel 32-63 */
+ };
diff --git a/Documentation/devicetree/bindings/dma/ti/ti,edma3-tptc.yaml b/Documentation/devicetree/bindings/dma/ti/ti,edma3-tptc.yaml
new file mode 100644
index 0000000000000..1d3a1af63c9b4
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/ti/ti,edma3-tptc.yaml
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/dma/ti/ti,edma3-tptc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Texas Instruments eDMA3 Transfer Controller
+
+description: |
+ The eDMA3 consists of two components, Channel controller (CC) and Transfer
+ Controller(s) (TC). The CC is the main entry for DMA users since it is
+ responsible for the DMA channel handling, while the TCs are responsible to
+ execute the actual DMA tansfer. This documents the Transfer Controller.
+
+maintainers:
+ - Andrew Davis <afd@ti.com>
+
+properties:
+ compatible:
+ oneOf:
+ - const: ti,edma3-tptc # OMAP, AM33xx, and AM43xx
+ - items:
+ - const: ti,k2g-edma3-tptc # 66AK2G
+ - const: ti,edma3-tptc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ description: Interrupt number for TCerrint
+ maxItems: 1
+
+ interrupt-names:
+ const: edma3_tcerrint
+
+ power-domains:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - ti,k2g-edma3-tptc
+then:
+ required:
+ - power-domains
+
+additionalProperties: false
+
+examples:
+ - |
+ tptc@49800000 {
+ compatible = "ti,k2g-edma3-tptc", "ti,edma3-tptc";
+ reg = <0x49800000 0x100000>;
+ interrupts = <112>;
+ interrupt-names = "edma3_tcerrint";
+ power-domains = <&k2g_pds 0xb>;
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 8999497011a26..9dfa6814681ff 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -21716,7 +21716,6 @@ M: Peter Ujfalusi <peter.ujfalusi@gmail.com>
L: dmaengine@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/dma/ti-dma-crossbar.txt
-F: Documentation/devicetree/bindings/dma/ti-edma.txt
F: Documentation/devicetree/bindings/dma/ti/
F: drivers/dma/ti/
F: include/linux/dma/k3-psil.h
--
2.39.2
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