[PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Ho-Ren (Jack) Chuang]

The memory tiering component in the kernel is functionally useless for
CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
are lumped together in the DRAM tier.
https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/

This patchset automatically resolves the issues. It delays the initialization
of memory tiers for CPUless NUMA nodes until they obtain HMAT information
at boot time, eliminating the need for user intervention.
If no HMAT specified, it falls back to using `default_dram_type`.

Example usecase:
We have CXL memory on the host, and we create VMs with a new system memory
device backed by host CXL memory. We inject CXL memory performance attributes
through QEMU, and the guest now sees memory nodes with performance attributes
in HMAT. With this change, we enable the guest kernel to construct
the correct memory tiering for the memory nodes.

Ho-Ren (Jack) Chuang (1):
  memory tier: acpi/hmat: create CPUless memory tiers after obtaining
    HMAT info

 drivers/acpi/numa/hmat.c     |  3 ++
 include/linux/memory-tiers.h |  6 +++
 mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
 3 files changed, 77 insertions(+), 8 deletions(-)

-- 
Hao Xiang and Ho-Ren (Jack) Chuang

[PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

[Ho-Ren (Jack) Chuang]

* Introduce `mt_init_with_hmat()`
We defer memory tier initialization for those CPUless NUMA nodes
until acquiring HMAT info. `mt_init_with_hmat()` is introduced to
post-create CPUless memory tiers after obtaining HMAT info.
It iterates through each CPUless memory node, creating memory tiers if
necessary. Finally, it calculates demotion tables again at the end.

* Introduce `hmat_find_alloc_memory_type()`
Find or allocate a memory type in the `hmat_memory_types` list.

* Make `set_node_memory_tier()` more generic
This function can also be used for setting other memory types for a node.
To do so, a new argument is added to specify a memory type.

* Handle cases where there is no HMAT when creating memory tiers
If no HMAT is specified, it falls back to using `default_dram_type`.

* Change adist calculation code to use another new lock, mt_perf_lock.
Iterating through CPUlist nodes requires holding the `memory_tier_lock`.
However, `mt_calc_adistance()` will end up trying to acquire the same lock,
leading to a potential deadlock. Therefore, we propose introducing a
standalone `mt_perf_lock` to protect `default_dram_perf`. This approach not
only avoids deadlock but also prevents holding a large lock simultaneously.

Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
Signed-off-by: Hao Xiang <hao.xiang@bytedance.com>
---
 drivers/acpi/numa/hmat.c     |  3 ++
 include/linux/memory-tiers.h |  6 +++
 mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
 3 files changed, 77 insertions(+), 8 deletions(-)

diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
index d6b85f0f6082..9f57338b3cb5 100644
--- a/drivers/acpi/numa/hmat.c
+++ b/drivers/acpi/numa/hmat.c
@@ -1038,6 +1038,9 @@ static __init int hmat_init(void)
 	if (!hmat_set_default_dram_perf())
 		register_mt_adistance_algorithm(&hmat_adist_nb);
 
+	/* Post-create CPUless memory tiers after getting HMAT info */
+	mt_init_with_hmat();
+
 	return 0;
 out_put:
 	hmat_free_structures();
diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
index 69e781900082..2f845e90c033 100644
--- a/include/linux/memory-tiers.h
+++ b/include/linux/memory-tiers.h
@@ -48,6 +48,7 @@ int mt_calc_adistance(int node, int *adist);
 int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
 			     const char *source);
 int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
+void mt_init_with_hmat(void);
 #ifdef CONFIG_MIGRATION
 int next_demotion_node(int node);
 void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
@@ -136,5 +137,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
 {
 	return -EIO;
 }
+
+static inline void mt_init_with_hmat(void)
+{
+
+}
 #endif	/* CONFIG_NUMA */
 #endif  /* _LINUX_MEMORY_TIERS_H */
diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
index 0537664620e5..7a0a579b3deb 100644
--- a/mm/memory-tiers.c
+++ b/mm/memory-tiers.c
@@ -35,7 +35,9 @@ struct node_memory_type_map {
 };
 
 static DEFINE_MUTEX(memory_tier_lock);
+static DEFINE_MUTEX(mt_perf_lock);
 static LIST_HEAD(memory_tiers);
+static LIST_HEAD(hmat_memory_types);
 static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
 struct memory_dev_type *default_dram_type;
 
@@ -502,7 +504,7 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
 	}
 }
 
-static struct memory_tier *set_node_memory_tier(int node)
+static struct memory_tier *set_node_memory_tier(int node, struct memory_dev_type *new_memtype)
 {
 	struct memory_tier *memtier;
 	struct memory_dev_type *memtype;
@@ -514,7 +516,7 @@ static struct memory_tier *set_node_memory_tier(int node)
 	if (!node_state(node, N_MEMORY))
 		return ERR_PTR(-EINVAL);
 
-	__init_node_memory_type(node, default_dram_type);
+	__init_node_memory_type(node, new_memtype);
 
 	memtype = node_memory_types[node].memtype;
 	node_set(node, memtype->nodes);
@@ -623,6 +625,56 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
 }
 EXPORT_SYMBOL_GPL(clear_node_memory_type);
 
+static struct memory_dev_type *hmat_find_alloc_memory_type(int adist)
+{
+	bool found = false;
+	struct memory_dev_type *mtype;
+
+	list_for_each_entry(mtype, &hmat_memory_types, list) {
+		if (mtype->adistance == adist) {
+			found = true;
+			break;
+		}
+	}
+	if (!found) {
+		mtype = alloc_memory_type(adist);
+		if (!IS_ERR(mtype))
+			list_add(&mtype->list, &hmat_memory_types);
+	}
+	return mtype;
+}
+
+static void mt_create_with_hmat(int node)
+{
+	struct memory_dev_type *mtype = NULL;
+	int adist = MEMTIER_ADISTANCE_DRAM;
+
+	mt_calc_adistance(node, &adist);
+	if (adist != MEMTIER_ADISTANCE_DRAM) {
+		mtype = hmat_find_alloc_memory_type(adist);
+		if (IS_ERR(mtype))
+			pr_err("%s() failed to allocate a tier\n", __func__);
+	} else {
+		mtype = default_dram_type;
+	}
+
+	set_node_memory_tier(node, mtype);
+}
+
+void mt_init_with_hmat(void)
+{
+	int nid;
+
+	mutex_lock(&memory_tier_lock);
+	for_each_node_state(nid, N_MEMORY)
+		if (!node_state(nid, N_CPU))
+			mt_create_with_hmat(nid);
+
+	establish_demotion_targets();
+	mutex_unlock(&memory_tier_lock);
+}
+EXPORT_SYMBOL_GPL(mt_init_with_hmat);
+
 static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
 {
 	pr_info(
@@ -636,7 +688,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
 {
 	int rc = 0;
 
-	mutex_lock(&memory_tier_lock);
+	mutex_lock(&mt_perf_lock);
 	if (default_dram_perf_error) {
 		rc = -EIO;
 		goto out;
@@ -684,7 +736,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
 	}
 
 out:
-	mutex_unlock(&memory_tier_lock);
+	mutex_unlock(&mt_perf_lock);
 	return rc;
 }
 
@@ -700,7 +752,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
 	    perf->read_bandwidth + perf->write_bandwidth == 0)
 		return -EINVAL;
 
-	mutex_lock(&memory_tier_lock);
+	mutex_lock(&mt_perf_lock);
 	/*
 	 * The abstract distance of a memory node is in direct proportion to
 	 * its memory latency (read + write) and inversely proportional to its
@@ -713,7 +765,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
 		(default_dram_perf.read_latency + default_dram_perf.write_latency) *
 		(default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
 		(perf->read_bandwidth + perf->write_bandwidth);
-	mutex_unlock(&memory_tier_lock);
+	mutex_unlock(&mt_perf_lock);
 
 	return 0;
 }
@@ -797,7 +849,7 @@ static int __meminit memtier_hotplug_callback(struct notifier_block *self,
 		break;
 	case MEM_ONLINE:
 		mutex_lock(&memory_tier_lock);
-		memtier = set_node_memory_tier(arg->status_change_nid);
+		memtier = set_node_memory_tier(arg->status_change_nid, default_dram_type);
 		if (!IS_ERR(memtier))
 			establish_demotion_targets();
 		mutex_unlock(&memory_tier_lock);
@@ -836,7 +888,15 @@ static int __init memory_tier_init(void)
 	 * types assigned.
 	 */
 	for_each_node_state(node, N_MEMORY) {
-		memtier = set_node_memory_tier(node);
+		if (!node_state(node, N_CPU))
+			/*
+			 * Defer memory tier initialization on CPUless numa nodes.
+			 * These will be initialized when HMAT information is
+			 * available.
+			 */
+			continue;
+
+		memtier = set_node_memory_tier(node, default_dram_type);
 		if (IS_ERR(memtier))
 			/*
 			 * Continue with memtiers we are able to setup
-- 
Hao Xiang and Ho-Ren (Jack) Chuang

Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

[Huang, Ying]

Hi, Jack,

"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:

> * Introduce `mt_init_with_hmat()`
> We defer memory tier initialization for those CPUless NUMA nodes
> until acquiring HMAT info. `mt_init_with_hmat()` is introduced to
> post-create CPUless memory tiers after obtaining HMAT info.
> It iterates through each CPUless memory node, creating memory tiers if
> necessary. Finally, it calculates demotion tables again at the end.
>
> * Introduce `hmat_find_alloc_memory_type()`
> Find or allocate a memory type in the `hmat_memory_types` list.
>
> * Make `set_node_memory_tier()` more generic
> This function can also be used for setting other memory types for a node.
> To do so, a new argument is added to specify a memory type.
>
> * Handle cases where there is no HMAT when creating memory tiers
> If no HMAT is specified, it falls back to using `default_dram_type`.
>
> * Change adist calculation code to use another new lock, mt_perf_lock.
> Iterating through CPUlist nodes requires holding the `memory_tier_lock`.
> However, `mt_calc_adistance()` will end up trying to acquire the same lock,
> leading to a potential deadlock. Therefore, we propose introducing a
> standalone `mt_perf_lock` to protect `default_dram_perf`. This approach not
> only avoids deadlock but also prevents holding a large lock simultaneously.

The patch description is used to described why we need the change, and
how we do that, but not what we do.  People can tell what is done from
the code itself.

> Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
> Signed-off-by: Hao Xiang <hao.xiang@bytedance.com>
> ---
>  drivers/acpi/numa/hmat.c     |  3 ++
>  include/linux/memory-tiers.h |  6 +++
>  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
>  3 files changed, 77 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> index d6b85f0f6082..9f57338b3cb5 100644
> --- a/drivers/acpi/numa/hmat.c
> +++ b/drivers/acpi/numa/hmat.c
> @@ -1038,6 +1038,9 @@ static __init int hmat_init(void)
>  	if (!hmat_set_default_dram_perf())
>  		register_mt_adistance_algorithm(&hmat_adist_nb);
>  
> +	/* Post-create CPUless memory tiers after getting HMAT info */
> +	mt_init_with_hmat();
> +
>  	return 0;
>  out_put:
>  	hmat_free_structures();
> diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
> index 69e781900082..2f845e90c033 100644
> --- a/include/linux/memory-tiers.h
> +++ b/include/linux/memory-tiers.h
> @@ -48,6 +48,7 @@ int mt_calc_adistance(int node, int *adist);
>  int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>  			     const char *source);
>  int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
> +void mt_init_with_hmat(void);

HMAT isn't universally available.  It's a driver in fact.  So, don't put
driver specific code in general code.

>  #ifdef CONFIG_MIGRATION
>  int next_demotion_node(int node);
>  void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
> @@ -136,5 +137,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
>  {
>  	return -EIO;
>  }
> +
> +static inline void mt_init_with_hmat(void)
> +{
> +
> +}
>  #endif	/* CONFIG_NUMA */
>  #endif  /* _LINUX_MEMORY_TIERS_H */
> diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
> index 0537664620e5..7a0a579b3deb 100644
> --- a/mm/memory-tiers.c
> +++ b/mm/memory-tiers.c
> @@ -35,7 +35,9 @@ struct node_memory_type_map {
>  };
>  
>  static DEFINE_MUTEX(memory_tier_lock);
> +static DEFINE_MUTEX(mt_perf_lock);
>  static LIST_HEAD(memory_tiers);
> +static LIST_HEAD(hmat_memory_types);
>  static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
>  struct memory_dev_type *default_dram_type;
>  
> @@ -502,7 +504,7 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
>  	}
>  }
>  
> -static struct memory_tier *set_node_memory_tier(int node)
> +static struct memory_tier *set_node_memory_tier(int node, struct memory_dev_type *new_memtype)

No. memory_dev_type are passed to the function via node_memory_types[node].memtype.

>  {
>  	struct memory_tier *memtier;
>  	struct memory_dev_type *memtype;
> @@ -514,7 +516,7 @@ static struct memory_tier *set_node_memory_tier(int node)
>  	if (!node_state(node, N_MEMORY))
>  		return ERR_PTR(-EINVAL);
>  
> -	__init_node_memory_type(node, default_dram_type);
> +	__init_node_memory_type(node, new_memtype);
>  
>  	memtype = node_memory_types[node].memtype;
>  	node_set(node, memtype->nodes);
> @@ -623,6 +625,56 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
>  }
>  EXPORT_SYMBOL_GPL(clear_node_memory_type);
>  
> +static struct memory_dev_type *hmat_find_alloc_memory_type(int adist)

Similar function existed in drivers/dax/kmem.c.  Please abstract them
and move them here.

> +{
> +	bool found = false;
> +	struct memory_dev_type *mtype;
> +
> +	list_for_each_entry(mtype, &hmat_memory_types, list) {
> +		if (mtype->adistance == adist) {
> +			found = true;
> +			break;
> +		}
> +	}
> +	if (!found) {
> +		mtype = alloc_memory_type(adist);
> +		if (!IS_ERR(mtype))
> +			list_add(&mtype->list, &hmat_memory_types);
> +	}
> +	return mtype;
> +}
> +
> +static void mt_create_with_hmat(int node)
> +{
> +	struct memory_dev_type *mtype = NULL;
> +	int adist = MEMTIER_ADISTANCE_DRAM;
> +
> +	mt_calc_adistance(node, &adist);
> +	if (adist != MEMTIER_ADISTANCE_DRAM) {
> +		mtype = hmat_find_alloc_memory_type(adist);
> +		if (IS_ERR(mtype))
> +			pr_err("%s() failed to allocate a tier\n", __func__);
> +	} else {
> +		mtype = default_dram_type;
> +	}
> +
> +	set_node_memory_tier(node, mtype);
> +}
> +
> +void mt_init_with_hmat(void)
> +{
> +	int nid;
> +
> +	mutex_lock(&memory_tier_lock);
> +	for_each_node_state(nid, N_MEMORY)
> +		if (!node_state(nid, N_CPU))
> +			mt_create_with_hmat(nid);
> +
> +	establish_demotion_targets();
> +	mutex_unlock(&memory_tier_lock);
> +}
> +EXPORT_SYMBOL_GPL(mt_init_with_hmat);
> +

I guess that we can put most hmat related code above in hmat.c.

>  static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
>  {
>  	pr_info(
> @@ -636,7 +688,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>  {
>  	int rc = 0;
>  
> -	mutex_lock(&memory_tier_lock);
> +	mutex_lock(&mt_perf_lock);
>  	if (default_dram_perf_error) {
>  		rc = -EIO;
>  		goto out;
> @@ -684,7 +736,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>  	}
>  
>  out:
> -	mutex_unlock(&memory_tier_lock);
> +	mutex_unlock(&mt_perf_lock);
>  	return rc;
>  }
>  
> @@ -700,7 +752,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
>  	    perf->read_bandwidth + perf->write_bandwidth == 0)
>  		return -EINVAL;
>  
> -	mutex_lock(&memory_tier_lock);
> +	mutex_lock(&mt_perf_lock);
>  	/*
>  	 * The abstract distance of a memory node is in direct proportion to
>  	 * its memory latency (read + write) and inversely proportional to its
> @@ -713,7 +765,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
>  		(default_dram_perf.read_latency + default_dram_perf.write_latency) *
>  		(default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
>  		(perf->read_bandwidth + perf->write_bandwidth);
> -	mutex_unlock(&memory_tier_lock);
> +	mutex_unlock(&mt_perf_lock);
>  
>  	return 0;
>  }
> @@ -797,7 +849,7 @@ static int __meminit memtier_hotplug_callback(struct notifier_block *self,
>  		break;
>  	case MEM_ONLINE:
>  		mutex_lock(&memory_tier_lock);
> -		memtier = set_node_memory_tier(arg->status_change_nid);
> +		memtier = set_node_memory_tier(arg->status_change_nid, default_dram_type);
>  		if (!IS_ERR(memtier))
>  			establish_demotion_targets();
>  		mutex_unlock(&memory_tier_lock);
> @@ -836,7 +888,15 @@ static int __init memory_tier_init(void)
>  	 * types assigned.
>  	 */
>  	for_each_node_state(node, N_MEMORY) {
> -		memtier = set_node_memory_tier(node);
> +		if (!node_state(node, N_CPU))
> +			/*
> +			 * Defer memory tier initialization on CPUless numa nodes.
> +			 * These will be initialized when HMAT information is
> +			 * available.
> +			 */
> +			continue;
> +
> +		memtier = set_node_memory_tier(node, default_dram_type);

On system with HMAT, how to fall back CPU-less node to
default_dram_type?  I found your description, but I don't find it in code.

>  		if (IS_ERR(memtier))
>  			/*
>  			 * Continue with memtiers we are able to setup

--
Best Regards,
Huang, Ying

Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Huang, Ying]

"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:

> The memory tiering component in the kernel is functionally useless for
> CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> are lumped together in the DRAM tier.
> https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/

I think that it's unfair to call it "useless".  Yes, it doesn't work if
the CXL memory device are not enumerate via drivers/dax/kmem.c.  So,
please be specific about in which cases it doesn't work instead of too
general "useless".

> This patchset automatically resolves the issues. It delays the initialization
> of memory tiers for CPUless NUMA nodes until they obtain HMAT information
> at boot time, eliminating the need for user intervention.
> If no HMAT specified, it falls back to using `default_dram_type`.
>
> Example usecase:
> We have CXL memory on the host, and we create VMs with a new system memory
> device backed by host CXL memory. We inject CXL memory performance attributes
> through QEMU, and the guest now sees memory nodes with performance attributes
> in HMAT. With this change, we enable the guest kernel to construct
> the correct memory tiering for the memory nodes.
>
> Ho-Ren (Jack) Chuang (1):
>   memory tier: acpi/hmat: create CPUless memory tiers after obtaining
>     HMAT info
>
>  drivers/acpi/numa/hmat.c     |  3 ++
>  include/linux/memory-tiers.h |  6 +++
>  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
>  3 files changed, 77 insertions(+), 8 deletions(-)

--
Best Regards,
Huang, Ying

Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[fan]

On Fri, Mar 01, 2024 at 08:22:44AM +0000, Ho-Ren (Jack) Chuang wrote:
> The memory tiering component in the kernel is functionally useless for
> CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> are lumped together in the DRAM tier.
> https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/

Is this the right patchset you want to refer to? It is about node
migration between tiers, how is it related to the context here?

Fan

> 
> This patchset automatically resolves the issues. It delays the initialization
> of memory tiers for CPUless NUMA nodes until they obtain HMAT information
> at boot time, eliminating the need for user intervention.
> If no HMAT specified, it falls back to using `default_dram_type`.
> 
> Example usecase:
> We have CXL memory on the host, and we create VMs with a new system memory
> device backed by host CXL memory. We inject CXL memory performance attributes
> through QEMU, and the guest now sees memory nodes with performance attributes
> in HMAT. With this change, we enable the guest kernel to construct
> the correct memory tiering for the memory nodes.
> 
> Ho-Ren (Jack) Chuang (1):
>   memory tier: acpi/hmat: create CPUless memory tiers after obtaining
>     HMAT info
> 
>  drivers/acpi/numa/hmat.c     |  3 ++
>  include/linux/memory-tiers.h |  6 +++
>  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
>  3 files changed, 77 insertions(+), 8 deletions(-)
> 
> -- 
> Hao Xiang and Ho-Ren (Jack) Chuang
> 

RE: [EXT] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Srinivasulu Opensrc]

> -----Original Message-----
> From: fan <nifan.cxl@gmail.com>
> Sent: Monday, March 4, 2024 8:38 AM
> To: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
> Cc: Hao Xiang <hao.xiang@bytedance.com>; Gregory Price
> <gourry.memverge@gmail.com>; aneesh.kumar@linux.ibm.com;
> mhocko@suse.com; tj@kernel.org; john@jagalactic.com; Eishan Mirakhur
> <emirakhur@micron.com>; Vinicius Tavares Petrucci
> <vtavarespetr@micron.com>; Ravis OpenSrc <Ravis.OpenSrc@micron.com>;
> Alistair Popple <apopple@nvidia.com>; Rafael J. Wysocki
> <rafael@kernel.org>; Len Brown <lenb@kernel.org>; Andrew Morton
> <akpm@linux-foundation.org>; Dave Jiang <dave.jiang@intel.com>; Dan
> Williams <dan.j.williams@intel.com>; Jonathan Cameron
> <Jonathan.Cameron@huawei.com>; Huang Ying <ying.huang@intel.com>;
> linux-acpi@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> mm@kvack.org; Ho-Ren (Jack) Chuang <horenc@vt.edu>; Ho-Ren (Jack)
> Chuang <horenchuang@gmail.com>; linux-cxl@vger.kernel.org; qemu-
> devel@nongnu.org
> Subject: [EXT] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless
> NUMA Nodes
> 
> CAUTION: EXTERNAL EMAIL. Do not click links or open attachments unless
> you recognize the sender and were expecting this message.
> 
> 
> On Fri, Mar 01, 2024 at 08:22:44AM +0000, Ho-Ren (Jack) Chuang wrote:
> > The memory tiering component in the kernel is functionally useless for
> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the
> nodes
> > are lumped together in the DRAM tier.
> >
> https://lore.k/
> ernel.org%2Flinux-
> mm%2FPH0PR08MB7955E9F08CCB64F23963B5C3A860A%40PH0PR08MB7955
> .namprd08.prod.outlook.com%2FT%2F&data=05%7C02%7Csthanneeru.open
> src%40micron.com%7Cc4f03409bf454cca29d008dc3bf853d0%7Cf38a5ecd281
> 34862b11bac1d563c806f%7C0%7C0%7C638451185012848960%7CUnknown
> %7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW
> wiLCJXVCI6Mn0%3D%7C0%7C%7C%7C&sdata=syvhw1w8%2BoC6ss4%2Bu2X
> HjBuyrpwFK1hIefopgVbRy7g%3D&reserved=0
> 
Referring to the following use case from above patch?

--
1. Useful to move cxl nodes to the right tiers from userspace, when
   the hardware fails to assign the tiers correctly based on
   memorytypes.

   On some platforms we have observed cxl memory being assigned to
   the same tier as DDR memory. This is arguably a system firmware
   bug, but it is true that tiers represent *ranges* of performance.
   and we believe it's important for the system operator to have
   the ability to override bad firmware or OS decisions about tier
   assignment as a fail-safe against potential bad outcomes.
--

> Is this the right patchset you want to refer to? It is about node
> migration between tiers, how is it related to the context here?
> 
> Fan
> 
> >
> > This patchset automatically resolves the issues. It delays the initialization
> > of memory tiers for CPUless NUMA nodes until they obtain HMAT
> information
> > at boot time, eliminating the need for user intervention.
> > If no HMAT specified, it falls back to using `default_dram_type`.
> >
> > Example usecase:
> > We have CXL memory on the host, and we create VMs with a new system
> memory
> > device backed by host CXL memory. We inject CXL memory performance
> attributes
> > through QEMU, and the guest now sees memory nodes with performance
> attributes
> > in HMAT. With this change, we enable the guest kernel to construct
> > the correct memory tiering for the memory nodes.
> >
> > Ho-Ren (Jack) Chuang (1):
> >   memory tier: acpi/hmat: create CPUless memory tiers after obtaining
> >     HMAT info
> >
> >  drivers/acpi/numa/hmat.c     |  3 ++
> >  include/linux/memory-tiers.h |  6 +++
> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
> >  3 files changed, 77 insertions(+), 8 deletions(-)
> >
> > --
> > Hao Xiang and Ho-Ren (Jack) Chuang
> >

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Ho-Ren (Jack) Chuang]

On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying <ying.huang@intel.com> wrote:
>
> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>
> > The memory tiering component in the kernel is functionally useless for
> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> > are lumped together in the DRAM tier.
> > https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/
>
> I think that it's unfair to call it "useless".  Yes, it doesn't work if
> the CXL memory device are not enumerate via drivers/dax/kmem.c.  So,
> please be specific about in which cases it doesn't work instead of too
> general "useless".
>

Thank you and I didn't mean anything specific. I simply reused phrases
we discussed
earlier in the previous patchset. I will change them to the following in v2:
"At boot time, current memory tiering assigns all detected memory nodes
to the same DRAM tier. This results in CPUless memory/non-DRAM devices,
such as CXL1.1 type3 memory, being unable to be assigned to the
correct memory tier,
leading to the inability to migrate pages between different types of memory."

Please see if this looks more specific.

> > This patchset automatically resolves the issues. It delays the initialization
> > of memory tiers for CPUless NUMA nodes until they obtain HMAT information
> > at boot time, eliminating the need for user intervention.
> > If no HMAT specified, it falls back to using `default_dram_type`.
> >
> > Example usecase:
> > We have CXL memory on the host, and we create VMs with a new system memory
> > device backed by host CXL memory. We inject CXL memory performance attributes
> > through QEMU, and the guest now sees memory nodes with performance attributes
> > in HMAT. With this change, we enable the guest kernel to construct
> > the correct memory tiering for the memory nodes.
> >
> > Ho-Ren (Jack) Chuang (1):
> >   memory tier: acpi/hmat: create CPUless memory tiers after obtaining
> >     HMAT info
> >
> >  drivers/acpi/numa/hmat.c     |  3 ++
> >  include/linux/memory-tiers.h |  6 +++
> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
> >  3 files changed, 77 insertions(+), 8 deletions(-)
>
> --
> Best Regards,
> Huang, Ying

-- 
---
Best regards,
Ho-Ren (Jack) Chuang
莊賀任

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Huang, Ying]

"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:

> On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying <ying.huang@intel.com> wrote:
>>
>> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>>
>> > The memory tiering component in the kernel is functionally useless for
>> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
>> > are lumped together in the DRAM tier.
>> > https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/
>>
>> I think that it's unfair to call it "useless".  Yes, it doesn't work if
>> the CXL memory device are not enumerate via drivers/dax/kmem.c.  So,
>> please be specific about in which cases it doesn't work instead of too
>> general "useless".
>>
>
> Thank you and I didn't mean anything specific. I simply reused phrases
> we discussed
> earlier in the previous patchset. I will change them to the following in v2:
> "At boot time, current memory tiering assigns all detected memory nodes
> to the same DRAM tier. This results in CPUless memory/non-DRAM devices,
> such as CXL1.1 type3 memory, being unable to be assigned to the
> correct memory tier,
> leading to the inability to migrate pages between different types of memory."
>
> Please see if this looks more specific.

I don't think that the description above is accurate.  In fact, there
are 2 ways to enumerate the memory device,

1. Mark it as reserved memory (E820_TYPE_SOFT_RESERVED, etc.) in E820
   table or something similar.

2. Mark it as normal memory (E820_TYPE_RAM) in E820 table or something
   similar

For 1, the memory device (including CXL memory) is onlined via
drivers/dax/kmem.c, so will be put in proper memory tiers.  For 2, the
memory device is indistinguishable with normal DRAM with current
implementation.  And this is what this patch is working on.

Right?

--
Best Regards,
Huang, Ying

>> > This patchset automatically resolves the issues. It delays the initialization
>> > of memory tiers for CPUless NUMA nodes until they obtain HMAT information
>> > at boot time, eliminating the need for user intervention.
>> > If no HMAT specified, it falls back to using `default_dram_type`.
>> >
>> > Example usecase:
>> > We have CXL memory on the host, and we create VMs with a new system memory
>> > device backed by host CXL memory. We inject CXL memory performance attributes
>> > through QEMU, and the guest now sees memory nodes with performance attributes
>> > in HMAT. With this change, we enable the guest kernel to construct
>> > the correct memory tiering for the memory nodes.
>> >
>> > Ho-Ren (Jack) Chuang (1):
>> >   memory tier: acpi/hmat: create CPUless memory tiers after obtaining
>> >     HMAT info
>> >
>> >  drivers/acpi/numa/hmat.c     |  3 ++
>> >  include/linux/memory-tiers.h |  6 +++
>> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
>> >  3 files changed, 77 insertions(+), 8 deletions(-)
>>
>> --
>> Best Regards,
>> Huang, Ying

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Ho-Ren (Jack) Chuang]

On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying <ying.huang@intel.com> wrote:
>
> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>
> > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying <ying.huang@intel.com> wrote:
> >>
> >> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
> >>
> >> > The memory tiering component in the kernel is functionally useless for
> >> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
> >> > are lumped together in the DRAM tier.
> >> > https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/
> >>
> >> I think that it's unfair to call it "useless".  Yes, it doesn't work if
> >> the CXL memory device are not enumerate via drivers/dax/kmem.c.  So,
> >> please be specific about in which cases it doesn't work instead of too
> >> general "useless".
> >>
> >
> > Thank you and I didn't mean anything specific. I simply reused phrases
> > we discussed
> > earlier in the previous patchset. I will change them to the following in v2:
> > "At boot time, current memory tiering assigns all detected memory nodes
> > to the same DRAM tier. This results in CPUless memory/non-DRAM devices,
> > such as CXL1.1 type3 memory, being unable to be assigned to the
> > correct memory tier,
> > leading to the inability to migrate pages between different types of memory."
> >
> > Please see if this looks more specific.
>
> I don't think that the description above is accurate.  In fact, there
> are 2 ways to enumerate the memory device,
>
> 1. Mark it as reserved memory (E820_TYPE_SOFT_RESERVED, etc.) in E820
>    table or something similar.
>
> 2. Mark it as normal memory (E820_TYPE_RAM) in E820 table or something
>    similar
>
> For 1, the memory device (including CXL memory) is onlined via
> drivers/dax/kmem.c, so will be put in proper memory tiers.  For 2, the
> memory device is indistinguishable with normal DRAM with current
> implementation.  And this is what this patch is working on.
>
> Right?

Good point! How about this?:
"
When a memory device, such as CXL1.1 type3 memory, is emulated as
normal memory (E820_TYPE_RAM), the memory device is indistinguishable
from normal DRAM in terms of memory tiering with the current implementation.
The current memory tiering assigns all detected normal memory nodes
to the same DRAM tier. This results in normal memory devices with
different attributions being unable to be assigned to the correct memory tier,
leading to the inability to migrate pages between different types of memory.
"

--
Best regards,
Ho-Ren (Jack) Chuang
莊賀任

Re: [External] Re: [PATCH v1 0/1] Improved Memory Tier Creation for CPUless NUMA Nodes

[Huang, Ying]

"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:

> On Mon, Mar 4, 2024 at 10:36 PM Huang, Ying <ying.huang@intel.com> wrote:
>>
>> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>>
>> > On Sun, Mar 3, 2024 at 6:47 PM Huang, Ying <ying.huang@intel.com> wrote:
>> >>
>> >> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>> >>
>> >> > The memory tiering component in the kernel is functionally useless for
>> >> > CPUless memory/non-DRAM devices like CXL1.1 type3 memory because the nodes
>> >> > are lumped together in the DRAM tier.
>> >> > https://lore.kernel.org/linux-mm/PH0PR08MB7955E9F08CCB64F23963B5C3A860A@PH0PR08MB7955.namprd08.prod.outlook.com/T/
>> >>
>> >> I think that it's unfair to call it "useless".  Yes, it doesn't work if
>> >> the CXL memory device are not enumerate via drivers/dax/kmem.c.  So,
>> >> please be specific about in which cases it doesn't work instead of too
>> >> general "useless".
>> >>
>> >
>> > Thank you and I didn't mean anything specific. I simply reused phrases
>> > we discussed
>> > earlier in the previous patchset. I will change them to the following in v2:
>> > "At boot time, current memory tiering assigns all detected memory nodes
>> > to the same DRAM tier. This results in CPUless memory/non-DRAM devices,
>> > such as CXL1.1 type3 memory, being unable to be assigned to the
>> > correct memory tier,
>> > leading to the inability to migrate pages between different types of memory."
>> >
>> > Please see if this looks more specific.
>>
>> I don't think that the description above is accurate.  In fact, there
>> are 2 ways to enumerate the memory device,
>>
>> 1. Mark it as reserved memory (E820_TYPE_SOFT_RESERVED, etc.) in E820
>>    table or something similar.
>>
>> 2. Mark it as normal memory (E820_TYPE_RAM) in E820 table or something
>>    similar
>>
>> For 1, the memory device (including CXL memory) is onlined via
>> drivers/dax/kmem.c, so will be put in proper memory tiers.  For 2, the
>> memory device is indistinguishable with normal DRAM with current
>> implementation.  And this is what this patch is working on.
>>
>> Right?
>
> Good point! How about this?:
> "
> When a memory device, such as CXL1.1 type3 memory, is emulated as
> normal memory (E820_TYPE_RAM), the memory device is indistinguishable
> from normal DRAM in terms of memory tiering with the current implementation.
> The current memory tiering assigns all detected normal memory nodes
> to the same DRAM tier. This results in normal memory devices with
> different attributions being unable to be assigned to the correct memory tier,
> leading to the inability to migrate pages between different types of memory.
> "

Looks good me!  Thanks!

--
Best Regards,
Huang, Ying

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

[Ho-Ren (Jack) Chuang]

On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying <ying.huang@intel.com> wrote:
>
> Hi, Jack,
>
> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>
> > * Introduce `mt_init_with_hmat()`
> > We defer memory tier initialization for those CPUless NUMA nodes
> > until acquiring HMAT info. `mt_init_with_hmat()` is introduced to
> > post-create CPUless memory tiers after obtaining HMAT info.
> > It iterates through each CPUless memory node, creating memory tiers if
> > necessary. Finally, it calculates demotion tables again at the end.
> >
> > * Introduce `hmat_find_alloc_memory_type()`
> > Find or allocate a memory type in the `hmat_memory_types` list.
> >
> > * Make `set_node_memory_tier()` more generic
> > This function can also be used for setting other memory types for a node.
> > To do so, a new argument is added to specify a memory type.
> >
> > * Handle cases where there is no HMAT when creating memory tiers
> > If no HMAT is specified, it falls back to using `default_dram_type`.
> >
> > * Change adist calculation code to use another new lock, mt_perf_lock.
> > Iterating through CPUlist nodes requires holding the `memory_tier_lock`.
> > However, `mt_calc_adistance()` will end up trying to acquire the same lock,
> > leading to a potential deadlock. Therefore, we propose introducing a
> > standalone `mt_perf_lock` to protect `default_dram_perf`. This approach not
> > only avoids deadlock but also prevents holding a large lock simultaneously.
>
> The patch description is used to described why we need the change, and
> how we do that, but not what we do.  People can tell what is done from
> the code itself.
>

Got it. Thanks. Will rewrite it after the code is finalized.

> > Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
> > Signed-off-by: Hao Xiang <hao.xiang@bytedance.com>
> > ---
> >  drivers/acpi/numa/hmat.c     |  3 ++
> >  include/linux/memory-tiers.h |  6 +++
> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
> >  3 files changed, 77 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> > index d6b85f0f6082..9f57338b3cb5 100644
> > --- a/drivers/acpi/numa/hmat.c
> > +++ b/drivers/acpi/numa/hmat.c
> > @@ -1038,6 +1038,9 @@ static __init int hmat_init(void)
> >       if (!hmat_set_default_dram_perf())
> >               register_mt_adistance_algorithm(&hmat_adist_nb);
> >
> > +     /* Post-create CPUless memory tiers after getting HMAT info */
> > +     mt_init_with_hmat();
> > +
> >       return 0;
> >  out_put:
> >       hmat_free_structures();
> > diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
> > index 69e781900082..2f845e90c033 100644
> > --- a/include/linux/memory-tiers.h
> > +++ b/include/linux/memory-tiers.h
> > @@ -48,6 +48,7 @@ int mt_calc_adistance(int node, int *adist);
> >  int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >                            const char *source);
> >  int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
> > +void mt_init_with_hmat(void);
>
> HMAT isn't universally available.  It's a driver in fact.  So, don't put
> driver specific code in general code.
>

Please see below regarding "move code to hmat.c"

> >  #ifdef CONFIG_MIGRATION
> >  int next_demotion_node(int node);
> >  void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
> > @@ -136,5 +137,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
> >  {
> >       return -EIO;
> >  }
> > +
> > +static inline void mt_init_with_hmat(void)
> > +{
> > +
> > +}
> >  #endif       /* CONFIG_NUMA */
> >  #endif  /* _LINUX_MEMORY_TIERS_H */
> > diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
> > index 0537664620e5..7a0a579b3deb 100644
> > --- a/mm/memory-tiers.c
> > +++ b/mm/memory-tiers.c
> > @@ -35,7 +35,9 @@ struct node_memory_type_map {
> >  };
> >
> >  static DEFINE_MUTEX(memory_tier_lock);
> > +static DEFINE_MUTEX(mt_perf_lock);
> >  static LIST_HEAD(memory_tiers);
> > +static LIST_HEAD(hmat_memory_types);
> >  static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
> >  struct memory_dev_type *default_dram_type;
> >
> > @@ -502,7 +504,7 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
> >       }
> >  }
> >
> > -static struct memory_tier *set_node_memory_tier(int node)
> > +static struct memory_tier *set_node_memory_tier(int node, struct memory_dev_type *new_memtype)
>
> No. memory_dev_type are passed to the function via node_memory_types[node].memtype.
>

Got it. Will mimic the way kmem.c does. Thanks.

> >  {
> >       struct memory_tier *memtier;
> >       struct memory_dev_type *memtype;
> > @@ -514,7 +516,7 @@ static struct memory_tier *set_node_memory_tier(int node)
> >       if (!node_state(node, N_MEMORY))
> >               return ERR_PTR(-EINVAL);
> >
> > -     __init_node_memory_type(node, default_dram_type);
> > +     __init_node_memory_type(node, new_memtype);
> >
> >       memtype = node_memory_types[node].memtype;
> >       node_set(node, memtype->nodes);
> > @@ -623,6 +625,56 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
> >  }
> >  EXPORT_SYMBOL_GPL(clear_node_memory_type);
> >
> > +static struct memory_dev_type *hmat_find_alloc_memory_type(int adist)
>
> Similar function existed in drivers/dax/kmem.c.  Please abstract them
> and move them here.
>

Got it. Will try. Thanks.

> > +{
> > +     bool found = false;
> > +     struct memory_dev_type *mtype;
> > +
> > +     list_for_each_entry(mtype, &hmat_memory_types, list) {
> > +             if (mtype->adistance == adist) {
> > +                     found = true;
> > +                     break;
> > +             }
> > +     }
> > +     if (!found) {
> > +             mtype = alloc_memory_type(adist);
> > +             if (!IS_ERR(mtype))
> > +                     list_add(&mtype->list, &hmat_memory_types);
> > +     }
> > +     return mtype;
> > +}
> > +
> > +static void mt_create_with_hmat(int node)
> > +{
> > +     struct memory_dev_type *mtype = NULL;
> > +     int adist = MEMTIER_ADISTANCE_DRAM;
> > +
> > +     mt_calc_adistance(node, &adist);
> > +     if (adist != MEMTIER_ADISTANCE_DRAM) {
> > +             mtype = hmat_find_alloc_memory_type(adist);
> > +             if (IS_ERR(mtype))
> > +                     pr_err("%s() failed to allocate a tier\n", __func__);
> > +     } else {
> > +             mtype = default_dram_type;
> > +     }
> > +
> > +     set_node_memory_tier(node, mtype);
> > +}
> > +
> > +void mt_init_with_hmat(void)
> > +{
> > +     int nid;
> > +
> > +     mutex_lock(&memory_tier_lock);
> > +     for_each_node_state(nid, N_MEMORY)
> > +             if (!node_state(nid, N_CPU))
> > +                     mt_create_with_hmat(nid);
> > +
> > +     establish_demotion_targets();
> > +     mutex_unlock(&memory_tier_lock);
> > +}
> > +EXPORT_SYMBOL_GPL(mt_init_with_hmat);
> > +
>
> I guess that we can put most hmat related code above in hmat.c.
>

To put the heat-related code to hmat.c I will need to export some
static functions in memory-tiers.c, like set_node_memory_tier() and
establish_demotion_targets(). Is that ok?

> >  static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
> >  {
> >       pr_info(
> > @@ -636,7 +688,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >  {
> >       int rc = 0;
> >
> > -     mutex_lock(&memory_tier_lock);
> > +     mutex_lock(&mt_perf_lock);
> >       if (default_dram_perf_error) {
> >               rc = -EIO;
> >               goto out;
> > @@ -684,7 +736,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >       }
> >
> >  out:
> > -     mutex_unlock(&memory_tier_lock);
> > +     mutex_unlock(&mt_perf_lock);
> >       return rc;
> >  }
> >
> > @@ -700,7 +752,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
> >           perf->read_bandwidth + perf->write_bandwidth == 0)
> >               return -EINVAL;
> >
> > -     mutex_lock(&memory_tier_lock);
> > +     mutex_lock(&mt_perf_lock);
> >       /*
> >        * The abstract distance of a memory node is in direct proportion to
> >        * its memory latency (read + write) and inversely proportional to its
> > @@ -713,7 +765,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
> >               (default_dram_perf.read_latency + default_dram_perf.write_latency) *
> >               (default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
> >               (perf->read_bandwidth + perf->write_bandwidth);
> > -     mutex_unlock(&memory_tier_lock);
> > +     mutex_unlock(&mt_perf_lock);
> >
> >       return 0;
> >  }
> > @@ -797,7 +849,7 @@ static int __meminit memtier_hotplug_callback(struct notifier_block *self,
> >               break;
> >       case MEM_ONLINE:
> >               mutex_lock(&memory_tier_lock);
> > -             memtier = set_node_memory_tier(arg->status_change_nid);
> > +             memtier = set_node_memory_tier(arg->status_change_nid, default_dram_type);
> >               if (!IS_ERR(memtier))
> >                       establish_demotion_targets();
> >               mutex_unlock(&memory_tier_lock);
> > @@ -836,7 +888,15 @@ static int __init memory_tier_init(void)
> >        * types assigned.
> >        */
> >       for_each_node_state(node, N_MEMORY) {
> > -             memtier = set_node_memory_tier(node);
> > +             if (!node_state(node, N_CPU))
> > +                     /*
> > +                      * Defer memory tier initialization on CPUless numa nodes.
> > +                      * These will be initialized when HMAT information is
> > +                      * available.
> > +                      */
> > +                     continue;
> > +
> > +             memtier = set_node_memory_tier(node, default_dram_type);
>
> On system with HMAT, how to fall back CPU-less node to
> default_dram_type?  I found your description, but I don't find it in code.
>

I assume you meant without HMAT, if so,
because if no HMAT, adist will not be updated in mt_calc_adistance():
+ int adist = MEMTIER_ADISTANCE_DRAM;
+
+ mt_calc_adistance(node, &adist);
+ if (adist != MEMTIER_ADISTANCE_DRAM) {
…
+ } else {
+ mtype = default_dram_type;
+ }
+
+ set_node_memory_tier(node, mtype);

> >               if (IS_ERR(memtier))
> >                       /*
> >                        * Continue with memtiers we are able to setup
>
> --
> Best Regards,
> Huang, Ying
-- 
Best regards,
Ho-Ren (Jack) Chuang
莊賀任

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

[Huang, Ying]

"Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:

> On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying <ying.huang@intel.com> wrote:
>>
>> Hi, Jack,
>>
>> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>>
>> > * Introduce `mt_init_with_hmat()`
>> > We defer memory tier initialization for those CPUless NUMA nodes
>> > until acquiring HMAT info. `mt_init_with_hmat()` is introduced to
>> > post-create CPUless memory tiers after obtaining HMAT info.
>> > It iterates through each CPUless memory node, creating memory tiers if
>> > necessary. Finally, it calculates demotion tables again at the end.
>> >
>> > * Introduce `hmat_find_alloc_memory_type()`
>> > Find or allocate a memory type in the `hmat_memory_types` list.
>> >
>> > * Make `set_node_memory_tier()` more generic
>> > This function can also be used for setting other memory types for a node.
>> > To do so, a new argument is added to specify a memory type.
>> >
>> > * Handle cases where there is no HMAT when creating memory tiers
>> > If no HMAT is specified, it falls back to using `default_dram_type`.
>> >
>> > * Change adist calculation code to use another new lock, mt_perf_lock.
>> > Iterating through CPUlist nodes requires holding the `memory_tier_lock`.
>> > However, `mt_calc_adistance()` will end up trying to acquire the same lock,
>> > leading to a potential deadlock. Therefore, we propose introducing a
>> > standalone `mt_perf_lock` to protect `default_dram_perf`. This approach not
>> > only avoids deadlock but also prevents holding a large lock simultaneously.
>>
>> The patch description is used to described why we need the change, and
>> how we do that, but not what we do.  People can tell what is done from
>> the code itself.
>>
>
> Got it. Thanks. Will rewrite it after the code is finalized.
>
>> > Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
>> > Signed-off-by: Hao Xiang <hao.xiang@bytedance.com>
>> > ---
>> >  drivers/acpi/numa/hmat.c     |  3 ++
>> >  include/linux/memory-tiers.h |  6 +++
>> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
>> >  3 files changed, 77 insertions(+), 8 deletions(-)
>> >
>> > diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
>> > index d6b85f0f6082..9f57338b3cb5 100644
>> > --- a/drivers/acpi/numa/hmat.c
>> > +++ b/drivers/acpi/numa/hmat.c
>> > @@ -1038,6 +1038,9 @@ static __init int hmat_init(void)
>> >       if (!hmat_set_default_dram_perf())
>> >               register_mt_adistance_algorithm(&hmat_adist_nb);
>> >
>> > +     /* Post-create CPUless memory tiers after getting HMAT info */
>> > +     mt_init_with_hmat();
>> > +
>> >       return 0;
>> >  out_put:
>> >       hmat_free_structures();
>> > diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
>> > index 69e781900082..2f845e90c033 100644
>> > --- a/include/linux/memory-tiers.h
>> > +++ b/include/linux/memory-tiers.h
>> > @@ -48,6 +48,7 @@ int mt_calc_adistance(int node, int *adist);
>> >  int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>> >                            const char *source);
>> >  int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
>> > +void mt_init_with_hmat(void);
>>
>> HMAT isn't universally available.  It's a driver in fact.  So, don't put
>> driver specific code in general code.
>>
>
> Please see below regarding "move code to hmat.c"
>
>> >  #ifdef CONFIG_MIGRATION
>> >  int next_demotion_node(int node);
>> >  void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
>> > @@ -136,5 +137,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
>> >  {
>> >       return -EIO;
>> >  }
>> > +
>> > +static inline void mt_init_with_hmat(void)
>> > +{
>> > +
>> > +}
>> >  #endif       /* CONFIG_NUMA */
>> >  #endif  /* _LINUX_MEMORY_TIERS_H */
>> > diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
>> > index 0537664620e5..7a0a579b3deb 100644
>> > --- a/mm/memory-tiers.c
>> > +++ b/mm/memory-tiers.c
>> > @@ -35,7 +35,9 @@ struct node_memory_type_map {
>> >  };
>> >
>> >  static DEFINE_MUTEX(memory_tier_lock);
>> > +static DEFINE_MUTEX(mt_perf_lock);
>> >  static LIST_HEAD(memory_tiers);
>> > +static LIST_HEAD(hmat_memory_types);
>> >  static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
>> >  struct memory_dev_type *default_dram_type;
>> >
>> > @@ -502,7 +504,7 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
>> >       }
>> >  }
>> >
>> > -static struct memory_tier *set_node_memory_tier(int node)
>> > +static struct memory_tier *set_node_memory_tier(int node, struct memory_dev_type *new_memtype)
>>
>> No. memory_dev_type are passed to the function via node_memory_types[node].memtype.
>>
>
> Got it. Will mimic the way kmem.c does. Thanks.
>
>> >  {
>> >       struct memory_tier *memtier;
>> >       struct memory_dev_type *memtype;
>> > @@ -514,7 +516,7 @@ static struct memory_tier *set_node_memory_tier(int node)
>> >       if (!node_state(node, N_MEMORY))
>> >               return ERR_PTR(-EINVAL);
>> >
>> > -     __init_node_memory_type(node, default_dram_type);
>> > +     __init_node_memory_type(node, new_memtype);
>> >
>> >       memtype = node_memory_types[node].memtype;
>> >       node_set(node, memtype->nodes);
>> > @@ -623,6 +625,56 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
>> >  }
>> >  EXPORT_SYMBOL_GPL(clear_node_memory_type);
>> >
>> > +static struct memory_dev_type *hmat_find_alloc_memory_type(int adist)
>>
>> Similar function existed in drivers/dax/kmem.c.  Please abstract them
>> and move them here.
>>
>
> Got it. Will try. Thanks.
>
>> > +{
>> > +     bool found = false;
>> > +     struct memory_dev_type *mtype;
>> > +
>> > +     list_for_each_entry(mtype, &hmat_memory_types, list) {
>> > +             if (mtype->adistance == adist) {
>> > +                     found = true;
>> > +                     break;
>> > +             }
>> > +     }
>> > +     if (!found) {
>> > +             mtype = alloc_memory_type(adist);
>> > +             if (!IS_ERR(mtype))
>> > +                     list_add(&mtype->list, &hmat_memory_types);
>> > +     }
>> > +     return mtype;
>> > +}
>> > +
>> > +static void mt_create_with_hmat(int node)
>> > +{
>> > +     struct memory_dev_type *mtype = NULL;
>> > +     int adist = MEMTIER_ADISTANCE_DRAM;
>> > +
>> > +     mt_calc_adistance(node, &adist);
>> > +     if (adist != MEMTIER_ADISTANCE_DRAM) {
>> > +             mtype = hmat_find_alloc_memory_type(adist);
>> > +             if (IS_ERR(mtype))
>> > +                     pr_err("%s() failed to allocate a tier\n", __func__);
>> > +     } else {
>> > +             mtype = default_dram_type;
>> > +     }
>> > +
>> > +     set_node_memory_tier(node, mtype);
>> > +}
>> > +
>> > +void mt_init_with_hmat(void)
>> > +{
>> > +     int nid;
>> > +
>> > +     mutex_lock(&memory_tier_lock);
>> > +     for_each_node_state(nid, N_MEMORY)
>> > +             if (!node_state(nid, N_CPU))
>> > +                     mt_create_with_hmat(nid);
>> > +
>> > +     establish_demotion_targets();
>> > +     mutex_unlock(&memory_tier_lock);
>> > +}
>> > +EXPORT_SYMBOL_GPL(mt_init_with_hmat);
>> > +
>>
>> I guess that we can put most hmat related code above in hmat.c.
>>
>
> To put the heat-related code to hmat.c I will need to export some
> static functions in memory-tiers.c, like set_node_memory_tier() and
> establish_demotion_targets(). Is that ok?

Think about this again.  In fact, although there are "_hmat" in the name
of the above functions, the code has nothing to do with hmat.  So, we
should rename these functions, but don't need to move them to hmat.c.
And, to set memory_tier for CPUless node on system without HMAT.  We
should call mt_init_with_hmat() with late_initcall().  Where HMAT
information is expected to be available on system with HMAT.  On system
without HMAT, default_dram_type will be used.

>> >  static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
>> >  {
>> >       pr_info(
>> > @@ -636,7 +688,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>> >  {
>> >       int rc = 0;
>> >
>> > -     mutex_lock(&memory_tier_lock);
>> > +     mutex_lock(&mt_perf_lock);
>> >       if (default_dram_perf_error) {
>> >               rc = -EIO;
>> >               goto out;
>> > @@ -684,7 +736,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
>> >       }
>> >
>> >  out:
>> > -     mutex_unlock(&memory_tier_lock);
>> > +     mutex_unlock(&mt_perf_lock);
>> >       return rc;
>> >  }
>> >
>> > @@ -700,7 +752,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
>> >           perf->read_bandwidth + perf->write_bandwidth == 0)
>> >               return -EINVAL;
>> >
>> > -     mutex_lock(&memory_tier_lock);
>> > +     mutex_lock(&mt_perf_lock);
>> >       /*
>> >        * The abstract distance of a memory node is in direct proportion to
>> >        * its memory latency (read + write) and inversely proportional to its
>> > @@ -713,7 +765,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
>> >               (default_dram_perf.read_latency + default_dram_perf.write_latency) *
>> >               (default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
>> >               (perf->read_bandwidth + perf->write_bandwidth);
>> > -     mutex_unlock(&memory_tier_lock);
>> > +     mutex_unlock(&mt_perf_lock);
>> >
>> >       return 0;
>> >  }
>> > @@ -797,7 +849,7 @@ static int __meminit memtier_hotplug_callback(struct notifier_block *self,
>> >               break;
>> >       case MEM_ONLINE:
>> >               mutex_lock(&memory_tier_lock);
>> > -             memtier = set_node_memory_tier(arg->status_change_nid);
>> > +             memtier = set_node_memory_tier(arg->status_change_nid, default_dram_type);
>> >               if (!IS_ERR(memtier))
>> >                       establish_demotion_targets();
>> >               mutex_unlock(&memory_tier_lock);
>> > @@ -836,7 +888,15 @@ static int __init memory_tier_init(void)
>> >        * types assigned.
>> >        */
>> >       for_each_node_state(node, N_MEMORY) {
>> > -             memtier = set_node_memory_tier(node);
>> > +             if (!node_state(node, N_CPU))
>> > +                     /*
>> > +                      * Defer memory tier initialization on CPUless numa nodes.
>> > +                      * These will be initialized when HMAT information is
>> > +                      * available.
>> > +                      */
>> > +                     continue;
>> > +
>> > +             memtier = set_node_memory_tier(node, default_dram_type);
>>
>> On system with HMAT, how to fall back CPU-less node to
>> default_dram_type?  I found your description, but I don't find it in code.
>>
> I assume you meant without HMAT, if so,
> because if no HMAT, adist will not be updated in mt_calc_adistance():

Sorry, typo.  On system with HMAT, mt_init_with_hmat() will not be
called.  I have a solution in above comment.

--
Best Regards,
Huang, Ying

> + int adist = MEMTIER_ADISTANCE_DRAM;
> +
> + mt_calc_adistance(node, &adist);
> + if (adist != MEMTIER_ADISTANCE_DRAM) {
> …
> + } else {
> + mtype = default_dram_type;
> + }
> +
> + set_node_memory_tier(node, mtype);
>
>> >               if (IS_ERR(memtier))
>> >                       /*
>> >                        * Continue with memtiers we are able to setup
>>
>> --
>> Best Regards,
>> Huang, Ying

Re: [External] Re: [PATCH v1 1/1] memory tier: acpi/hmat: create CPUless memory tiers after obtaining HMAT info

[Ho-Ren (Jack) Chuang]

On Tue, Mar 5, 2024 at 6:27 PM Huang, Ying <ying.huang@intel.com> wrote:
>
> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
>
> > On Sun, Mar 3, 2024 at 6:42 PM Huang, Ying <ying.huang@intel.com> wrote:
> >>
> >> Hi, Jack,
> >>
> >> "Ho-Ren (Jack) Chuang" <horenchuang@bytedance.com> writes:
> >>
> >> > * Introduce `mt_init_with_hmat()`
> >> > We defer memory tier initialization for those CPUless NUMA nodes
> >> > until acquiring HMAT info. `mt_init_with_hmat()` is introduced to
> >> > post-create CPUless memory tiers after obtaining HMAT info.
> >> > It iterates through each CPUless memory node, creating memory tiers if
> >> > necessary. Finally, it calculates demotion tables again at the end.
> >> >
> >> > * Introduce `hmat_find_alloc_memory_type()`
> >> > Find or allocate a memory type in the `hmat_memory_types` list.
> >> >
> >> > * Make `set_node_memory_tier()` more generic
> >> > This function can also be used for setting other memory types for a node.
> >> > To do so, a new argument is added to specify a memory type.
> >> >
> >> > * Handle cases where there is no HMAT when creating memory tiers
> >> > If no HMAT is specified, it falls back to using `default_dram_type`.
> >> >
> >> > * Change adist calculation code to use another new lock, mt_perf_lock.
> >> > Iterating through CPUlist nodes requires holding the `memory_tier_lock`.
> >> > However, `mt_calc_adistance()` will end up trying to acquire the same lock,
> >> > leading to a potential deadlock. Therefore, we propose introducing a
> >> > standalone `mt_perf_lock` to protect `default_dram_perf`. This approach not
> >> > only avoids deadlock but also prevents holding a large lock simultaneously.
> >>
> >> The patch description is used to described why we need the change, and
> >> how we do that, but not what we do.  People can tell what is done from
> >> the code itself.
> >>
> >
> > Got it. Thanks. Will rewrite it after the code is finalized.
> >
> >> > Signed-off-by: Ho-Ren (Jack) Chuang <horenchuang@bytedance.com>
> >> > Signed-off-by: Hao Xiang <hao.xiang@bytedance.com>
> >> > ---
> >> >  drivers/acpi/numa/hmat.c     |  3 ++
> >> >  include/linux/memory-tiers.h |  6 +++
> >> >  mm/memory-tiers.c            | 76 ++++++++++++++++++++++++++++++++----
> >> >  3 files changed, 77 insertions(+), 8 deletions(-)
> >> >
> >> > diff --git a/drivers/acpi/numa/hmat.c b/drivers/acpi/numa/hmat.c
> >> > index d6b85f0f6082..9f57338b3cb5 100644
> >> > --- a/drivers/acpi/numa/hmat.c
> >> > +++ b/drivers/acpi/numa/hmat.c
> >> > @@ -1038,6 +1038,9 @@ static __init int hmat_init(void)
> >> >       if (!hmat_set_default_dram_perf())
> >> >               register_mt_adistance_algorithm(&hmat_adist_nb);
> >> >
> >> > +     /* Post-create CPUless memory tiers after getting HMAT info */
> >> > +     mt_init_with_hmat();
> >> > +
> >> >       return 0;
> >> >  out_put:
> >> >       hmat_free_structures();
> >> > diff --git a/include/linux/memory-tiers.h b/include/linux/memory-tiers.h
> >> > index 69e781900082..2f845e90c033 100644
> >> > --- a/include/linux/memory-tiers.h
> >> > +++ b/include/linux/memory-tiers.h
> >> > @@ -48,6 +48,7 @@ int mt_calc_adistance(int node, int *adist);
> >> >  int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >> >                            const char *source);
> >> >  int mt_perf_to_adistance(struct access_coordinate *perf, int *adist);
> >> > +void mt_init_with_hmat(void);
> >>
> >> HMAT isn't universally available.  It's a driver in fact.  So, don't put
> >> driver specific code in general code.
> >>
> >
> > Please see below regarding "move code to hmat.c"
> >
> >> >  #ifdef CONFIG_MIGRATION
> >> >  int next_demotion_node(int node);
> >> >  void node_get_allowed_targets(pg_data_t *pgdat, nodemask_t *targets);
> >> > @@ -136,5 +137,10 @@ static inline int mt_perf_to_adistance(struct access_coordinate *perf, int *adis
> >> >  {
> >> >       return -EIO;
> >> >  }
> >> > +
> >> > +static inline void mt_init_with_hmat(void)
> >> > +{
> >> > +
> >> > +}
> >> >  #endif       /* CONFIG_NUMA */
> >> >  #endif  /* _LINUX_MEMORY_TIERS_H */
> >> > diff --git a/mm/memory-tiers.c b/mm/memory-tiers.c
> >> > index 0537664620e5..7a0a579b3deb 100644
> >> > --- a/mm/memory-tiers.c
> >> > +++ b/mm/memory-tiers.c
> >> > @@ -35,7 +35,9 @@ struct node_memory_type_map {
> >> >  };
> >> >
> >> >  static DEFINE_MUTEX(memory_tier_lock);
> >> > +static DEFINE_MUTEX(mt_perf_lock);
> >> >  static LIST_HEAD(memory_tiers);
> >> > +static LIST_HEAD(hmat_memory_types);
> >> >  static struct node_memory_type_map node_memory_types[MAX_NUMNODES];
> >> >  struct memory_dev_type *default_dram_type;
> >> >
> >> > @@ -502,7 +504,7 @@ static inline void __init_node_memory_type(int node, struct memory_dev_type *mem
> >> >       }
> >> >  }
> >> >
> >> > -static struct memory_tier *set_node_memory_tier(int node)
> >> > +static struct memory_tier *set_node_memory_tier(int node, struct memory_dev_type *new_memtype)
> >>
> >> No. memory_dev_type are passed to the function via node_memory_types[node].memtype.
> >>
> >
> > Got it. Will mimic the way kmem.c does. Thanks.
> >
> >> >  {
> >> >       struct memory_tier *memtier;
> >> >       struct memory_dev_type *memtype;
> >> > @@ -514,7 +516,7 @@ static struct memory_tier *set_node_memory_tier(int node)
> >> >       if (!node_state(node, N_MEMORY))
> >> >               return ERR_PTR(-EINVAL);
> >> >
> >> > -     __init_node_memory_type(node, default_dram_type);
> >> > +     __init_node_memory_type(node, new_memtype);
> >> >
> >> >       memtype = node_memory_types[node].memtype;
> >> >       node_set(node, memtype->nodes);
> >> > @@ -623,6 +625,56 @@ void clear_node_memory_type(int node, struct memory_dev_type *memtype)
> >> >  }
> >> >  EXPORT_SYMBOL_GPL(clear_node_memory_type);
> >> >
> >> > +static struct memory_dev_type *hmat_find_alloc_memory_type(int adist)
> >>
> >> Similar function existed in drivers/dax/kmem.c.  Please abstract them
> >> and move them here.
> >>
> >
> > Got it. Will try. Thanks.
> >
> >> > +{
> >> > +     bool found = false;
> >> > +     struct memory_dev_type *mtype;
> >> > +
> >> > +     list_for_each_entry(mtype, &hmat_memory_types, list) {
> >> > +             if (mtype->adistance == adist) {
> >> > +                     found = true;
> >> > +                     break;
> >> > +             }
> >> > +     }
> >> > +     if (!found) {
> >> > +             mtype = alloc_memory_type(adist);
> >> > +             if (!IS_ERR(mtype))
> >> > +                     list_add(&mtype->list, &hmat_memory_types);
> >> > +     }
> >> > +     return mtype;
> >> > +}
> >> > +
> >> > +static void mt_create_with_hmat(int node)
> >> > +{
> >> > +     struct memory_dev_type *mtype = NULL;
> >> > +     int adist = MEMTIER_ADISTANCE_DRAM;
> >> > +
> >> > +     mt_calc_adistance(node, &adist);
> >> > +     if (adist != MEMTIER_ADISTANCE_DRAM) {
> >> > +             mtype = hmat_find_alloc_memory_type(adist);
> >> > +             if (IS_ERR(mtype))
> >> > +                     pr_err("%s() failed to allocate a tier\n", __func__);
> >> > +     } else {
> >> > +             mtype = default_dram_type;
> >> > +     }
> >> > +
> >> > +     set_node_memory_tier(node, mtype);
> >> > +}
> >> > +
> >> > +void mt_init_with_hmat(void)
> >> > +{
> >> > +     int nid;
> >> > +
> >> > +     mutex_lock(&memory_tier_lock);
> >> > +     for_each_node_state(nid, N_MEMORY)
> >> > +             if (!node_state(nid, N_CPU))
> >> > +                     mt_create_with_hmat(nid);
> >> > +
> >> > +     establish_demotion_targets();
> >> > +     mutex_unlock(&memory_tier_lock);
> >> > +}
> >> > +EXPORT_SYMBOL_GPL(mt_init_with_hmat);
> >> > +
> >>
> >> I guess that we can put most hmat related code above in hmat.c.
> >>
> >
> > To put the heat-related code to hmat.c I will need to export some
> > static functions in memory-tiers.c, like set_node_memory_tier() and
> > establish_demotion_targets(). Is that ok?
>
> Think about this again.  In fact, although there are "_hmat" in the name
> of the above functions, the code has nothing to do with hmat.  So, we
> should rename these functions, but don't need to move them to hmat.c.
> And, to set memory_tier for CPUless node on system without HMAT.  We
> should call mt_init_with_hmat() with late_initcall().  Where HMAT
> information is expected to be available on system with HMAT.  On system
> without HMAT, default_dram_type will be used.
>

Sounds good and thank you! I'm working on v2 according to the feedback.

> >> >  static void dump_hmem_attrs(struct access_coordinate *coord, const char *prefix)
> >> >  {
> >> >       pr_info(
> >> > @@ -636,7 +688,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >> >  {
> >> >       int rc = 0;
> >> >
> >> > -     mutex_lock(&memory_tier_lock);
> >> > +     mutex_lock(&mt_perf_lock);
> >> >       if (default_dram_perf_error) {
> >> >               rc = -EIO;
> >> >               goto out;
> >> > @@ -684,7 +736,7 @@ int mt_set_default_dram_perf(int nid, struct access_coordinate *perf,
> >> >       }
> >> >
> >> >  out:
> >> > -     mutex_unlock(&memory_tier_lock);
> >> > +     mutex_unlock(&mt_perf_lock);
> >> >       return rc;
> >> >  }
> >> >
> >> > @@ -700,7 +752,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
> >> >           perf->read_bandwidth + perf->write_bandwidth == 0)
> >> >               return -EINVAL;
> >> >
> >> > -     mutex_lock(&memory_tier_lock);
> >> > +     mutex_lock(&mt_perf_lock);
> >> >       /*
> >> >        * The abstract distance of a memory node is in direct proportion to
> >> >        * its memory latency (read + write) and inversely proportional to its
> >> > @@ -713,7 +765,7 @@ int mt_perf_to_adistance(struct access_coordinate *perf, int *adist)
> >> >               (default_dram_perf.read_latency + default_dram_perf.write_latency) *
> >> >               (default_dram_perf.read_bandwidth + default_dram_perf.write_bandwidth) /
> >> >               (perf->read_bandwidth + perf->write_bandwidth);
> >> > -     mutex_unlock(&memory_tier_lock);
> >> > +     mutex_unlock(&mt_perf_lock);
> >> >
> >> >       return 0;
> >> >  }
> >> > @@ -797,7 +849,7 @@ static int __meminit memtier_hotplug_callback(struct notifier_block *self,
> >> >               break;
> >> >       case MEM_ONLINE:
> >> >               mutex_lock(&memory_tier_lock);
> >> > -             memtier = set_node_memory_tier(arg->status_change_nid);
> >> > +             memtier = set_node_memory_tier(arg->status_change_nid, default_dram_type);
> >> >               if (!IS_ERR(memtier))
> >> >                       establish_demotion_targets();
> >> >               mutex_unlock(&memory_tier_lock);
> >> > @@ -836,7 +888,15 @@ static int __init memory_tier_init(void)
> >> >        * types assigned.
> >> >        */
> >> >       for_each_node_state(node, N_MEMORY) {
> >> > -             memtier = set_node_memory_tier(node);
> >> > +             if (!node_state(node, N_CPU))
> >> > +                     /*
> >> > +                      * Defer memory tier initialization on CPUless numa nodes.
> >> > +                      * These will be initialized when HMAT information is
> >> > +                      * available.
> >> > +                      */
> >> > +                     continue;
> >> > +
> >> > +             memtier = set_node_memory_tier(node, default_dram_type);
> >>
> >> On system with HMAT, how to fall back CPU-less node to
> >> default_dram_type?  I found your description, but I don't find it in code.
> >>
> > I assume you meant without HMAT, if so,
> > because if no HMAT, adist will not be updated in mt_calc_adistance():
>
> Sorry, typo.  On system with HMAT, mt_init_with_hmat() will not be
> called.  I have a solution in above comment.
>
> --
> Best Regards,
> Huang, Ying
>
> > + int adist = MEMTIER_ADISTANCE_DRAM;
> > +
> > + mt_calc_adistance(node, &adist);
> > + if (adist != MEMTIER_ADISTANCE_DRAM) {
> > …
> > + } else {
> > + mtype = default_dram_type;
> > + }
> > +
> > + set_node_memory_tier(node, mtype);
> >
> >> >               if (IS_ERR(memtier))
> >> >                       /*
> >> >                        * Continue with memtiers we are able to setup
> >>
> >> --
> >> Best Regards,
> >> Huang, Ying



-- 
Best regards,
Ho-Ren (Jack) Chuang
莊賀任