[PATCH v4 0/6] arm64: dts: ti: k3-j7*: Add missing ESM and

[PATCH v4 0/6] arm64: dts: ti: k3-j7*: Add missing ESM and

[Neha Malcom Francis]

Add missing ESM and watchdog nodes for the sake of devicetree completion
of hardware description w.r.t Linux and ESM and WDT enablement on
U-Boot. This patch series adds the missing nodes for J721E and J7200.

Boot logs (updated for v3):
https://gist.github.com/nehamalcom/5dc94ab60f57df5d515d0a6d0da6e0d1

Changes since v3:
- added patch (6/6) for adding bootph-pre-ram in main_esm nodes (Udit)
- no change to boot logs

Changes since v2:
https://lore.kernel.org/all/20240412042537.666137-1-n-francis@ti.com/
- corrected register size for MCU watchdog instance in J7200 (Udit)
- added Reviewed-by tag (Udit)

Changes since v1:
https://lore.kernel.org/all/20240326122723.2329402-1-n-francis@ti.com/
- modified node name numbering to be in sync with TRM (Udit)
- disabled wkup_esm node in J721E (Udit)
- added patch (5/5) for MCU domain watchdog instances in J7200 (Udit)
Neha Malcom Francis (6):

arm64: dts: ti: k3-j721e-mcu: Add the WKUP ESM instance
  arm64: dts: ti: k3-j721e-mcu: Add the MCU domain watchdog instances
  arm64: dts: ti: k3-j721e-main: Add the MAIN domain watchdog instances
  arm64: dts: ti: k3-j7200-main: Add the MAIN domain watchdog instances
  arm64: dts: ti: k3-j7200-mcu: Add the MCU domain watchdog instances
  arm64: dts: ti: k3-j7*-main: Add bootph-pre-ram to main_esm

 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi     | 28 ++++++
 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 26 +++++
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi     | 94 +++++++++++++++++++
 .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      | 32 +++++++
 4 files changed, 180 insertions(+)

-- 
2.34.1

[PATCH v4 1/6] arm64: dts: ti: k3-j721e-mcu: Add the WKUP ESM instance

[Neha Malcom Francis]

Add the WKUP ESM instance for J721E. It has three instances in total,
one in the MAIN domain (main_esm) and two in the MCU-WKUP domain
(mcu_esm and wkup_esm).

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com> 
---
Changes since v2:
- no changes

 arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 4618b697fbc4..3044e08f6858 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -689,4 +689,10 @@ mcu_esm: esm@40800000 {
 		ti,esm-pins = <95>;
 		bootph-pre-ram;
 	};
+
+	wkup_esm: esm@42080000 {
+		compatible = "ti,j721e-esm";
+		reg = <0x00 0x42080000 0x00 0x1000>;
+		status = "disabled";
+	};
 };
-- 
2.34.1

[PATCH v4 2/6] arm64: dts: ti: k3-j721e-mcu: Add the MCU domain watchdog instances

[Neha Malcom Francis]

There are 2 watchdog instances in the MCU domain. These instances are
coupled with the MCU domain R55 instances. Reserve them as they are not
used by A72.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
---
Changes since v2:
- no changes

 .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi      | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
index 3044e08f6858..0dc84c9f8c4a 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
@@ -695,4 +695,30 @@ wkup_esm: esm@42080000 {
 		reg = <0x00 0x42080000 0x00 0x1000>;
 		status = "disabled";
 	};
+
+	/*
+	 * The 2 RTI instances are couple with MCU R5Fs so keeping them
+	 * reserved as these will be used by their respective firmware
+	 */
+	mcu_watchdog0: watchdog@40600000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x40600000 0x00 0x100>;
+		clocks = <&k3_clks 262 1>;
+		power-domains = <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 262 1>;
+		assigned-clock-parents = <&k3_clks 262 5>;
+		/* reserved for MCU_R5F0_0 */
+		status = "reserved";
+	};
+
+	mcu_watchdog1: watchdog@40610000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x40610000 0x00 0x100>;
+		clocks = <&k3_clks 263 1>;
+		power-domains = <&k3_pds 263 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 263 1>;
+		assigned-clock-parents = <&k3_clks 263 5>;
+		/* reserved for MCU_R5F0_1 */
+		status = "reserved";
+	};
 };
-- 
2.34.1

[PATCH v4 3/6] arm64: dts: ti: k3-j721e-main: Add the MAIN domain watchdog instances

[Neha Malcom Francis]

There are 10 watchdog instances in the MAIN domain:
	* one each for the 2 A72 cores
	* one for the GPU core
	* one for the C7x core
	* one each for the 2 C66x cores
	* one each for the 4 R5F cores

Currently, the devicetree only describes watchdog instances for the A72
cores and enables them. Describe the remaining but reserve them as they
will be used by their respective firmware.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
---
Changes since v2:
- no changes

 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 93 +++++++++++++++++++++++
 1 file changed, 93 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index c7eafbc862f9..0dd5005b34aa 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -2157,6 +2157,99 @@ watchdog1: watchdog@2210000 {
 		assigned-clock-parents = <&k3_clks 253 5>;
 	};
 
+	/*
+	 * The following RTI instances are coupled with MCU R5Fs, c7x and
+	 * GPU so keeping them reserved as these will be used by their
+	 * respective firmware
+	 */
+	watchdog15: watchdog@22f0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x22f0000 0x00 0x100>;
+		clocks = <&k3_clks 257 1>;
+		power-domains = <&k3_pds 257 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 257 1>;
+		assigned-clock-parents = <&k3_clks 257 5>;
+		/* reserved for GPU */
+		status = "reserved";
+	};
+
+	watchdog16: watchdog@2300000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2300000 0x00 0x100>;
+		clocks = <&k3_clks 256 1>;
+		power-domains = <&k3_pds 256 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 256 1>;
+		assigned-clock-parents = <&k3_clks 256 5>;
+		/* reserved for C7X */
+		status = "reserved";
+	};
+
+	watchdog24: watchdog@2380000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2380000 0x00 0x100>;
+		clocks = <&k3_clks 254 1>;
+		power-domains = <&k3_pds 254 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 254 1>;
+		assigned-clock-parents = <&k3_clks 254 5>;
+		/* reserved for C66X_0 */
+		status = "reserved";
+	};
+
+	watchdog25: watchdog@2390000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x2390000 0x00 0x100>;
+		clocks = <&k3_clks 255 1>;
+		power-domains = <&k3_pds 255 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 255 1>;
+		assigned-clock-parents = <&k3_clks 255 5>;
+		/* reserved for C66X_1 */
+		status = "reserved";
+	};
+
+	watchdog28: watchdog@23c0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23c0000 0x00 0x100>;
+		clocks = <&k3_clks 258 1>;
+		power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 258 1>;
+		assigned-clock-parents = <&k3_clks 258 5>;
+		/* reserved for MAIN_R5F0_0 */
+		status = "reserved";
+	};
+
+	watchdog29: watchdog@23d0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23d0000 0x00 0x100>;
+		clocks = <&k3_clks 259 1>;
+		power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 259 1>;
+		assigned-clock-parents = <&k3_clks 259 5>;
+		/* reserved for MAIN_R5F0_1 */
+		status = "reserved";
+	};
+
+	watchdog30: watchdog@23e0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23e0000 0x00 0x100>;
+		clocks = <&k3_clks 260 1>;
+		power-domains = <&k3_pds 260 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 260 1>;
+		assigned-clock-parents = <&k3_clks 260 5>;
+		/* reserved for MAIN_R5F1_0 */
+		status = "reserved";
+	};
+
+	watchdog31: watchdog@23f0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23f0000 0x00 0x100>;
+		clocks = <&k3_clks 261 1>;
+		power-domains = <&k3_pds 261 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 261 1>;
+		assigned-clock-parents = <&k3_clks 261 5>;
+		/* reserved for MAIN_R5F1_1 */
+		status = "reserved";
+	};
+
 	main_r5fss0: r5fss@5c00000 {
 		compatible = "ti,j721e-r5fss";
 		ti,cluster-mode = <1>;
-- 
2.34.1

[PATCH v4 4/6] arm64: dts: ti: k3-j7200-main: Add the MAIN domain watchdog instances

[Neha Malcom Francis]

There are 4 watchdog instances in the MAIN domain:
	* one each for the 2 A72 cores
	* one each for the 2 R5F cores

Currently, the devicetree only describes watchdog instances for the A72
cores and enables them. Describe the remaining but reserve them as they
will be used by their respective firmware.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
---
Changes since v2:
- no changes

 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 657f9cc9f4ea..b24a6333563a 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1254,6 +1254,33 @@ watchdog1: watchdog@2210000 {
 		assigned-clock-parents = <&k3_clks 253 5>;
 	};
 
+	/*
+	 * The following RTI instances are coupled with MCU R5Fs so
+	 * keeping them reserved as these will be used by their respective
+	 * firmware
+	 */
+	watchdog28: watchdog@23c0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23c0000 0x00 0x100>;
+		clocks = <&k3_clks 258 1>;
+		power-domains = <&k3_pds 258 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 258 1>;
+		assigned-clock-parents = <&k3_clks 258 5>;
+		/* reserved for MAIN_R5F0_0 */
+		status = "reserved";
+	};
+
+	watchdog29: watchdog@23d0000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x23d0000 0x00 0x100>;
+		clocks = <&k3_clks 259 1>;
+		power-domains = <&k3_pds 259 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 259 1>;
+		assigned-clock-parents = <&k3_clks 259 5>;
+		/* reserved for MAIN_R5F0_1 */
+		status = "reserved";
+	};
+
 	main_timer0: timer@2400000 {
 		compatible = "ti,am654-timer";
 		reg = <0x00 0x2400000 0x00 0x400>;
-- 
2.34.1

[PATCH v4 5/6] arm64: dts: ti: k3-j7200-mcu: Add the MCU domain watchdog instances

[Neha Malcom Francis]

There are 2 watchdog instances in the MCU domain. These instances are
coupled with the MCU domain R55 instances. Reserve them as they are not
used by A72.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
---
Changes since v3:
- no change

 .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi      | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
index 7cf21c99956e..f6ca4ffb5ee1 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
@@ -686,4 +686,30 @@ mcu_mcan1: can@40568000 {
 		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
 		status = "disabled";
 	};
+
+	/*
+	 * The 2 RTI instances are couple with MCU R5Fs so keeping them
+	 * reserved as these will be used by their respective firmware
+	 */
+	mcu_watchdog0: watchdog@40600000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x40600000 0x00 0x100>;
+		clocks = <&k3_clks 262 1>;
+		power-domains = <&k3_pds 262 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 262 1>;
+		assigned-clock-parents = <&k3_clks 262 5>;
+		/* reserved for MCU_R5F0_0 */
+		status = "reserved";
+	};
+
+	mcu_watchdog1: watchdog@40610000 {
+		compatible = "ti,j7-rti-wdt";
+		reg = <0x00 0x40610000 0x00 0x100>;
+		clocks = <&k3_clks 263 1>;
+		power-domains = <&k3_pds 263 TI_SCI_PD_EXCLUSIVE>;
+		assigned-clocks = <&k3_clks 263 1>;
+		assigned-clock-parents = <&k3_clks 263 5>;
+		/* reserved for MCU_R5F0_1 */
+		status = "reserved";
+	};
 };
-- 
2.34.1

[PATCH v4 6/6] arm64: dts: ti: k3-j7*-main: Add bootph-pre-ram to main_esm

[Neha Malcom Francis]

Add bootph-pre-ram to main_esm as R5 bootloader configures MAIN domain
watchdog interrupts to generate the ESM pin events.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
---
 arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 +
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index b24a6333563a..30ec36ce4ce7 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -1565,5 +1565,6 @@ main_esm: esm@700000 {
 		compatible = "ti,j721e-esm";
 		reg = <0x0 0x700000 0x0 0x1000>;
 		ti,esm-pins = <656>, <657>;
+		bootph-pre-ram;
 	};
 };
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 0dd5005b34aa..a5dc1e1bc1a9 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -2957,5 +2957,6 @@ main_esm: esm@700000 {
 		compatible = "ti,j721e-esm";
 		reg = <0x0 0x700000 0x0 0x1000>;
 		ti,esm-pins = <344>, <345>;
+		bootph-pre-ram;
 	};
 };
-- 
2.34.1

Re: [PATCH v4 6/6] arm64: dts: ti: k3-j7*-main: Add bootph-pre-ram to main_esm

[Kumar, Udit]

Thanks Neha

On 4/26/2024 2:42 AM, Neha Malcom Francis wrote:
> Add bootph-pre-ram to main_esm as R5 bootloader configures MAIN domain
> watchdog interrupts to generate the ESM pin events.
>
> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
> ---
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 1 +
>   arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 +
>   2 files changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index b24a6333563a..30ec36ce4ce7 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1565,5 +1565,6 @@ main_esm: esm@700000 {
>   		compatible = "ti,j721e-esm";
>   		reg = <0x0 0x700000 0x0 0x1000>;
>   		ti,esm-pins = <656>, <657>;
> +		bootph-pre-ram;

Reviewed-by: Udit Kumar <u-kumar1@ti.com>

>   	};
>   };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> index 0dd5005b34aa..a5dc1e1bc1a9 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> @@ -2957,5 +2957,6 @@ main_esm: esm@700000 {
>   		compatible = "ti,j721e-esm";
>   		reg = <0x0 0x700000 0x0 0x1000>;
>   		ti,esm-pins = <344>, <345>;
> +		bootph-pre-ram;
>   	};
>   };