* [PATCH 2/2] ARM: dts: rockchip: Add SDIO0 node for VMARC SOM
2020-10-23 18:18 [PATCH 1/2] arm64: defconfig: Enable RTC_DRV_HYM8563 Jagan Teki
@ 2020-10-23 18:18 ` Jagan Teki
2020-11-30 13:50 ` (subset) [PATCH 1/2] arm64: defconfig: Enable RTC_DRV_HYM8563 Heiko Stuebner
1 sibling, 0 replies; 4+ messages in thread
From: Jagan Teki @ 2020-10-23 18:18 UTC (permalink / raw)
To: Heiko Stuebner, Rob Herring, Catalin Marinas, Will Deacon
Cc: Tom Cubie, Suniel Mahesh, linux-arm-kernel, linux-rockchip,
devicetree, linux-kernel, linux-amarula, Jagan Teki
Rockchip RK3288 and RK3399Pro based VMARC SOM has sdio0 for
connecting WiFi/BT devices as a pluggable card via M.2 E-Key.
Add associated sdio0 nodes, properties.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
arch/arm/boot/dts/rk3288-vmarc-som.dtsi | 40 +++++++++++++++++++
.../dts/rockchip-radxa-dalang-carrier.dtsi | 21 ++++++++++
.../dts/rockchip/rk3399pro-vmarc-som.dtsi | 16 ++++++++
3 files changed, 77 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
index 4a373f5aa600..353d95b9953b 100644
--- a/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
+++ b/arch/arm/boot/dts/rk3288-vmarc-som.dtsi
@@ -231,6 +231,23 @@ regulator-state-mem {
};
};
+&i2c1 {
+ clock-frequency = <400000>;
+ status = "okay";
+
+ hym8563: hym8563@51 {
+ compatible = "haoyu,hym8563";
+ reg = <0x51>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ clock-output-names = "hym8563";
+ pinctrl-names = "default";
+ pinctrl-0 = <&hym8563_int>;
+ interrupt-parent = <&gpio5>;
+ interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&i2c5 {
status = "okay";
};
@@ -241,10 +258,17 @@ &io_domains {
gpio1830-supply = <&vcc_18>;
gpio30-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>;
+ wifi-supply = <&vcc_wl>;
status = "okay";
};
&pinctrl {
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins = <5 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
drive-strength = <8>;
};
@@ -260,6 +284,12 @@ pmic_int: pmic-int {
};
};
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
sdmmc {
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
@@ -291,6 +321,16 @@ usb0_en_oc: usb0-en-oc {
};
};
+&sdio_pwrseq {
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_LOW>; /* WIFI_REG_ON */
+};
+
&usbphy {
status = "okay";
};
diff --git a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
index 26b53eac4706..da1d548b7330 100644
--- a/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
+++ b/arch/arm/boot/dts/rockchip-radxa-dalang-carrier.dtsi
@@ -15,6 +15,14 @@ clkin_gmac: external-gmac-clock {
#clock-cells = <0>;
};
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&hym8563>;
+ clock-names = "ext_clock";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_enable_h>;
+ };
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -78,6 +86,19 @@ &pwm2 {
status = "okay";
};
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ non-removable;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
+ sd-uhs-sdr104;
+ status = "okay";
+};
+
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
index 5d087be04af8..7257494d2831 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-vmarc-som.dtsi
@@ -353,6 +353,12 @@ pmic_int_l: pmic-int-l {
};
};
+ sdio-pwrseq {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
vbus_host {
usb1_en_oc: usb1-en-oc {
rockchip,pins = <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
@@ -371,6 +377,16 @@ &pmu_io_domains {
pmu1830-supply = <&vcc_1v8>;
};
+&sdio_pwrseq {
+ /*
+ * On the module itself this is one of these (depending
+ * on the actual card populated):
+ * - SDIO_RESET_L_WL_REG_ON
+ * - PDN (power down when low)
+ */
+ reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
+};
+
&sdhci {
bus-width = <8>;
mmc-hs400-1_8v;
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: (subset) [PATCH 1/2] arm64: defconfig: Enable RTC_DRV_HYM8563
2020-10-23 18:18 [PATCH 1/2] arm64: defconfig: Enable RTC_DRV_HYM8563 Jagan Teki
2020-10-23 18:18 ` [PATCH 2/2] ARM: dts: rockchip: Add SDIO0 node for VMARC SOM Jagan Teki
@ 2020-11-30 13:50 ` Heiko Stuebner
2020-11-30 13:51 ` Heiko Stübner
1 sibling, 1 reply; 4+ messages in thread
From: Heiko Stuebner @ 2020-11-30 13:50 UTC (permalink / raw)
To: Catalin Marinas, Jagan Teki, Will Deacon, Rob Herring
Cc: Heiko Stuebner, linux-rockchip, devicetree, Tom Cubie,
linux-kernel, Suniel Mahesh, linux-amarula, linux-arm-kernel
On Fri, 23 Oct 2020 23:48:13 +0530, Jagan Teki wrote:
> RTC HYM8563 used in the ARM64 Rockchip SoC's SDIO power
> sequence enablement.
>
> Enable it as module.
Applied both patches, thanks!
Best regards,
--
Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 4+ messages in thread