From: Brijesh Singh <brijesh.singh@amd.com>
To: Borislav Petkov <bp@alien8.de>
Cc: brijesh.singh@amd.com, x86@kernel.org,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
tglx@linutronix.de, jroedel@suse.de, thomas.lendacky@amd.com,
pbonzini@redhat.com, mingo@redhat.com, dave.hansen@intel.com,
rientjes@google.com, seanjc@google.com, peterz@infradead.org,
hpa@zytor.com, tony.luck@intel.com
Subject: Re: [PATCH Part1 RFC v2 05/20] x86/sev: Define SNP Page State Change VMGEXIT structure
Date: Tue, 18 May 2021 10:06:48 -0500 [thread overview]
Message-ID: <23f69827-4279-34ca-e8b6-655963c28c49@amd.com> (raw)
In-Reply-To: <YKOZxMusqBLL1nP6@zn.tnic>
On 5/18/21 5:41 AM, Borislav Petkov wrote:
> On Fri, Apr 30, 2021 at 07:16:01AM -0500, Brijesh Singh wrote:
>> An SNP-active guest will use the page state change NAE VMGEXIT defined in
>> the GHCB specification to ask the hypervisor to make the guest page
>> private or shared in the RMP table. In addition to the private/shared,
>> the guest can also ask the hypervisor to split or combine multiple 4K
>> validated pages as a single 2M page or vice versa.
>>
>> See GHCB specification section Page State Change for additional
>> information.
>>
>> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
>> ---
>> arch/x86/include/asm/sev-common.h | 46 +++++++++++++++++++++++++++++++
>> arch/x86/include/uapi/asm/svm.h | 2 ++
>> 2 files changed, 48 insertions(+)
>>
>> diff --git a/arch/x86/include/asm/sev-common.h b/arch/x86/include/asm/sev-common.h
>> index 8142e247d8da..07b8612bf182 100644
>> --- a/arch/x86/include/asm/sev-common.h
>> +++ b/arch/x86/include/asm/sev-common.h
>> @@ -67,6 +67,52 @@
>> #define GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION_TIMER \
>> (BIT_ULL(3) | GHCB_HV_FEATURES_SNP_RESTRICTED_INJECTION)
>>
>> +/* SNP Page State Change */
>> +#define GHCB_MSR_PSC_REQ 0x014
>> +#define SNP_PAGE_STATE_PRIVATE 1
>> +#define SNP_PAGE_STATE_SHARED 2
>> +#define SNP_PAGE_STATE_PSMASH 3
>> +#define SNP_PAGE_STATE_UNSMASH 4
>> +#define GHCB_MSR_PSC_GFN_POS 12
>> +#define GHCB_MSR_PSC_GFN_MASK 0xffffffffffULL
> Why don't you use GENMASK_ULL() as I suggested? All those "f"s are
> harder to count than seeing the start and end of a mask.
>
>> +#define GHCB_MSR_PSC_OP_POS 52
> Also, having defines for 12 and 52 doesn't make it more readable,
> frankly.
>
> When I see GENMASK_ULL(51, 12) it is kinda clear what it is. With the
> defines, I have to go chase every define and replace it with the number
> mentally.
I was still adhering to the previous convention in the file to define
the values. I will submit prepatch to change them to also use GENMASK so
that its consistent with SNP updates I add in this series.
>> +#define GHCB_MSR_PSC_OP_MASK 0xf
>> +#define GHCB_MSR_PSC_REQ_GFN(gfn, op) \
>> + (((unsigned long)((op) & GHCB_MSR_PSC_OP_MASK) << GHCB_MSR_PSC_OP_POS) | \
>> + (((gfn) << GHCB_MSR_PSC_GFN_POS) & GHCB_MSR_PSC_GFN_MASK) | GHCB_MSR_PSC_REQ)
>> +
>> +#define GHCB_MSR_PSC_RESP 0x015
>> +#define GHCB_MSR_PSC_ERROR_POS 32
>> +#define GHCB_MSR_PSC_ERROR_MASK 0xffffffffULL
>> +#define GHCB_MSR_PSC_RSVD_POS 12
>> +#define GHCB_MSR_PSC_RSVD_MASK 0xfffffULL
>> +#define GHCB_MSR_PSC_RESP_VAL(val) ((val) >> GHCB_MSR_PSC_ERROR_POS)
>> +
>> +/* SNP Page State Change NAE event */
>> +#define VMGEXIT_PSC_MAX_ENTRY 253
>> +#define VMGEXIT_PSC_INVALID_HEADER 0x100000001
>> +#define VMGEXIT_PSC_INVALID_ENTRY 0x100000002
>> +#define VMGEXIT_PSC_FIRMWARE_ERROR(x) ((x & 0xffffffffULL) | 0x200000000)
>> +
>> +struct __packed snp_page_state_header {
>> + u16 cur_entry;
>> + u16 end_entry;
>> + u32 reserved;
>> +};
>> +
>> +struct __packed snp_page_state_entry {
>> + u64 cur_page:12;
>> + u64 gfn:40;
>> + u64 operation:4;
>> + u64 pagesize:1;
>> + u64 reserved:7;
> Please write it like this:
>
> u64 cur_page : 12,
> gfn : 40,
> ...
>
> to show that all those fields are part of the same u64.
>
> struct perf_event_attr in include/uapi/linux/perf_event.h is a good
> example.
>
Ah, thanks for pointing. I will switch to using it.
>> +};
>> +
>> +struct __packed snp_page_state_change {
>> + struct snp_page_state_header header;
>> + struct snp_page_state_entry entry[VMGEXIT_PSC_MAX_ENTRY];
>> +};
>> +
>> #define GHCB_MSR_TERM_REQ 0x100
>> #define GHCB_MSR_TERM_REASON_SET_POS 12
>> #define GHCB_MSR_TERM_REASON_SET_MASK 0xf
>> diff --git a/arch/x86/include/uapi/asm/svm.h b/arch/x86/include/uapi/asm/svm.h
>> index 7fbc311e2de1..f7bf12cad58c 100644
>> --- a/arch/x86/include/uapi/asm/svm.h
>> +++ b/arch/x86/include/uapi/asm/svm.h
>> @@ -108,6 +108,7 @@
>> #define SVM_VMGEXIT_AP_JUMP_TABLE 0x80000005
>> #define SVM_VMGEXIT_SET_AP_JUMP_TABLE 0
>> #define SVM_VMGEXIT_GET_AP_JUMP_TABLE 1
>> +#define SVM_VMGEXIT_SNP_PAGE_STATE_CHANGE 0x80000010
> SVM_VMGEXIT_SNP_PSC
Noted.
>
>> #define SVM_VMGEXIT_HYPERVISOR_FEATURES 0x8000fffd
>> #define SVM_VMGEXIT_UNSUPPORTED_EVENT 0x8000ffff
>>
>> @@ -216,6 +217,7 @@
>> { SVM_VMGEXIT_NMI_COMPLETE, "vmgexit_nmi_complete" }, \
>> { SVM_VMGEXIT_AP_HLT_LOOP, "vmgexit_ap_hlt_loop" }, \
>> { SVM_VMGEXIT_AP_JUMP_TABLE, "vmgexit_ap_jump_table" }, \
>> + { SVM_VMGEXIT_SNP_PAGE_STATE_CHANGE, "vmgexit_page_state_change" }, \
> Ditto.
These strings are printed in the trace so I thought giving them a full
name makes sense
>
> Thx.
>
next prev parent reply other threads:[~2021-05-18 15:06 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-04-30 12:15 [PATCH Part1 RFC v2 00/20] Add AMD Secure Nested Paging (SEV-SNP) Guest Support Brijesh Singh
2021-04-30 12:15 ` [PATCH Part1 RFC v2 01/20] x86/sev: Define the GHCB MSR protocol for AP reset hold Brijesh Singh
2021-04-30 12:15 ` [PATCH Part1 RFC v2 02/20] x86/sev: Save the negotiated GHCB version Brijesh Singh
2021-05-11 9:23 ` Borislav Petkov
2021-05-11 18:29 ` Brijesh Singh
2021-05-11 18:41 ` Borislav Petkov
2021-05-12 14:03 ` Brijesh Singh
2021-05-12 14:31 ` Borislav Petkov
2021-05-12 15:03 ` Brijesh Singh
2021-04-30 12:15 ` [PATCH Part1 RFC v2 03/20] x86/sev: Add support for hypervisor feature VMGEXIT Brijesh Singh
2021-05-11 10:01 ` Borislav Petkov
2021-05-11 18:53 ` Brijesh Singh
2021-05-17 14:40 ` Borislav Petkov
2021-04-30 12:16 ` [PATCH Part1 RFC v2 04/20] x86/sev: Increase the GHCB protocol version Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 05/20] x86/sev: Define SNP Page State Change VMGEXIT structure Brijesh Singh
2021-05-18 10:41 ` Borislav Petkov
2021-05-18 15:06 ` Brijesh Singh [this message]
2021-04-30 12:16 ` [PATCH Part1 RFC v2 06/20] x86/sev: Define SNP guest request NAE events Brijesh Singh
2021-05-18 10:45 ` Borislav Petkov
2021-05-18 13:42 ` Brijesh Singh
2021-05-18 13:54 ` Borislav Petkov
2021-05-18 14:13 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 07/20] x86/sev: Define error codes for reason set 1 Brijesh Singh
2021-05-18 11:05 ` Borislav Petkov
2021-04-30 12:16 ` [PATCH Part1 RFC v2 08/20] x86/mm: Add sev_snp_active() helper Brijesh Singh
2021-05-18 18:11 ` Borislav Petkov
2021-05-19 17:28 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 09/20] x86/sev: check SEV-SNP features support Brijesh Singh
2021-05-20 16:02 ` Borislav Petkov
2021-05-20 17:40 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 10/20] x86/sev: Add a helper for the PVALIDATE instruction Brijesh Singh
2021-04-30 13:05 ` Brijesh Singh
2021-05-20 17:32 ` Borislav Petkov
2021-05-20 17:44 ` Brijesh Singh
2021-05-20 17:51 ` Borislav Petkov
2021-05-20 17:57 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 11/20] x86/compressed: Add helper for validating pages in the decompression stage Brijesh Singh
2021-05-20 17:52 ` Borislav Petkov
2021-05-20 18:05 ` Brijesh Singh
2021-05-25 10:18 ` Borislav Petkov
2021-04-30 12:16 ` [PATCH Part1 RFC v2 12/20] x86/compressed: Register GHCB memory when SEV-SNP is active Brijesh Singh
2021-05-25 10:41 ` Borislav Petkov
2021-04-30 12:16 ` [PATCH Part1 RFC v2 13/20] x86/sev: " Brijesh Singh
2021-05-25 11:11 ` Borislav Petkov
2021-05-25 14:28 ` Brijesh Singh
2021-05-25 14:35 ` Borislav Petkov
2021-05-25 14:47 ` Brijesh Singh
2021-05-26 9:57 ` Borislav Petkov
2021-05-26 13:23 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 14/20] x86/sev: Add helper for validating pages in early enc attribute changes Brijesh Singh
2021-05-26 10:39 ` Borislav Petkov
2021-05-26 13:34 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 15/20] x86/kernel: Make the bss.decrypted section shared in RMP table Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 16/20] x86/kernel: Validate rom memory before accessing when SEV-SNP is active Brijesh Singh
2021-05-27 11:49 ` Borislav Petkov
2021-05-27 12:12 ` Brijesh Singh
2021-05-27 12:23 ` Borislav Petkov
2021-05-27 12:56 ` Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 17/20] x86/mm: Add support to validate memory when changing C-bit Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 18/20] x86/boot: Add Confidential Computing address to setup_header Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 19/20] x86/sev: Register SNP guest request platform device Brijesh Singh
2021-04-30 12:16 ` [PATCH Part1 RFC v2 20/20] virt: Add SEV-SNP guest driver Brijesh Singh
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