From: Adrian Hunter <adrian.hunter@intel.com>
To: Kishon Vijay Abraham I <kishon@ti.com>,
Ulf Hansson <ulf.hansson@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>,
Tony Lindgren <tony@atomide.com>, Sekhar Nori <nsekhar@ti.com>,
Russell King <linux@armlinux.org.uk>,
Ravikumar Kattekola <rk@ti.com>,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/5] mmc: sdhci: Add quirk to indicate MMC_RSP_136 has CRC
Date: Mon, 28 Aug 2017 10:57:32 +0300 [thread overview]
Message-ID: <24fa9713-1367-08d7-54b6-b853e32fd6aa@intel.com> (raw)
In-Reply-To: <20170821074132.4622-3-kishon@ti.com>
On 21/08/17 10:41, Kishon Vijay Abraham I wrote:
> TI's implementation of sdhci controller used in DRA7 SoC's has
> CRC in responses with length 136 bits. Add quirk to indicate
> the controller has CRC in MMC_RSP_136. If this quirk is
> set sdhci library shouldn't shift the response present in
> SDHCI_RESPONSE register.
>
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> drivers/mmc/host/sdhci.c | 3 +++
> drivers/mmc/host/sdhci.h | 2 ++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index ba639b7851cb..9c8d7428df3c 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -1182,6 +1182,9 @@ static void sdhci_read_rsp_136(struct sdhci_host *host, struct mmc_command *cmd)
> cmd->resp[i] = sdhci_readl(host, reg);
> }
>
> + if (host->quirks2 & SDHCI_QUIRK2_RSP_136_HAS_CRC)
> + return;
> +
> /* CRC is stripped so we need to do some shifting */
> for (i = 0; i < 4; i++) {
> cmd->resp[i] <<= 8;
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 399edc681623..54bc444c317f 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -435,6 +435,8 @@ struct sdhci_host {
> #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14)
> /* Broken Clock divider zero in controller */
> #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
> +/* Controller has CRC in 136 bit Command Response */
> +#define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16)
>
> int irq; /* Device IRQ */
> void __iomem *ioaddr; /* Mapped address */
>
next prev parent reply other threads:[~2017-08-28 8:04 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-21 7:41 [PATCH 0/5] mmc: Add OMAP SDHCI driver Kishon Vijay Abraham I
2017-08-21 7:41 ` [PATCH 1/5] mmc: sdhci: Tidy reading 136-bit responses Kishon Vijay Abraham I
2017-08-30 13:13 ` Ulf Hansson
2017-08-21 7:41 ` [PATCH 2/5] mmc: sdhci: Add quirk to indicate MMC_RSP_136 has CRC Kishon Vijay Abraham I
2017-08-28 7:57 ` Adrian Hunter [this message]
2017-08-30 13:13 ` Ulf Hansson
2017-08-21 7:41 ` [PATCH 3/5] dt-bindings: ti-omap-hsmmc: Document new compatible for sdhci omap Kishon Vijay Abraham I
2017-08-21 14:21 ` Tony Lindgren
2017-08-22 13:39 ` [PATCH v2 3/5] dt-bindings: sdhci-omap: Add bindings for the sdhci-omap controller Kishon Vijay Abraham I
2017-08-22 17:39 ` Tony Lindgren
2017-08-23 5:42 ` [PATCH v3 " Kishon Vijay Abraham I
2017-08-23 13:07 ` Ulf Hansson
2017-08-23 13:56 ` Kishon Vijay Abraham I
2017-08-24 11:29 ` Ulf Hansson
2017-08-29 11:20 ` Kishon Vijay Abraham I
2017-08-29 11:50 ` Sebastian Reichel
2017-08-29 13:58 ` Tony Lindgren
2017-08-29 14:43 ` Tony Lindgren
2017-08-29 17:09 ` Rob Herring
2017-08-29 17:39 ` Tony Lindgren
2017-09-05 8:52 ` Kishon Vijay Abraham I
2017-09-05 16:51 ` Tony Lindgren
2017-08-29 17:11 ` Rob Herring
2017-09-05 8:53 ` Kishon Vijay Abraham I
2017-08-21 7:41 ` [PATCH 4/5] mmc: sdhci-omap: Add OMAP SDHCI driver Kishon Vijay Abraham I
2017-08-28 9:06 ` Adrian Hunter
2017-08-30 13:53 ` Kishon Vijay Abraham I
2017-08-31 13:02 ` Adrian Hunter
2017-09-05 8:57 ` Kishon Vijay Abraham I
2017-08-21 7:41 ` [PATCH 5/5] MAINTAINERS: Add TI OMAP SDHCI Maintainer Kishon Vijay Abraham I
2017-08-28 9:07 ` Adrian Hunter
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