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From: Jolly Shah <jolly.shah@xilinx.com>
To: Stephen Boyd <sboyd@kernel.org>,
	Jolly Shah <jolly.shah@xilinx.com>,
	arm@kernel.org, linux-clk@vger.kernel.org,
	michal.simek@xilinx.com, mturquette@baylibre.com, olof@lixom.net
Cc: rajanv@xilinx.com, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Tejas Patel <tejas.patel@xilinx.com>,
	Rajan Vaja <rajan.vaja@xilinx.com>
Subject: Re: [PATCH v2 2/2] drivers: clk: zynqmp: Update fraction clock check from custom type flags
Date: Thu, 28 May 2020 10:44:01 -0700	[thread overview]
Message-ID: <2c8cd31a-46ba-ec6a-67a7-f3d9abe561ff@xilinx.com> (raw)
In-Reply-To: <159054169658.88029.371843532116000844@swboyd.mtv.corp.google.com>

Hi Stephan,

Thanks for the review.

 > ------Original Message------
 > From: Stephen Boyd <sboyd@kernel.org>
 > Sent:  Tuesday, May 26, 2020 6:08PM
 > To: Jolly Shah <jolly.shah@xilinx.com>, Arm <arm@kernel.org>, 
Linux-clk <linux-clk@vger.kernel.org>, Michal Simek 
<michal.simek@xilinx.com>, Mturquette <mturquette@baylibre.com>, Olof 
<olof@lixom.net>
 > Cc: Rajan Vaja <rajanv@xilinx.com>, 
Linux-arm-kernel@lists.infradead.org 
<linux-arm-kernel@lists.infradead.org>, Linux-kernel@vger.kernel.org 
<linux-kernel@vger.kernel.org>, Tejas Patel <tejas.patel@xilinx.com>, 
Rajan Vaja <rajan.vaja@xilinx.com>, Jolly Shah <jolly.shah@xilinx.com>
 > Subject: Re: [PATCH v2 2/2] drivers: clk: zynqmp: Update fraction 
clock check from custom type flags
 >
> Quoting Jolly Shah (2020-03-12 14:31:39)
>> From: Tejas Patel <tejas.patel@xilinx.com>
>>
>> Older firmware version sets BIT(13) in clkflag to mark a
>> divider as fractional divider. Updated firmware version sets BIT(4)
>> in type flags to mark a divider as fractional divider since
>> BIT(13) is defined as CLK_DUTY_CYCLE_PARENT in the common clk
>> framework flags.
>>
>> To support both old and new firmware version, consider BIT(13) from
>> clkflag and BIT(4) from type_flag to check if divider is fractional
>> or not.
>>
>> To maintain compatibility BIT(13) of clkflag in firmware will not be
>> used in future for any purpose and will be marked as unused.
> 
> Why are we mixing the firmware flags with the ccf flags? They shouldn't
> be the same. The firmware should have its own 'flag numberspace' that is
> distinct from the common clk framework's 'flag numberspace'. Please fix
> the code.
> 

Yes firmware flags are using separate numberspace now. Firmware 
maintains CCF and firmware specific flags separately but earlier 
CLK_FRAC was mistakenly defined in ccf flagspace and hence handled here 
for backward compatibility. Driver takes care of not registering same 
with CCF. Let me know if I misunderstood.

Thanks,
Jolly Shah



  reply	other threads:[~2020-05-28 17:44 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-12 21:31 [PATCH v2 0/2] drivers: clk: zynqmp: Update fraction clock check from custom type flags Jolly Shah
2020-03-12 21:31 ` [PATCH v2 1/2] drivers: clk: zynqmp: Add support for " Jolly Shah
2020-05-27  1:01   ` Stephen Boyd
2020-03-12 21:31 ` [PATCH v2 2/2] drivers: clk: zynqmp: Update fraction clock check from " Jolly Shah
2020-05-27  1:01   ` Stephen Boyd
2020-05-27  1:08   ` Stephen Boyd
2020-05-28 17:44     ` Jolly Shah [this message]
2020-05-28 23:12       ` Stephen Boyd
2020-05-29 21:20         ` Jolly Shah
2020-03-23 21:15 ` [PATCH v2 0/2] " Jolly Shah
2020-04-09 20:48 ` Jolly Shah

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