From: Kai Huang <kai.huang@intel.com>
To: Dave Hansen <dave.hansen@intel.com>,
"Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
bp@alien8.de
Cc: aarcange@redhat.com, ak@linux.intel.com, brijesh.singh@amd.com,
dan.j.williams@intel.com, dave.hansen@linux.intel.com,
david@redhat.com, hpa@zytor.com, jgross@suse.com,
jmattson@google.com, joro@8bytes.org, jpoimboe@redhat.com,
knsathya@kernel.org, linux-kernel@vger.kernel.org,
luto@kernel.org, mingo@redhat.com, pbonzini@redhat.com,
peterz@infradead.org, sathyanarayanan.kuppuswamy@linux.intel.com,
sdeep@vmware.com, seanjc@google.com, tglx@linutronix.de,
thomas.lendacky@amd.com, tony.luck@intel.com,
vkuznets@redhat.com, wanpengli@tencent.com, x86@kernel.org
Subject: Re: [PATCHv7.1 02/30] x86/tdx: Provide common base for SEAMCALL and TDCALL C wrappers
Date: Tue, 05 Apr 2022 11:35:39 +1200 [thread overview]
Message-ID: <2fcd12bb42c7d30f0e7bd09a7f66d76122493b32.camel@intel.com> (raw)
In-Reply-To: <dd5c52ad-9c61-54c3-6654-7a30c56b1917@intel.com>
On Mon, 2022-04-04 at 06:51 -0700, Dave Hansen wrote:
> On 4/3/22 20:19, Kai Huang wrote:
> > Btw, I previous suggested perhaps we can just use -1ULL instead of above value
> > for TDX_SEAMCALL_VMFAILINVALID, but didn't get response. The reason is this
> > value will only be used when detecting P-SEAMLDR using P-SEAMLDR's SEAMLDR.INFO
> > SEAMCALL. Note your above SW-defined error codes is based on error code
> > definition for TDX module, but actually P-SEAMLDR has different error code
> > definition:
>
> I suggested moving away from the -1 because it didn't really carry any
> additional information. For folks that have the spec open day in and
> day out, it's easy for you to go look up what the components of that -1
> _mean_.
>
> It sounds like there's a bug here (mixing up the P-SEAMLDR and TDX
> module error ABIs), but that doesn't mean that moving to -1 is the right
> answer.
I think it doesn't need to carry any additional information. The error code is
used to represent VMfailInvalid, which happens before any P-SEAMLDR and TDX
module internal functionality is reached. We just need a value which will
*never* conflict with actual error code returned by P-SEAMLDR and TDX module to
represent this case.
Both error code formats defined by P-SEAMLDR and TDX module has some reserved
bits which will never be set to 1. I think we can just add a simple comment
explaining that and choose a value which has 1 set for those reserved bits (even
doesn't have to be -1). For example:
/*
* Use -1ULL which will never conflict with any actual error code
* returned by both the P-SEAMLDR and the TDX module to represent
* VMfailInvalid. Both error code definitions defined by the
* P-SEAMLDR and the TDX module have some reserved bits which will
* never be set to 1.
*/
#define TDX_SEAMCALL_VMFAILINVALID GENMASK_ULL(63, 0)
>
> Please just build up an error value the same way it was done for the
> software-defined TDX module error codes.
In this way the assembly code will need to set different value based on whether
%rax is a P-SEAMLDR leaf function and TDX module leaf function. I think it's
unnecessary. As I said above, I think this error doesn't need to have any
additional information. We just need a value which will never conflict with any
actual error code from P-SEAMLDR and TDX module.
--
Thanks,
-Kai
next prev parent reply other threads:[~2022-04-04 23:37 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-18 15:30 [PATCHv7 00/30] TDX Guest: TDX core support Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 01/30] x86/tdx: Detect running as a TDX guest in early boot Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 02/30] x86/tdx: Provide common base for SEAMCALL and TDCALL C wrappers Kirill A. Shutemov
2022-03-19 14:48 ` Borislav Petkov
2022-03-21 15:52 ` Kirill A. Shutemov
2022-03-21 16:02 ` [PATCHv7.1 " Kirill A. Shutemov
2022-04-04 3:19 ` Kai Huang
2022-04-04 3:25 ` Kai Huang
2022-04-04 13:51 ` Dave Hansen
2022-04-04 23:35 ` Kai Huang [this message]
2022-04-05 0:01 ` Dave Hansen
2022-04-05 0:23 ` Kai Huang
2022-04-08 20:12 ` Dave Hansen
2022-03-18 15:30 ` [PATCHv7 03/30] x86/tdx: Add __tdx_module_call() and __tdx_hypercall() helper functions Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 04/30] x86/tdx: Extend the confidential computing API to support TDX guests Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 05/30] x86/tdx: Exclude shared bit from __PHYSICAL_MASK Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 06/30] x86/traps: Refactor exc_general_protection() Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 07/30] x86/traps: Add #VE support for TDX guest Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 08/30] x86/tdx: Add HLT support for TDX guests Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 09/30] x86/tdx: Add MSR " Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 10/30] x86/tdx: Handle CPUID via #VE Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 11/30] x86/tdx: Handle in-kernel MMIO Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 12/30] x86/tdx: Detect TDX at early kernel decompression time Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 13/30] x86: Adjust types used in port I/O helpers Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 14/30] x86: Consolidate " Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 15/30] x86/boot: Port I/O: allow to hook up alternative helpers Kirill A. Shutemov
2022-03-18 16:04 ` [PATCHv7.1 " Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 16/30] x86/boot: Port I/O: add decompression-time support for TDX Kirill A. Shutemov
2022-03-18 16:05 ` [PATCHv7.1 " Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 17/30] x86/tdx: Port I/O: add runtime hypercalls Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 18/30] x86/tdx: Port I/O: add early boot support Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 19/30] x86/tdx: Wire up KVM hypercalls Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 20/30] x86/boot: Add a trampoline for booting APs via firmware handoff Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 21/30] x86/acpi, x86/boot: Add multiprocessor wake-up support Kirill A. Shutemov
2022-03-18 18:23 ` Dave Hansen
2022-03-18 19:22 ` Dave Hansen
2022-03-24 15:24 ` Kirill A. Shutemov
2022-03-28 19:17 ` Dave Hansen
2022-03-30 23:16 ` Kirill A. Shutemov
2022-03-30 23:44 ` Dave Hansen
2022-03-31 1:52 ` Kirill A. Shutemov
2022-04-01 17:33 ` Dave Hansen
2022-03-18 15:30 ` [PATCHv7 22/30] x86/boot: Set CR0.NE early and keep it set during the boot Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 23/30] x86/boot: Avoid #VE during boot for TDX platforms Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 24/30] x86/topology: Disable CPU online/offline control for TDX guests Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 25/30] x86/tdx: Make pages shared in ioremap() Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 26/30] x86/mm/cpa: Add support for TDX shared memory Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 27/30] x86/mm: Make DMA memory shared for TD guest Kirill A. Shutemov
2022-03-18 15:53 ` Dave Hansen
2022-03-18 15:30 ` [PATCHv7 28/30] x86/tdx: ioapic: Add shared bit for IOAPIC base address Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 29/30] ACPICA: Avoid cache flush inside virtual machines Kirill A. Shutemov
2022-03-18 15:30 ` [PATCHv7 30/30] Documentation/x86: Document TDX kernel architecture Kirill A. Shutemov
2022-04-04 4:32 ` Kai Huang
2022-04-04 6:25 ` Dave Hansen
2022-04-04 7:23 ` Kai Huang
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