* [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest @ 2019-07-11 5:49 Jing Liu 2019-07-13 10:37 ` Paolo Bonzini 0 siblings, 1 reply; 6+ messages in thread From: Jing Liu @ 2019-07-11 5:49 UTC (permalink / raw) To: kvm; +Cc: pbonzini, linux-kernel, Jing Liu AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point format (BF16) for deep learning optimization. Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. Detailed information of the CPUID bit can be found here, https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> --- This patch depends on kernel patch https://lkml.org/lkml/2019/6/19/912 and Paolo's patch set https://lkml.org/lkml/2019/7/4/468. arch/x86/kvm/cpuid.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 8fc6039..0c125dd 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -358,9 +358,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | F(MD_CLEAR); + /* cpuid 7.1.eax */ + const u32 kvm_cpuid_7_1_eax_x86_features = + F(AVX512_BF16); + switch (index) { case 0: - entry->eax = 0; + entry->eax = min(entry->eax, 1); entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; cpuid_mask(&entry->ebx, CPUID_7_0_EBX); /* TSC_ADJUST is emulated */ @@ -384,6 +388,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) */ entry->edx |= F(ARCH_CAPABILITIES); break; + case 1: + entry->eax &= kvm_cpuid_7_1_eax_x86_features; + entry->ebx = 0; + entry->ecx = 0; + entry->edx = 0; + break; default: WARN_ON_ONCE(1); entry->eax = 0; -- 1.8.3.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest 2019-07-11 5:49 [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest Jing Liu @ 2019-07-13 10:37 ` Paolo Bonzini 2019-07-15 2:46 ` Jing Liu 2019-07-15 6:06 ` Wanpeng Li 0 siblings, 2 replies; 6+ messages in thread From: Paolo Bonzini @ 2019-07-13 10:37 UTC (permalink / raw) To: Jing Liu, kvm; +Cc: linux-kernel On 11/07/19 07:49, Jing Liu wrote: > AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point > format (BF16) for deep learning optimization. > > Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. > > Detailed information of the CPUID bit can be found here, > https://software.intel.com/sites/default/files/managed/c5/15/\ > architecture-instruction-set-extensions-programming-reference.pdf. > > Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> > --- > > This patch depends on kernel patch https://lkml.org/lkml/2019/6/19/912 > and Paolo's patch set https://lkml.org/lkml/2019/7/4/468. > > arch/x86/kvm/cpuid.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 8fc6039..0c125dd 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -358,9 +358,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) > F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | > F(MD_CLEAR); > > + /* cpuid 7.1.eax */ > + const u32 kvm_cpuid_7_1_eax_x86_features = > + F(AVX512_BF16); > + > switch (index) { > case 0: > - entry->eax = 0; > + entry->eax = min(entry->eax, 1); > entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; > cpuid_mask(&entry->ebx, CPUID_7_0_EBX); > /* TSC_ADJUST is emulated */ > @@ -384,6 +388,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) > */ > entry->edx |= F(ARCH_CAPABILITIES); > break; > + case 1: > + entry->eax &= kvm_cpuid_7_1_eax_x86_features; > + entry->ebx = 0; > + entry->ecx = 0; > + entry->edx = 0; > + break; > default: > WARN_ON_ONCE(1); > entry->eax = 0; > Queued, thanks. Paolo ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest 2019-07-13 10:37 ` Paolo Bonzini @ 2019-07-15 2:46 ` Jing Liu 2019-07-15 6:06 ` Wanpeng Li 1 sibling, 0 replies; 6+ messages in thread From: Jing Liu @ 2019-07-15 2:46 UTC (permalink / raw) To: Paolo Bonzini, kvm; +Cc: linux-kernel Hi Paolo, Thanks for your reviewing! There also has Qemu patch sent here, https://www.mail-archive.com/qemu-devel@nongnu.org/msg630359.html Could you please review that? Thanks very much! Jing On 7/13/2019 6:37 PM, Paolo Bonzini wrote: > On 11/07/19 07:49, Jing Liu wrote: >> AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point >> format (BF16) for deep learning optimization. >> >> Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. >> >> Detailed information of the CPUID bit can be found here, >> https://software.intel.com/sites/default/files/managed/c5/15/\ >> architecture-instruction-set-extensions-programming-reference.pdf. >> >> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >> --- >> >> This patch depends on kernel patch https://lkml.org/lkml/2019/6/19/912 >> and Paolo's patch set https://lkml.org/lkml/2019/7/4/468. >> >> arch/x86/kvm/cpuid.c | 12 +++++++++++- >> 1 file changed, 11 insertions(+), 1 deletion(-) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index 8fc6039..0c125dd 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -358,9 +358,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) >> F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | >> F(MD_CLEAR); >> >> + /* cpuid 7.1.eax */ >> + const u32 kvm_cpuid_7_1_eax_x86_features = >> + F(AVX512_BF16); >> + >> switch (index) { >> case 0: >> - entry->eax = 0; >> + entry->eax = min(entry->eax, 1); >> entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; >> cpuid_mask(&entry->ebx, CPUID_7_0_EBX); >> /* TSC_ADJUST is emulated */ >> @@ -384,6 +388,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) >> */ >> entry->edx |= F(ARCH_CAPABILITIES); >> break; >> + case 1: >> + entry->eax &= kvm_cpuid_7_1_eax_x86_features; >> + entry->ebx = 0; >> + entry->ecx = 0; >> + entry->edx = 0; >> + break; >> default: >> WARN_ON_ONCE(1); >> entry->eax = 0; >> > > Queued, thanks. > > Paolo > ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest 2019-07-13 10:37 ` Paolo Bonzini 2019-07-15 2:46 ` Jing Liu @ 2019-07-15 6:06 ` Wanpeng Li 2019-07-15 11:05 ` Jing Liu 1 sibling, 1 reply; 6+ messages in thread From: Wanpeng Li @ 2019-07-15 6:06 UTC (permalink / raw) To: Paolo Bonzini; +Cc: Jing Liu, kvm, LKML On Sat, 13 Jul 2019 at 18:40, Paolo Bonzini <pbonzini@redhat.com> wrote: > > On 11/07/19 07:49, Jing Liu wrote: > > AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point > > format (BF16) for deep learning optimization. > > > > Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. > > > > Detailed information of the CPUID bit can be found here, > > https://software.intel.com/sites/default/files/managed/c5/15/\ > > architecture-instruction-set-extensions-programming-reference.pdf. > > > > Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> > > --- > > > > This patch depends on kernel patch https://lkml.org/lkml/2019/6/19/912 > > and Paolo's patch set https://lkml.org/lkml/2019/7/4/468. > > > > arch/x86/kvm/cpuid.c | 12 +++++++++++- > > 1 file changed, 11 insertions(+), 1 deletion(-) > > > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > > index 8fc6039..0c125dd 100644 > > --- a/arch/x86/kvm/cpuid.c > > +++ b/arch/x86/kvm/cpuid.c > > @@ -358,9 +358,13 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) > > F(SPEC_CTRL_SSBD) | F(ARCH_CAPABILITIES) | F(INTEL_STIBP) | > > F(MD_CLEAR); > > > > + /* cpuid 7.1.eax */ > > + const u32 kvm_cpuid_7_1_eax_x86_features = > > + F(AVX512_BF16); > > + > > switch (index) { > > case 0: > > - entry->eax = 0; > > + entry->eax = min(entry->eax, 1); > > entry->ebx &= kvm_cpuid_7_0_ebx_x86_features; > > cpuid_mask(&entry->ebx, CPUID_7_0_EBX); > > /* TSC_ADJUST is emulated */ > > @@ -384,6 +388,12 @@ static inline void do_cpuid_7_mask(struct kvm_cpuid_entry2 *entry, int index) > > */ > > entry->edx |= F(ARCH_CAPABILITIES); > > break; > > + case 1: > > + entry->eax &= kvm_cpuid_7_1_eax_x86_features; > > + entry->ebx = 0; > > + entry->ecx = 0; > > + entry->edx = 0; > > + break; > > default: > > WARN_ON_ONCE(1); > > entry->eax = 0; > > > > Queued, thanks. I see this in kvm/queue: In file included from ./include/linux/list.h:9:0, from ./include/linux/preempt.h:11, from ./include/linux/hardirq.h:5, from ./include/linux/kvm_host.h:7, from /home/kernel/data/kvm/arch/x86/kvm//cpuid.c:12: /home/kernel/data/kvm/arch/x86/kvm//cpuid.c: In function ‘do_cpuid_7_mask’: ./include/linux/kernel.h:819:29: warning: comparison of distinct pointer types lacks a cast (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) ^ ./include/linux/kernel.h:833:4: note: in expansion of macro ‘__typecheck’ (__typecheck(x, y) && __no_side_effects(x, y)) ^ ./include/linux/kernel.h:843:24: note: in expansion of macro ‘__safe_cmp’ __builtin_choose_expr(__safe_cmp(x, y), \ ^ ./include/linux/kernel.h:852:19: note: in expansion of macro ‘__careful_cmp’ #define min(x, y) __careful_cmp(x, y, <) ^ /home/kernel/data/kvm/arch/x86/kvm//cpuid.c:377:16: note: in expansion of macro ‘min’ entry->eax = min(entry->eax, 1); ^ ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest 2019-07-15 6:06 ` Wanpeng Li @ 2019-07-15 11:05 ` Jing Liu 2019-07-15 11:56 ` Paolo Bonzini 0 siblings, 1 reply; 6+ messages in thread From: Jing Liu @ 2019-07-15 11:05 UTC (permalink / raw) To: Wanpeng Li, Paolo Bonzini; +Cc: kvm, LKML On 7/15/2019 2:06 PM, Wanpeng Li wrote: > On Sat, 13 Jul 2019 at 18:40, Paolo Bonzini <pbonzini@redhat.com> wrote: >> >> On 11/07/19 07:49, Jing Liu wrote: >>> AVX512 BFLOAT16 instructions support 16-bit BFLOAT16 floating-point >>> format (BF16) for deep learning optimization. >>> >>> Intel adds AVX512 BFLOAT16 feature in CooperLake, which is CPUID.7.1.EAX[5]. >>> >>> Detailed information of the CPUID bit can be found here, >>> https://software.intel.com/sites/default/files/managed/c5/15/\ >>> architecture-instruction-set-extensions-programming-reference.pdf. >>> >>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>> --- >>> [...] > /home/kernel/data/kvm/arch/x86/kvm//cpuid.c: In function ‘do_cpuid_7_mask’: > ./include/linux/kernel.h:819:29: warning: comparison of distinct > pointer types lacks a cast > (!!(sizeof((typeof(x) *)1 == (typeof(y) *)1))) > ^ > ./include/linux/kernel.h:833:4: note: in expansion of macro ‘__typecheck’ > (__typecheck(x, y) && __no_side_effects(x, y)) > ^ > ./include/linux/kernel.h:843:24: note: in expansion of macro ‘__safe_cmp’ > __builtin_choose_expr(__safe_cmp(x, y), \ > ^ > ./include/linux/kernel.h:852:19: note: in expansion of macro ‘__careful_cmp’ > #define min(x, y) __careful_cmp(x, y, <) > ^ > /home/kernel/data/kvm/arch/x86/kvm//cpuid.c:377:16: note: in expansion > of macro ‘min’ > entry->eax = min(entry->eax, 1); > ^ > Thanks for the information. This warning would be fixed by changing to entry->eax = min(entry->eax, (u32)1); @Paolo, sorry for trouble. Would you mind if I re-send? Jing ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest 2019-07-15 11:05 ` Jing Liu @ 2019-07-15 11:56 ` Paolo Bonzini 0 siblings, 0 replies; 6+ messages in thread From: Paolo Bonzini @ 2019-07-15 11:56 UTC (permalink / raw) To: Jing Liu, Wanpeng Li; +Cc: kvm, LKML On 15/07/19 13:05, Jing Liu wrote: >> >> > Thanks for the information. > > This warning would be fixed by changing to > entry->eax = min(entry->eax, (u32)1); > > @Paolo, sorry for trouble. Would you mind if I re-send? No need, I can fix it myself (I'd also use 1u instead of the cast). Paolo ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-07-15 11:56 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-07-11 5:49 [PATCH v1] KVM: x86: expose AVX512_BF16 feature to guest Jing Liu 2019-07-13 10:37 ` Paolo Bonzini 2019-07-15 2:46 ` Jing Liu 2019-07-15 6:06 ` Wanpeng Li 2019-07-15 11:05 ` Jing Liu 2019-07-15 11:56 ` Paolo Bonzini
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