linux-kernel.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Thomas Hellström (VMware)" <thomas_os@shipmail.org>
To: Andy Lutomirski <luto@amacapital.net>
Cc: "Andy Lutomirski" <luto@kernel.org>,
	"Dave Hansen" <dave.hansen@intel.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	dri-devel <dri-devel@lists.freedesktop.org>,
	pv-drivers@vmware.com,
	"VMware Graphics" <linux-graphics-maintainer@vmware.com>,
	"Linux Kernel Mailing List" <linux-kernel@vger.kernel.org>,
	"Tom Lendacky" <thomas.lendacky@amd.com>,
	"Thomas Hellstrom" <thellstrom@vmware.com>,
	"Peter Zijlstra" <peterz@infradead.org>,
	"Dave Hansen" <dave.hansen@linux.intel.com>,
	"Heiko Carstens" <heiko.carstens@de.ibm.com>,
	"Christian Borntraeger" <borntraeger@de.ibm.com>,
	"Ingo Molnar" <mingo@redhat.com>,
	"Borislav Petkov" <bp@alien8.de>,
	"H. Peter Anvin" <hpa@zytor.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption
Date: Wed, 4 Sep 2019 08:49:03 +0200	[thread overview]
Message-ID: <3393108b-c7e3-c9be-b65b-5860c15ca228@shipmail.org> (raw)
In-Reply-To: <B3C5DD1B-A33C-417F-BDDC-73120A035EA5@amacapital.net>

On 9/4/19 1:15 AM, Andy Lutomirski wrote:
>
>> On Sep 3, 2019, at 3:15 PM, Thomas Hellström (VMware) <thomas_os@shipmail.org> wrote:
>>
>>> On 9/4/19 12:08 AM, Thomas Hellström (VMware) wrote:
>>>> On 9/3/19 11:46 PM, Andy Lutomirski wrote:
>>>> On Tue, Sep 3, 2019 at 2:05 PM Thomas Hellström (VMware)
>>>> <thomas_os@shipmail.org> wrote:
>>>>> On 9/3/19 10:51 PM, Dave Hansen wrote:
>>>>>>> On 9/3/19 1:36 PM, Thomas Hellström (VMware) wrote:
>>>>>>> So the question here should really be, can we determine already at mmap
>>>>>>> time whether backing memory will be unencrypted and adjust the *real*
>>>>>>> vma->vm_page_prot under the mmap_sem?
>>>>>>>
>>>>>>> Possibly, but that requires populating the buffer with memory at mmap
>>>>>>> time rather than at first fault time.
>>>>>> I'm not connecting the dots.
>>>>>>
>>>>>> vma->vm_page_prot is used to create a VMA's PTEs regardless of if they
>>>>>> are created at mmap() or fault time.  If we establish a good
>>>>>> vma->vm_page_prot, can't we just use it forever for demand faults?
>>>>> With SEV I think that we could possibly establish the encryption flags
>>>>> at vma creation time. But thinking of it, it would actually break with
>>>>> SME where buffer content can be moved between encrypted system memory
>>>>> and unencrypted graphics card PCI memory behind user-space's back. That
>>>>> would imply killing all user-space encrypted PTEs and at fault time set
>>>>> up new ones pointing to unencrypted PCI memory..
>>>>>
>>>>>> Or, are you concerned that if an attempt is made to demand-fault page
>>>>>> that's incompatible with vma->vm_page_prot that we have to SEGV?
>>>>>>
>>>>>>> And it still requires knowledge whether the device DMA is always
>>>>>>> unencrypted (or if SEV is active).
>>>>>> I may be getting mixed up on MKTME (the Intel memory encryption) and
>>>>>> SEV.  Is SEV supported on all memory types?  Page cache, hugetlbfs,
>>>>>> anonymous?  Or just anonymous?
>>>>> SEV AFAIK encrypts *all* memory except DMA memory. To do that it uses a
>>>>> SWIOTLB backed by unencrypted memory, and it also flips coherent DMA
>>>>> memory to unencrypted (which is a very slow operation and patch 4 deals
>>>>> with caching such memory).
>>>>>
>>>> I'm still lost.  You have some fancy VMA where the backing pages
>>>> change behind the application's back.  This isn't particularly novel
>>>> -- plain old anonymous memory and plain old mapped files do this too.
>>>> Can't you all the insert_pfn APIs and call it a day?  What's so
>>>> special that you need all this magic?  ISTM you should be able to
>>>> allocate memory that's addressable by the device (dma_alloc_coherent()
>>>> or whatever) and then map it into user memory just like you'd map any
>>>> other page.
>>>>
>>>> I feel like I'm missing something here.
>>> Yes, so in this case we use dma_alloc_coherent().
>>>
>>> With SEV, that gives us unencrypted pages. (Pages whose linear kernel map is marked unencrypted). With SME that (typcially) gives us encrypted pages. In both these cases, vm_get_page_prot() returns
>>> an encrypted page protection, which lands in vma->vm_page_prot.
>>>
>>> In the SEV case, we therefore need to modify the page protection to unencrypted. Hence we need to know whether we're running under SEV and therefore need to modify the protection. If not, the user-space PTE would incorrectly have the encryption flag set.
>>>
> I’m still confused. You got unencrypted pages with an unencrypted PFN. Why do you need to fiddle?  You have a PFN, and you’re inserting it with vmf_insert_pfn().  This should just work, no?

OK now I see what causes the confusion.

With SEV, the encryption state is, while *physically* encoded in an 
address bit, from what I can tell, not *logically* encoded in the pfn, 
but in the page_prot for cpu mapping purposes.  That is, page_to_pfn()  
returns the same pfn whether the page is encrypted or unencrypted. Hence 
nobody can't tell from the pfn whether the page is unencrypted or encrypted.

For device DMA address purposes, the encryption status is encoded in the 
dma address by the dma layer in phys_to_dma().


>   There doesn’t seem to be any real funny business in dma_mmap_attrs() or dma_common_mmap().

No, from what I can tell the call in these functions to dma_pgprot() 
generates an incorrect page protection since it doesn't take unencrypted 
coherent memory into account. I don't think anybody has used these 
functions yet with SEV.

>
> But, reading this, I have more questions:
>
> Can’t you get rid of cvma by using vmf_insert_pfn_prot()?

It looks like that, although there are comments in the code about 
serious performance problems using VM_PFNMAP / vmf_insert_pfn() with 
write-combining and PAT, so that would require some serious testing with 
hardware I don't have. But I guess there is definitely room for 
improvement here. Ideally we'd like to be able to change the 
vma->vm_page_prot within fault(). But we can

>
> Would it make sense to add a vmf_insert_dma_page() to directly do exactly what you’re trying to do?

Yes, but as a longer term solution I would prefer a general dma_pgprot() 
exported, so that we could, in a dma-compliant way, use coherent pages 
with other apis, like kmap_atomic_prot() and vmap(). That is, basically 
split coherent page allocation in two steps: Allocation and mapping.

>
> And a broader question just because I’m still confused: why isn’t the encryption bit in the PFN?  The whole SEV/SME system seems like it’s trying a bit to hard to be fully invisible to the kernel.

I guess you'd have to ask AMD about that. But my understanding is that 
encoding it in an address bit does make it trivial to do decryption / 
encryption on the fly to DMA devices that are not otherwise aware of it, 
just by handing them a special physical address. For cpu mapping 
purposes it might become awkward to encode it in the pfn since 
pfn_to_page and friends would need knowledge about this. Personally I 
think it would have made sense to track it like PAT in track_pfn_insert().

Thanks,

Thomas




  reply	other threads:[~2019-09-04  6:49 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-03 13:15 [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 1/4] x86/mm: Export force_dma_unencrypted Thomas Hellström (VMware)
2019-09-03 13:46   ` Christoph Hellwig
2019-09-03 14:32     ` Thomas Hellström (VMware)
2019-09-03 16:22       ` Christoph Hellwig
2019-09-03 20:46         ` Thomas Hellström (VMware)
2019-09-03 21:41           ` Andy Lutomirski
2019-09-04  6:58           ` Christoph Hellwig
2019-09-04  7:32             ` Thomas Hellström (VMware)
2019-09-04 12:22               ` Christoph Hellwig
2019-09-04 17:28                 ` Thomas Hellström (VMware)
2019-09-03 15:14   ` Dave Hansen
2019-09-03 18:50     ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 2/4] s390/mm: " Thomas Hellström (VMware)
2019-09-03 13:46   ` Christoph Hellwig
2019-09-03 13:15 ` [PATCH v2 3/4] drm/ttm, drm/vmwgfx: Correctly support support AMD memory encryption Thomas Hellström (VMware)
2019-09-03 19:38   ` Dave Hansen
2019-09-03 19:51     ` Daniel Vetter
2019-09-03 19:55       ` Dave Hansen
2019-09-03 20:36         ` Thomas Hellström (VMware)
2019-09-03 20:51           ` Dave Hansen
2019-09-03 21:05             ` Thomas Hellström (VMware)
2019-09-03 21:46               ` Andy Lutomirski
2019-09-03 22:08                 ` Thomas Hellström (VMware)
2019-09-03 22:15                   ` Thomas Hellström (VMware)
2019-09-03 23:10                     ` Dave Hansen
2019-09-04  8:34                       ` Thomas Hellström (VMware)
2019-09-03 23:15                     ` Andy Lutomirski
2019-09-04  6:49                       ` Thomas Hellström (VMware) [this message]
2019-09-04  7:53                         ` Daniel Vetter
2019-09-04 10:37                           ` Thomas Hellström (VMware)
2019-09-04 11:43                             ` Daniel Vetter
2019-09-04 18:16                         ` Christoph Hellwig
2019-09-04  7:33               ` Koenig, Christian
2019-09-04  8:19                 ` Thomas Hellström (VMware)
2019-09-04  8:42                   ` Thomas Hellström (VMware)
2019-09-04 11:10                   ` Koenig, Christian
2019-09-04 12:35                     ` Thomas Hellström (VMware)
2019-09-04 13:05                       ` Thomas Hellström (VMware)
2019-09-03 13:15 ` [PATCH v2 4/4] drm/ttm: Cache dma pool decrypted pages when AMD SEV is active Thomas Hellström (VMware)
2019-09-03 15:18 ` [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Daniel Vetter
2019-09-05 10:43 ` Thomas Hellström (VMware)

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3393108b-c7e3-c9be-b65b-5860c15ca228@shipmail.org \
    --to=thomas_os@shipmail.org \
    --cc=borntraeger@de.ibm.com \
    --cc=bp@alien8.de \
    --cc=christian.koenig@amd.com \
    --cc=daniel@ffwll.ch \
    --cc=dave.hansen@intel.com \
    --cc=dave.hansen@linux.intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=heiko.carstens@de.ibm.com \
    --cc=hpa@zytor.com \
    --cc=linux-graphics-maintainer@vmware.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=luto@amacapital.net \
    --cc=luto@kernel.org \
    --cc=mingo@redhat.com \
    --cc=peterz@infradead.org \
    --cc=pv-drivers@vmware.com \
    --cc=tglx@linutronix.de \
    --cc=thellstrom@vmware.com \
    --cc=thomas.lendacky@amd.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).