From: "Heiko Stübner" <heiko@sntech.de>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Yakir Yang <ykk@rock-chips.com>, Inki Dae <inki.dae@samsung.com>,
Andrzej Hajda <a.hajda@samsung.com>,
Joonyoung Shim <jy0922.shim@samsung.com>,
Seung-Woo Kim <sw0312.kim@samsung.com>,
Kyungmin Park <kyungmin.park@samsung.com>,
Jingoo Han <jingoohan1@gmail.com>,
Thierry Reding <treding@nvidia.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
joe@perches.com, Mark Yao <mark.yao@rock-chips.com>,
Russell King <linux@arm.linux.org.uk>,
djkurtz@chromium.org, dianders@chromium.org,
Sean Paul <seanpaul@chromium.org>, Kukjin Kim <kgene@kernel.org>,
Kumar Gala <galak@codeaurora.org>,
emil.l.velikov@gmail.com,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Gustavo Padovan <gustavo.padovan@collabora.co.uk>,
Pawel Moll <pawel.moll@arm.com>,
ajaynumb@gmail.com, robherring2@gmail.com,
javier@osg.samsung.com, Andy Yan <andy.yan@rock-chips.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-samsung-soc@vger.kernel.org,
linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY
Date: Mon, 12 Oct 2015 18:18:41 +0200 [thread overview]
Message-ID: <3399683.FyIv57FCEM@diego> (raw)
In-Reply-To: <561BCB97.3030201@ti.com>
Am Montag, 12. Oktober 2015, 20:32:47 schrieb Kishon Vijay Abraham I:
> Hi,
>
> On Saturday 10 October 2015 09:25 PM, Yakir Yang wrote:
> > This phy driver would control the Rockchip DisplayPort module
> > phy clock and phy power, it is relate to analogix_dp-rockchip
> > dp driver. If you want DP works rightly on rockchip platform,
> > then you should select both of them.
>
> Add phy driver for the Rockchip DisplayPort PHY module. This is required
> to get DisplayPort working in Rockchip SoCs.
>
> > Signed-off-by: Yakir Yang <ykk@rock-chips.com>
> > ---
> > Changes in v6: None
> > Changes in v5:
> > - Remove "reg" DT property, cause driver could poweron/poweroff phy via
> >
> > the exist "grf" syscon already. And rename the example DT node from
> > "edp_phy: phy@ff770274" to "edp_phy: edp-phy" directly. (Heiko)
> >
> > - Add deivce_node at the front of driver, update phy_ops type from "static
> >
> > struct" to "static const struct". And correct the input paramters of
> > devm_phy_create() interfaces. (Heiko)
> >
> > Changes in v4:
> > - Add commit message, and remove the redundant rockchip_dp_phy_init()
> >
> > function, move those code to probe() method. And remove driver .owner
> > number. (Kishon)
> >
> > Changes in v3:
> > - Suggest, add rockchip dp phy driver, collect the phy clocks and
> >
> > power control. (Heiko)
> >
> > Changes in v2: None
> >
> > drivers/phy/Kconfig | 7 ++
> > drivers/phy/Makefile | 1 +
> > drivers/phy/phy-rockchip-dp.c | 151
> > ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 159
> > insertions(+)
> > create mode 100644 drivers/phy/phy-rockchip-dp.c
> >
> > diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> > index 47da573..8f2bc4f 100644
> > --- a/drivers/phy/Kconfig
> > +++ b/drivers/phy/Kconfig
> > @@ -310,6 +310,13 @@ config PHY_ROCKCHIP_USB
> >
> > help
> >
> > Enable this to support the Rockchip USB 2.0 PHY.
> >
> > +config PHY_ROCKCHIP_DP
> > + tristate "Rockchip Display Port PHY Driver"
> > + depends on ARCH_ROCKCHIP && OF
> > + select GENERIC_PHY
> > + help
> > + Enable this to support the Rockchip Display Port PHY.
> > +
> >
> > config PHY_ST_SPEAR1310_MIPHY
> >
> > tristate "ST SPEAR1310-MIPHY driver"
> > select GENERIC_PHY
> >
> > diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> > index a5b18c1..e281f35 100644
> > --- a/drivers/phy/Makefile
> > +++ b/drivers/phy/Makefile
> > @@ -34,6 +34,7 @@ phy-exynos-usb2-$(CONFIG_PHY_S5PV210_USB2) +=
> > phy-s5pv210-usb2.o>
> > obj-$(CONFIG_PHY_EXYNOS5_USBDRD) += phy-exynos5-usbdrd.o
> > obj-$(CONFIG_PHY_QCOM_APQ8064_SATA) += phy-qcom-apq8064-sata.o
> > obj-$(CONFIG_PHY_ROCKCHIP_USB) += phy-rockchip-usb.o
> >
> > +obj-$(CONFIG_PHY_ROCKCHIP_DP) += phy-rockchip-dp.o
> >
> > obj-$(CONFIG_PHY_QCOM_IPQ806X_SATA) += phy-qcom-ipq806x-sata.o
> > obj-$(CONFIG_PHY_ST_SPEAR1310_MIPHY) += phy-spear1310-miphy.o
> > obj-$(CONFIG_PHY_ST_SPEAR1340_MIPHY) += phy-spear1340-miphy.o
> >
> > diff --git a/drivers/phy/phy-rockchip-dp.c b/drivers/phy/phy-rockchip-dp.c
> > new file mode 100644
> > index 0000000..3a2ac120
> > --- /dev/null
> > +++ b/drivers/phy/phy-rockchip-dp.c
> > @@ -0,0 +1,151 @@
> > +/*
> > + * Rockchip DP PHY driver
> > + *
> > + * Copyright (C) 2015 FuZhou Rockchip Co., Ltd.
> > + * Author: Yakir Yang <ykk@@rock-chips.com>
> > + *
> > + * This program is free software; you can redistribute it and/or modify
> > + * it under the terms of the GNU General Public License as published by
> > + * the Free Software Foundation; either version 2 of the License.
> > + */
> > +
> > +#include <linux/io.h>
> > +#include <linux/kernel.h>
> > +#include <linux/module.h>
> > +#include <linux/of.h>
> > +#include <linux/of_address.h>
> > +#include <linux/clk.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/regmap.h>
> > +#include <linux/mfd/syscon.h>
> > +#include <linux/platform_device.h>
> > +
> > +#define GRF_SOC_CON12 0x0274
> > +#define GRF_EDP_REF_CLK_SEL_INTER BIT(4)
> > +#define GRF_EDP_PHY_SIDDQ_WRITE_EN BIT(21)
> > +#define GRF_EDP_PHY_SIDDQ_ON 0
> > +#define GRF_EDP_PHY_SIDDQ_OFF BIT(5)
> > +
> > +struct rockchip_dp_phy {
> > + struct device *dev;
> > + struct regmap *grf;
> > + struct clk *phy_24m;
> > +};
> > +
> > +static int rockchip_set_phy_state(struct phy *phy, bool enable)
> > +{
> > + struct rockchip_dp_phy *dp = phy_get_drvdata(phy);
> > + int ret;
> > +
> > + if (enable) {
> > + ret = clk_prepare_enable(dp->phy_24m);
> > + if (ret < 0) {
> > + dev_err(dp->dev, "Can't enable clock 24m %d\n", ret);
> > + return ret;
> > + }
> > +
> > + ret = regmap_write(dp->grf, GRF_SOC_CON12,
> > + GRF_EDP_PHY_SIDDQ_WRITE_EN |
> > + GRF_EDP_PHY_SIDDQ_ON);
> > + } else {
> > + clk_disable_unprepare(dp->phy_24m);
>
> should clk_disable come after regmap_write? It'll be symmetric to enable?
>
> > + ret = regmap_write(dp->grf, GRF_SOC_CON12,
> > + GRF_EDP_PHY_SIDDQ_WRITE_EN |
> > + GRF_EDP_PHY_SIDDQ_OFF);
>
> Is this syscon register used only by Display Port PHY? Better to use
> regmap_update API?
Rockchip's GRF syscon registers use what gets called "Hiword-mask", so when
writing you actually need to set the write-enable bit (x+16, like
GRF_EDP_PHY_SIDDQ_WRITE_EN here) if you want to set bit x. No other bits get
affected by this.
Heiko
next prev parent reply other threads:[~2015-10-12 16:19 UTC|newest]
Thread overview: 151+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-01 5:46 [PATCH v4 0/16] Add Analogix Core Display Port Driver Yakir Yang
2015-09-01 5:46 ` [PATCH v4 01/16] drm: exynos/dp: fix code style Yakir Yang
2015-09-03 0:21 ` Krzysztof Kozlowski
2015-09-03 5:04 ` Yakir Yang
2015-09-03 5:08 ` Krzysztof Kozlowski
2015-09-03 5:33 ` Yakir Yang
2015-09-03 5:57 ` Joe Perches
2015-09-06 1:33 ` Yakir Yang
2015-09-01 5:49 ` [PATCH v4 02/16] drm: exynos/dp: convert to drm bridge mode Yakir Yang
2015-09-01 5:49 ` [PATCH v4 03/16] drm: bridge: analogix/dp: split exynos dp driver to bridge dir Yakir Yang
2015-09-01 20:46 ` Heiko Stuebner
2015-09-02 1:45 ` Yakir Yang
2015-09-04 21:06 ` Rob Herring
2015-09-04 21:29 ` Heiko Stuebner
2015-09-07 8:11 ` Thierry Reding
2015-09-02 14:50 ` Emil Velikov
2015-09-03 3:55 ` Yakir Yang
2015-09-03 0:58 ` Krzysztof Kozlowski
2015-09-03 5:30 ` Yakir Yang
2015-09-04 0:41 ` Krzysztof Kozlowski
2015-09-06 7:49 ` Yakir Yang
2015-09-07 0:22 ` Krzysztof Kozlowski
2015-09-07 2:27 ` Yakir Yang
2015-09-01 5:52 ` [PATCH v4 04/16] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang
2015-09-01 5:55 ` [PATCH v4 05/16] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & colorimetry Yakir Yang
2015-09-03 8:04 ` Krzysztof Kozlowski
2015-09-06 2:00 ` Yakir Yang
2015-09-01 5:58 ` [PATCH v4 06/16] Documentation: drm/bridge: add document for analogix_dp Yakir Yang
2015-09-01 6:01 ` [PATCH v4 07/16] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang
2015-09-03 0:01 ` Krzysztof Kozlowski
2015-09-01 6:01 ` [PATCH v4 08/16] drm: rockchip/dp: add rockchip platform dp driver Yakir Yang
2015-09-01 14:24 ` Heiko Stuebner
2015-09-01 14:48 ` Yakir Yang
2015-09-01 21:00 ` Heiko Stuebner
2015-09-02 1:52 ` Yakir Yang
2015-09-01 6:01 ` [PATCH v4 09/16] drm: rockchip: add bpc and color mode setting Yakir Yang
2015-09-01 21:00 ` Heiko Stuebner
2015-09-02 2:06 ` Yakir Yang
2015-09-02 8:34 ` Thierry Reding
2015-09-02 10:02 ` Yakir Yang
2015-09-03 8:38 ` Thierry Reding
2015-09-06 2:06 ` Yakir Yang
2015-09-01 6:04 ` [PATCH v4 10/16] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-09-01 16:51 ` Heiko Stuebner
2015-09-01 20:58 ` Heiko Stuebner
2015-09-02 1:46 ` Yakir Yang
2015-09-02 1:02 ` Yakir Yang
2015-09-02 13:27 ` Rob Herring
2015-09-03 3:25 ` Yakir Yang
2015-09-03 13:52 ` Heiko Stuebner
2015-09-01 6:07 ` [PATCH v4 11/16] drm: bridge: analogix/dp: add platform device type support Yakir Yang
2015-09-04 0:36 ` Krzysztof Kozlowski
2015-09-06 4:07 ` Yakir Yang
2015-09-06 23:55 ` Krzysztof Kozlowski
2015-09-07 1:47 ` Yakir Yang
2015-09-01 6:09 ` [PATCH v4 12/16] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang
2015-09-01 6:11 ` [PATCH v4 13/16] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang
2015-09-01 6:14 ` [PATCH v4 14/16] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang
2015-09-02 20:17 ` Rob Herring
2015-09-03 4:27 ` Yakir Yang
2015-09-03 9:04 ` Thierry Reding
2015-09-04 10:20 ` Russell King - ARM Linux
2015-09-07 9:01 ` Thierry Reding
[not found] ` <55EBBA0C.1030100@rock-chips.com>
2015-09-07 8:20 ` Thierry Reding
2015-09-04 21:46 ` Rob Herring
2015-09-06 8:20 ` Yakir Yang
2015-09-07 8:39 ` Thierry Reding
2015-09-03 8:47 ` Thierry Reding
2015-09-03 21:55 ` Rob Herring
2015-09-04 10:01 ` Thierry Reding
2015-09-01 6:17 ` [PATCH v4 15/16] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang
2015-09-01 6:20 ` [PATCH v4 16/16] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang
2015-09-01 21:47 ` [PATCH v4 0/16] Add Analogix Core Display Port Driver Heiko Stuebner
2015-09-02 2:15 ` Yakir Yang
[not found] ` <55FFC3B8.9030108@rock-chips.com>
2015-09-21 9:15 ` Thierry Reding
2015-09-21 10:27 ` Yakir Yang
2015-09-21 11:22 ` Thierry Reding
2015-09-22 7:20 ` [PATCH v5 0/17] " Yakir Yang
2015-09-22 7:26 ` [PATCH v5 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang
2015-09-22 7:29 ` [PATCH v5 02/17] drm: bridge: analogix/dp: split exynos dp driver to bridge directory Yakir Yang
2015-09-30 5:17 ` Krzysztof Kozlowski
2015-09-30 6:48 ` Yakir Yang
2015-09-22 7:34 ` [PATCH v5 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang
2015-09-30 5:22 ` Krzysztof Kozlowski
2015-09-30 6:52 ` Yakir Yang
2015-09-22 7:35 ` [PATCH v5 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang
2015-09-22 7:37 ` [PATCH v5 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang
2015-09-30 5:32 ` Krzysztof Kozlowski
[not found] ` <560B8CF1.7050102@rock-chips.com>
2015-09-30 7:34 ` Krzysztof Kozlowski
[not found] ` <560B9B33.2060409@rock-chips.com>
2015-09-30 8:26 ` Krzysztof Kozlowski
2015-09-30 9:39 ` Yakir Yang
2015-09-22 7:40 ` [PATCH v5 06/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang
2015-09-22 7:43 ` [PATCH v5 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang
2015-09-30 5:39 ` Krzysztof Kozlowski
2015-09-30 7:20 ` Yakir Yang
2015-09-22 7:45 ` [PATCH v5 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang
2015-09-22 7:48 ` [PATCH v5 09/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang
2015-09-22 7:48 ` [PATCH v5 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-09-22 7:51 ` [PATCH v5 11/17] Documentation: phy: add document for rockchip dp phy Yakir Yang
2015-09-22 7:55 ` [PATCH v5 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang
2015-09-22 7:57 ` [PATCH v5 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang
2015-09-22 8:00 ` [PATCH v5 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang
2015-09-22 8:02 ` [PATCH v5 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang
2015-09-22 8:05 ` [PATCH v5 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang
2015-09-22 8:07 ` [PATCH v5 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang
2015-10-07 6:25 ` [PATCH v5 0/17] Add Analogix Core Display Port Driver Yakir Yang
2015-10-07 8:46 ` Javier Martinez Canillas
2015-10-07 9:02 ` Yakir Yang
2015-10-07 9:26 ` Javier Martinez Canillas
[not found] ` <5614FC6B.4080702@rock-chips.com>
2015-10-07 11:25 ` Javier Martinez Canillas
2015-10-08 0:40 ` Yakir Yang
2015-10-10 14:31 ` Yakir Yang
2015-10-13 9:21 ` Javier Martinez Canillas
2015-10-13 13:50 ` Yakir Yang
2015-10-14 8:18 ` Javier Martinez Canillas
2015-10-10 15:35 ` [PATCH v6 " Yakir Yang
2015-10-10 15:38 ` [PATCH v6 01/17] drm: exynos: dp: convert to drm bridge mode Yakir Yang
2015-10-10 15:39 ` [PATCH v6 02/17] drm: bridge: analogix/dp: split exynos dp driver to bridge directory Yakir Yang
2015-10-10 15:41 ` [PATCH v6 03/17] drm: bridge: analogix/dp: fix some obvious code style Yakir Yang
2015-10-10 15:43 ` [PATCH v6 04/17] drm: bridge: analogix/dp: remove duplicate configuration of link rate and link count Yakir Yang
2015-10-10 15:46 ` [PATCH v6 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang
2015-10-12 0:37 ` Yakir Yang
2015-10-12 0:49 ` Krzysztof Kozlowski
2015-10-12 2:43 ` Yakir Yang
2015-10-12 3:51 ` Krzysztof Kozlowski
2015-10-12 4:09 ` Yakir Yang
2015-10-12 4:16 ` Krzysztof Kozlowski
2015-10-10 15:49 ` [PATCH v6 06/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang
2015-10-10 15:49 ` [PATCH v6 07/17] ARM: dts: exynos/dp: remove some properties that deprecated by analogix_dp driver Yakir Yang
2015-10-10 15:51 ` [PATCH v6 08/17] drm: rockchip: dp: add rockchip platform dp driver Yakir Yang
2015-10-10 15:53 ` [PATCH v6 09/17] Documentation: drm/bridge: add document for analogix_dp Yakir Yang
2015-10-10 15:55 ` [PATCH v6 10/17] phy: Add driver for rockchip Display Port PHY Yakir Yang
2015-10-12 15:02 ` Kishon Vijay Abraham I
2015-10-12 16:18 ` Heiko Stübner [this message]
2015-10-13 1:20 ` Yakir Yang
2015-10-10 15:58 ` [PATCH v6 11/17] Documentation: phy: add document for rockchip dp phy Yakir Yang
2015-10-12 22:28 ` Kishon Vijay Abraham I
2015-10-13 1:21 ` Yakir Yang
2015-10-10 16:00 ` [PATCH v6 12/17] drm: rockchip: vop: add bpc and color mode setting Yakir Yang
2015-10-10 16:05 ` [PATCH v6 13/17] drm: bridge: analogix/dp: add some rk3288 special registers setting Yakir Yang
2015-10-10 16:05 ` [PATCH v6 14/17] drm: bridge: analogix/dp: add max link rate and lane count limit for RK3288 Yakir Yang
2015-10-10 16:05 ` [PATCH v6 15/17] drm: bridge: analogix/dp: try force hpd after plug in lookup failed Yakir Yang
2015-10-10 16:05 ` [PATCH v6 16/17] drm: bridge: analogix/dp: move hpd detect to connector detect function Yakir Yang
2015-10-10 16:06 ` [PATCH v6 17/17] drm: bridge: analogix/dp: add edid modes parse in get_modes method Yakir Yang
2015-10-12 4:29 ` [PATCH v7 05/17] drm: bridge: analogix/dp: dynamic parse sync_pol & interlace & dynamic_range Yakir Yang
2015-10-12 6:54 ` Krzysztof Kozlowski
2015-10-12 7:20 ` Yakir Yang
2015-10-19 10:40 ` [PATCH v6 0/17] Add Analogix Core Display Port Driver Javier Martinez Canillas
2015-10-20 2:10 ` Yakir Yang
2015-10-20 9:48 ` Javier Martinez Canillas
2015-10-20 11:40 ` Yakir Yang
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