* [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA @ 2020-08-02 14:52 Jia-Ju Bai 2020-08-03 1:12 ` Zhou Wang 0 siblings, 1 reply; 4+ messages in thread From: Jia-Ju Bai @ 2020-08-02 14:52 UTC (permalink / raw) To: wangzhou1, herbert, davem; +Cc: linux-crypto, linux-kernel In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA: eqc_dma = dma_map_single(..., eqc, ...); ...... aeqc_dma = dma_map_single(..., aeqc, ...); Then "sqc" and "aeqc" are accessed at many places, such as: eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); ...... aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); These accesses may cause data inconsistency between CPU cache and hardware. I am not sure how to properly fix this problem, and thus I only report it. Best wishes, Jia-Ju Bai ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA 2020-08-02 14:52 [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA Jia-Ju Bai @ 2020-08-03 1:12 ` Zhou Wang 2020-08-03 1:29 ` Jia-Ju Bai 0 siblings, 1 reply; 4+ messages in thread From: Zhou Wang @ 2020-08-03 1:12 UTC (permalink / raw) To: Jia-Ju Bai, herbert, davem; +Cc: linux-crypto, linux-kernel On 2020/8/2 22:52, Jia-Ju Bai wrote: > In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA: > eqc_dma = dma_map_single(..., eqc, ...); > ...... > aeqc_dma = dma_map_single(..., aeqc, ...); Only sqc, cqc will be configured in qm_qp_ctx_cfg. > > Then "sqc" and "aeqc" are accessed at many places, such as: > eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); > eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); > ...... > aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); > aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); There are sqc, cqc, eqc, aeqc, you seems misunderstand them. > > These accesses may cause data inconsistency between CPU cache and hardware. > > I am not sure how to properly fix this problem, and thus I only report it. In qm_qp_ctx_cfg, sqc/cqc memory will be allocated and related mailbox will be sent to hardware. In qm_eq_ctx_cfg, eqc/aeqc related operations will be done. So there is no problem here :) Thanks, Zhou > > > Best wishes, > Jia-Ju Bai > > ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA 2020-08-03 1:12 ` Zhou Wang @ 2020-08-03 1:29 ` Jia-Ju Bai 2020-08-07 3:58 ` Zhou Wang 0 siblings, 1 reply; 4+ messages in thread From: Jia-Ju Bai @ 2020-08-03 1:29 UTC (permalink / raw) To: Zhou Wang, herbert, davem; +Cc: linux-crypto, linux-kernel On 2020/8/3 9:12, Zhou Wang wrote: > On 2020/8/2 22:52, Jia-Ju Bai wrote: >> In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA: >> eqc_dma = dma_map_single(..., eqc, ...); >> ...... >> aeqc_dma = dma_map_single(..., aeqc, ...); > Only sqc, cqc will be configured in qm_qp_ctx_cfg. > >> Then "sqc" and "aeqc" are accessed at many places, such as: >> eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); >> eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); >> ...... >> aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); >> aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); > There are sqc, cqc, eqc, aeqc, you seems misunderstand them. > >> These accesses may cause data inconsistency between CPU cache and hardware. >> >> I am not sure how to properly fix this problem, and thus I only report it. > In qm_qp_ctx_cfg, sqc/cqc memory will be allocated and related mailbox will be sent > to hardware. In qm_eq_ctx_cfg, eqc/aeqc related operations will be done. > > So there is no problem here :) Ah, sorry, I misunderstood qm_eq_ctx_cfg() and qm_qp_ctx_cfg(), because their names are quite similar. Now, I re-organize this report as follows: In qm_eq_ctx_cfg(), "eqc" and "aeqc" are mapped to streaming DMA: eqc_dma = dma_map_single(..., eqc, ...); ...... aeqc_dma = dma_map_single(..., aeqc, ...); Then "sqc" and "aeqc" are accessed at some places in qm_eq_ctx_cfg(), such as: eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); ...... aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); These accesses may cause data inconsistency between CPU cache and hardware. Besides, in qm_qp_ctx_cfg(), "sqc" and "cqc" are mapped to streaming DMA: sqc_dma = dma_map_single(..., sqc, ...); ...... cqc_dma = dma_map_single(..., cqc, ...); Then "sqc" and "cqc" are at some places in qm_qp_ctx_cfg(), such as: sqc->cq_num = cpu_to_le16(qp_id); sqc->w13 = cpu_to_le16(QM_MK_SQC_W13(0, 1, qp->alg_type)); ...... cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V2(4)); cqc->w8 = 0; These accesses may cause data inconsistency between CPU cache and hardware. I think such problems (if they are real) can be fixed by finishing data assignment before DMA mapping. Best wishes, Jia-Ju Bai ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA 2020-08-03 1:29 ` Jia-Ju Bai @ 2020-08-07 3:58 ` Zhou Wang 0 siblings, 0 replies; 4+ messages in thread From: Zhou Wang @ 2020-08-07 3:58 UTC (permalink / raw) To: Jia-Ju Bai, herbert, davem; +Cc: linux-crypto, linux-kernel On 2020/8/3 9:29, Jia-Ju Bai wrote: > > > On 2020/8/3 9:12, Zhou Wang wrote: >> On 2020/8/2 22:52, Jia-Ju Bai wrote: >>> In qm_qp_ctx_cfg(), "sqc" and "aeqc" are mapped to streaming DMA: >>> eqc_dma = dma_map_single(..., eqc, ...); >>> ...... >>> aeqc_dma = dma_map_single(..., aeqc, ...); >> Only sqc, cqc will be configured in qm_qp_ctx_cfg. >> >>> Then "sqc" and "aeqc" are accessed at many places, such as: >>> eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); >>> eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); >>> ...... >>> aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); >>> aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); >> There are sqc, cqc, eqc, aeqc, you seems misunderstand them. >> >>> These accesses may cause data inconsistency between CPU cache and hardware. >>> >>> I am not sure how to properly fix this problem, and thus I only report it. >> In qm_qp_ctx_cfg, sqc/cqc memory will be allocated and related mailbox will be sent >> to hardware. In qm_eq_ctx_cfg, eqc/aeqc related operations will be done. >> >> So there is no problem here :) > > Ah, sorry, I misunderstood qm_eq_ctx_cfg() and qm_qp_ctx_cfg(), because their names are quite similar. > Now, I re-organize this report as follows: > > In qm_eq_ctx_cfg(), "eqc" and "aeqc" are mapped to streaming DMA: > eqc_dma = dma_map_single(..., eqc, ...); > ...... > aeqc_dma = dma_map_single(..., aeqc, ...); > > Then "sqc" and "aeqc" are accessed at some places in qm_eq_ctx_cfg(), such as: > eqc->base_l = cpu_to_le32(lower_32_bits(qm->eqe_dma)); > eqc->base_h = cpu_to_le32(upper_32_bits(qm->eqe_dma)); > ...... > aeqc->base_l = cpu_to_le32(lower_32_bits(qm->aeqe_dma)); > aeqc->base_h = cpu_to_le32(upper_32_bits(qm->aeqe_dma)); > > These accesses may cause data inconsistency between CPU cache and hardware. > > Besides, in qm_qp_ctx_cfg(), "sqc" and "cqc" are mapped to streaming DMA: > sqc_dma = dma_map_single(..., sqc, ...); > ...... > cqc_dma = dma_map_single(..., cqc, ...); > > > Then "sqc" and "cqc" are at some places in qm_qp_ctx_cfg(), such as: > sqc->cq_num = cpu_to_le16(qp_id); > sqc->w13 = cpu_to_le16(QM_MK_SQC_W13(0, 1, qp->alg_type)); > ...... > cqc->dw3 = cpu_to_le32(QM_MK_CQC_DW3_V2(4)); > cqc->w8 = 0; > > These accesses may cause data inconsistency between CPU cache and hardware. > > I think such problems (if they are real) can be fixed by finishing data assignment before DMA mapping. Sorry for late. I got your idea, from the semantics of dma_map_single/dma_unmap_single, we should not mix CPU and device DMA accessing here. The reason of working well is our hardware is hardware CC. Will fix this later. Thanks, Zhou > > > Best wishes, > Jia-Ju Bai > > . > ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-08-07 3:58 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-08-02 14:52 [BUG] crypto: hisilicon: accessing the data mapped to streaming DMA Jia-Ju Bai 2020-08-03 1:12 ` Zhou Wang 2020-08-03 1:29 ` Jia-Ju Bai 2020-08-07 3:58 ` Zhou Wang
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