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* [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support
@ 2018-07-17 16:28 Tudor Ambarus
  2018-07-17 16:28 ` [PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor Ambarus
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: Tudor Ambarus @ 2018-07-17 16:28 UTC (permalink / raw)
  To: marek.vasut, dwmw2, computersforpeace, boris.brezillon, richard
  Cc: linux-mtd, linux-arm-kernel, linux-kernel, anuragku,
	cyrille.pitchen, nicolas.ferre, Tudor Ambarus

We can't determine this purely by manufacturer type and it's not
autodetectable by anything like SFDP, so make a new flag for it:
UNLOCK_GLOBAL_BLOCK.

Note that the Global Block Unlock command has different names
depending on the manufacturer, but always the same command value:
0x98. Macronix's MX25U12835F names it Gang Block Unlock,
Winbound's W25Q128FV names it Global Block Unlock and
Microchip's SST26VF064B names it Global Block Protection Unlock.

Based on initial work done by Anurag Kumar Vulisha:
https://patchwork.kernel.org/patch/7611271/

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 21 +++++++++++++++++++++
 include/linux/mtd/spi-nor.h   |  1 +
 2 files changed, 22 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d9c368c..6648251 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -89,6 +89,7 @@ struct flash_info {
 #define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
 #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
 #define USE_CLSR		BIT(14)	/* use CLSR command */
+#define UNLOCK_GLOBAL_BLOCK	BIT(15)	/* Unlock global block protection */
 
 	int	(*quad_enable)(struct spi_nor *nor);
 };
@@ -2730,6 +2731,17 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
 	return 0;
 }
 
+static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
+{
+	int ret;
+
+	write_enable(nor);
+	ret = nor->write_reg(nor, SPINOR_OP_GBULK, NULL, 0);
+	if (ret < 0)
+		return ret;
+	return spi_nor_wait_till_ready(nor);
+}
+
 static int spi_nor_init(struct spi_nor *nor)
 {
 	int err;
@@ -2747,6 +2759,15 @@ static int spi_nor_init(struct spi_nor *nor)
 		spi_nor_wait_till_ready(nor);
 	}
 
+	if (nor->info->flags & UNLOCK_GLOBAL_BLOCK) {
+		err = spi_nor_unlock_global_block_protection(nor);
+		if (err) {
+			dev_err(nor->dev,
+				"Cannot unlock the global block protection\n");
+			return err;
+		}
+	}
+
 	if (nor->quad_enable) {
 		err = nor->quad_enable(nor);
 		if (err) {
diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
index e60da0d..e8dd11d 100644
--- a/include/linux/mtd/spi-nor.h
+++ b/include/linux/mtd/spi-nor.h
@@ -64,6 +64,7 @@
 #define SPINOR_OP_CLFSR		0x50	/* Clear flag status register */
 #define SPINOR_OP_RDEAR		0xc8	/* Read Extended Address Register */
 #define SPINOR_OP_WREAR		0xc5	/* Write Extended Address Register */
+#define SPINOR_OP_GBULK		0x98	/* Global Block Unlock Protection */
 
 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
 #define SPINOR_OP_READ_4B	0x13	/* Read data bytes (low frequency) */
-- 
2.9.4


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b
  2018-07-17 16:28 [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Tudor Ambarus
@ 2018-07-17 16:28 ` Tudor Ambarus
  2018-07-17 16:28 ` [PATCH 3/3] mtd: spi-nor: add support for Microchip SST26 QSPI flash memories Tudor Ambarus
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 5+ messages in thread
From: Tudor Ambarus @ 2018-07-17 16:28 UTC (permalink / raw)
  To: marek.vasut, dwmw2, computersforpeace, boris.brezillon, richard
  Cc: linux-mtd, linux-arm-kernel, linux-kernel, anuragku,
	cyrille.pitchen, nicolas.ferre, Tudor Ambarus

To avoid inadvertent writes during power-up, sst26vf064b is
write-protected by default after a power-on reset cycle.
Unlock the serial flash memory by using the Global Block Protection
Unlock command - it offers a single command cycle that unlocks
the entire memory array.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 6648251..eddf09f 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1163,7 +1163,11 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "sst25wf040b", INFO(0x621613, 0, 64 * 1024,  8, SECT_4K) },
 	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
 	{ "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
-	{ "sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+	{
+		"sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			UNLOCK_GLOBAL_BLOCK)
+	},
 
 	/* ST Microelectronics -- newer production may have feature updates */
 	{ "m25p05",  INFO(0x202010,  0,  32 * 1024,   2, 0) },
-- 
2.9.4


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [PATCH 3/3] mtd: spi-nor: add support for Microchip SST26 QSPI flash memories
  2018-07-17 16:28 [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Tudor Ambarus
  2018-07-17 16:28 ` [PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor Ambarus
@ 2018-07-17 16:28 ` Tudor Ambarus
  2018-07-25 12:26 ` [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Cyrille Pitchen
  2019-02-14  7:25 ` Tudor.Ambarus
  3 siblings, 0 replies; 5+ messages in thread
From: Tudor Ambarus @ 2018-07-17 16:28 UTC (permalink / raw)
  To: marek.vasut, dwmw2, computersforpeace, boris.brezillon, richard
  Cc: linux-mtd, linux-arm-kernel, linux-kernel, anuragku,
	cyrille.pitchen, nicolas.ferre, Tudor Ambarus

The flash memories are write-protected by default at power-on and
must be unlocked first, before being erased, then programmed.

The erase block sizes are not uniform. The memory layout is uniform
just for the 4K sector blocks.

Based on initial work done by Cyrille Pitchen.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index eddf09f..06d7023 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1164,10 +1164,30 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "sst25wf040",  INFO(0xbf2504, 0, 64 * 1024,  8, SECT_4K | SST_WRITE) },
 	{ "sst25wf080",  INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
 	{
+		"sst26vf016b", INFO(0xbf2641, 0, 64 * 1024, 32,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			UNLOCK_GLOBAL_BLOCK)
+	},
+	{
+		"sst26vf032b", INFO(0xbf2642, 0, 64 * 1024, 64,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			UNLOCK_GLOBAL_BLOCK)
+	},
+	{
 		"sst26vf064b", INFO(0xbf2643, 0, 64 * 1024, 128,
 			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
 			UNLOCK_GLOBAL_BLOCK)
 	},
+	{
+		"sst26vf040b", INFO(0xbf2654, 0, 64 * 1024, 8,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			UNLOCK_GLOBAL_BLOCK)
+	},
+	{
+		"sst26vf080b", INFO(0xbf2658, 0, 64 * 1024, 16,
+			SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
+			UNLOCK_GLOBAL_BLOCK)
+	},
 
 	/* ST Microelectronics -- newer production may have feature updates */
 	{ "m25p05",  INFO(0x202010,  0,  32 * 1024,   2, 0) },
-- 
2.9.4


^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support
  2018-07-17 16:28 [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Tudor Ambarus
  2018-07-17 16:28 ` [PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor Ambarus
  2018-07-17 16:28 ` [PATCH 3/3] mtd: spi-nor: add support for Microchip SST26 QSPI flash memories Tudor Ambarus
@ 2018-07-25 12:26 ` Cyrille Pitchen
  2019-02-14  7:25 ` Tudor.Ambarus
  3 siblings, 0 replies; 5+ messages in thread
From: Cyrille Pitchen @ 2018-07-25 12:26 UTC (permalink / raw)
  To: Tudor Ambarus, marek.vasut, dwmw2, computersforpeace,
	boris.brezillon, richard
  Cc: linux-mtd, linux-arm-kernel, linux-kernel, anuragku, nicolas.ferre

Hi Tudor,

Le 17/07/2018 à 18:28, Tudor Ambarus a écrit :
> We can't determine this purely by manufacturer type and it's not
> autodetectable by anything like SFDP, so make a new flag for it:
> UNLOCK_GLOBAL_BLOCK.
> 
> Note that the Global Block Unlock command has different names
> depending on the manufacturer, but always the same command value:
> 0x98. Macronix's MX25U12835F names it Gang Block Unlock,
> Winbound's W25Q128FV names it Global Block Unlock and
> Microchip's SST26VF064B names it Global Block Protection Unlock.
> 
> Based on initial work done by Anurag Kumar Vulisha:
> https://patchwork.kernel.org/patch/7611271/
> 
> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>

Reviewed-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>

Best regards,

Cyrille
> ---
>  drivers/mtd/spi-nor/spi-nor.c | 21 +++++++++++++++++++++
>  include/linux/mtd/spi-nor.h   |  1 +
>  2 files changed, 22 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index d9c368c..6648251 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -89,6 +89,7 @@ struct flash_info {
>  #define NO_CHIP_ERASE		BIT(12) /* Chip does not support chip erase */
>  #define SPI_NOR_SKIP_SFDP	BIT(13)	/* Skip parsing of SFDP tables */
>  #define USE_CLSR		BIT(14)	/* use CLSR command */
> +#define UNLOCK_GLOBAL_BLOCK	BIT(15)	/* Unlock global block protection */
>  
>  	int	(*quad_enable)(struct spi_nor *nor);
>  };
> @@ -2730,6 +2731,17 @@ static int spi_nor_setup(struct spi_nor *nor, const struct flash_info *info,
>  	return 0;
>  }
>  
> +static int spi_nor_unlock_global_block_protection(struct spi_nor *nor)
> +{
> +	int ret;
> +
> +	write_enable(nor);
> +	ret = nor->write_reg(nor, SPINOR_OP_GBULK, NULL, 0);
> +	if (ret < 0)
> +		return ret;
> +	return spi_nor_wait_till_ready(nor);
> +}
> +
>  static int spi_nor_init(struct spi_nor *nor)
>  {
>  	int err;
> @@ -2747,6 +2759,15 @@ static int spi_nor_init(struct spi_nor *nor)
>  		spi_nor_wait_till_ready(nor);
>  	}
>  
> +	if (nor->info->flags & UNLOCK_GLOBAL_BLOCK) {
> +		err = spi_nor_unlock_global_block_protection(nor);
> +		if (err) {
> +			dev_err(nor->dev,
> +				"Cannot unlock the global block protection\n");
> +			return err;
> +		}
> +	}
> +
>  	if (nor->quad_enable) {
>  		err = nor->quad_enable(nor);
>  		if (err) {
> diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h
> index e60da0d..e8dd11d 100644
> --- a/include/linux/mtd/spi-nor.h
> +++ b/include/linux/mtd/spi-nor.h
> @@ -64,6 +64,7 @@
>  #define SPINOR_OP_CLFSR		0x50	/* Clear flag status register */
>  #define SPINOR_OP_RDEAR		0xc8	/* Read Extended Address Register */
>  #define SPINOR_OP_WREAR		0xc5	/* Write Extended Address Register */
> +#define SPINOR_OP_GBULK		0x98	/* Global Block Unlock Protection */
>  
>  /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
>  #define SPINOR_OP_READ_4B	0x13	/* Read data bytes (low frequency) */
> 

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support
  2018-07-17 16:28 [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Tudor Ambarus
                   ` (2 preceding siblings ...)
  2018-07-25 12:26 ` [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Cyrille Pitchen
@ 2019-02-14  7:25 ` Tudor.Ambarus
  3 siblings, 0 replies; 5+ messages in thread
From: Tudor.Ambarus @ 2019-02-14  7:25 UTC (permalink / raw)
  To: marek.vasut, dwmw2, computersforpeace, bbrezillon, richard
  Cc: linux-mtd, linux-arm-kernel, linux-kernel, anuragku,
	Cyrille.Pitchen, Nicolas.Ferre



On 07/17/2018 07:28 PM, Tudor Ambarus wrote:
> We can't determine this purely by manufacturer type and it's not
> autodetectable by anything like SFDP, so make a new flag for it:
> UNLOCK_GLOBAL_BLOCK.
> 
> Note that the Global Block Unlock command has different names
> depending on the manufacturer, but always the same command value:
> 0x98. Macronix's MX25U12835F names it Gang Block Unlock,
> Winbound's W25Q128FV names it Global Block Unlock and
> Microchip's SST26VF064B names it Global Block Protection Unlock.
> 
> Based on initial work done by Anurag Kumar Vulisha:
> https://patchwork.kernel.org/patch/7611271/

Time passed and now I think that this should be part of the individual block
lock support, as an optimization when one wants to unlock the entire flash
memory. Will rework it.

Cheers,
ta


^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2019-02-14  7:25 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-07-17 16:28 [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Tudor Ambarus
2018-07-17 16:28 ` [PATCH 2/3] mtd: spi-nor: unlock global block protection on sst26vf064b Tudor Ambarus
2018-07-17 16:28 ` [PATCH 3/3] mtd: spi-nor: add support for Microchip SST26 QSPI flash memories Tudor Ambarus
2018-07-25 12:26 ` [PATCH 1/3] mtd: spi-nor: add Global Block Unlock support Cyrille Pitchen
2019-02-14  7:25 ` Tudor.Ambarus

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