From: Florian Fainelli <f.fainelli@gmail.com>
To: David Wu <david.wu@rock-chips.com>,
davem@davemloft.net, heiko@sntech.de, robh+dt@kernel.org,
mark.rutland@arm.com, catalin.marinas@arm.com,
will.deacon@arm.com, olof@lixom.net, linux@armlinux.org.uk,
arnd@arndb.de
Cc: andrew@lunn.ch, peppe.cavallaro@st.com, alexandre.torgue@st.com,
huangtao@rock-chips.com, hwg@rock-chips.com,
netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 05/11] net: stmmac: dwmac-rk: Add internal phy support
Date: Fri, 23 Jun 2017 09:22:16 -0700 [thread overview]
Message-ID: <3788bbae-c99c-b63e-8910-f98567124cac@gmail.com> (raw)
In-Reply-To: <1498193947-8011-1-git-send-email-david.wu@rock-chips.com>
On 06/22/2017 09:59 PM, David Wu wrote:
> To make internal phy worked, need to configure the phy_clock,
> phy cru_reset and related registers.
>
> Change-Id: I6971c0a769754b824b1b908b56080cbaf7867d13
> Signed-off-by: David Wu <david.wu@rock-chips.com>
> ---
> .../devicetree/bindings/net/rockchip-dwmac.txt | 3 +
> drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 82 ++++++++++++++++++++++
> 2 files changed, 85 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.txt b/Documentation/devicetree/bindings/net/rockchip-dwmac.txt
> index 8f42755..0514f69 100644
> --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.txt
> +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.txt
> @@ -22,6 +22,7 @@ Required properties:
> <&cru SCLK_MACREF_OUT> clock gate for RMII reference clock output
> <&cru ACLK_GMAC>: AXI clock gate for GMAC
> <&cru PCLK_GMAC>: APB clock gate for GMAC
> + <&cru MAC_PHY>: clock for internal macphy
> - clock-names: One name for each entry in the clocks property.
> - phy-mode: See ethernet.txt file in the same directory.
> - pinctrl-names: Names corresponding to the numbered pinctrl states.
> @@ -35,6 +36,8 @@ Required properties:
> - assigned-clocks: main clock, should be <&cru SCLK_MAC>;
> - assigned-clock-parents = parent of main clock.
> can be <&ext_gmac> or <&cru SCLK_MAC_PLL>.
> + - phy-type: For internal phy, it must be "internal"; For external phy, no need
> + to configure this.
Use the standard "phy-mode" property. You will see
drivers/net/ethernet/broadcom/genet/ actually define a phy-mode =
"internal" property specifically for that. This should probably be
generalized so it is useful to other drivers a well, I will do just that.
>
> Optional properties:
> - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
> diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> index a8e8fd5..c1a1413 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
> @@ -41,6 +41,7 @@ struct rk_gmac_ops {
> void (*set_to_rmii)(struct rk_priv_data *bsp_priv);
> void (*set_rgmii_speed)(struct rk_priv_data *bsp_priv, int speed);
> void (*set_rmii_speed)(struct rk_priv_data *bsp_priv, int speed);
> + void (*internal_phy_powerup)(struct rk_priv_data *bsp_priv);
> };
>
> struct rk_priv_data {
> @@ -52,6 +53,7 @@ struct rk_priv_data {
>
> bool clk_enabled;
> bool clock_input;
> + bool internal_phy;
>
> struct clk *clk_mac;
> struct clk *gmac_clkin;
> @@ -61,6 +63,9 @@ struct rk_priv_data {
> struct clk *clk_mac_refout;
> struct clk *aclk_mac;
> struct clk *pclk_mac;
> + struct clk *clk_macphy;
> +
> + struct reset_control *macphy_reset;
>
> int tx_delay;
> int rx_delay;
> @@ -750,6 +755,48 @@ static void rk3399_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed)
> .set_rmii_speed = rk3399_set_rmii_speed,
> };
>
> +#define RK_GRF_MACPHY_CON0 0xb00
> +#define RK_GRF_MACPHY_CON1 0xb04
> +#define RK_GRF_MACPHY_CON2 0xb08
> +#define RK_GRF_MACPHY_CON3 0xb0c
> +
> +#define RK_MACPHY_ENABLE GRF_BIT(0)
> +#define RK_MACPHY_DISABLE GRF_CLR_BIT(0)
> +#define RK_MACPHY_CFG_CLK_50M GRF_BIT(14)
> +#define RK_GMAC2PHY_RMII_MODE (GRF_BIT(6) | GRF_CLR_BIT(7))
> +#define RK_GRF_CON2_MACPHY_ID HIWORD_UPDATE(0x1234, 0xffff, 0)
> +#define RK_GRF_CON3_MACPHY_ID HIWORD_UPDATE(0x35, 0x3f, 0)
> +
> +static void rk_gmac_internal_phy_powerup(struct rk_priv_data *priv)
> +{
> + if (priv->ops->internal_phy_powerup)
> + priv->ops->internal_phy_powerup(priv);
> +
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_CFG_CLK_50M);
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_GMAC2PHY_RMII_MODE);
> +
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON2, RK_GRF_CON2_MACPHY_ID);
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON3, RK_GRF_CON3_MACPHY_ID);
> +
> + /* disable macphy, the default value is enabled */
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
> + if (priv->macphy_reset)
> + reset_control_assert(priv->macphy_reset);
> + usleep_range(10, 20);
> + if (priv->macphy_reset)
> + reset_control_deassert(priv->macphy_reset);
> + usleep_range(10, 20);
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_ENABLE);
> + msleep(30);
> +}
> +
> +static void rk_gmac_internal_phy_powerdown(struct rk_priv_data *priv)
> +{
> + regmap_write(priv->grf, RK_GRF_MACPHY_CON0, RK_MACPHY_DISABLE);
> + if (priv->macphy_reset)
> + reset_control_assert(priv->macphy_reset);
> +}
> +
> static int gmac_clk_init(struct rk_priv_data *bsp_priv)
> {
> struct device *dev = &bsp_priv->pdev->dev;
> @@ -803,6 +850,14 @@ static int gmac_clk_init(struct rk_priv_data *bsp_priv)
> clk_set_rate(bsp_priv->clk_mac, 50000000);
> }
>
> + if (bsp_priv->internal_phy) {
> + bsp_priv->clk_macphy = devm_clk_get(dev, "clk_macphy");
> + if (IS_ERR(bsp_priv->clk_macphy))
> + dev_err(dev, "cannot get %s clock\n", "clk_macphy");
> + else
> + clk_set_rate(bsp_priv->clk_macphy, 50000000);
> + }
> +
> return 0;
> }
>
> @@ -826,6 +881,9 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
> bsp_priv->clk_mac_refout);
> }
>
> + if (!IS_ERR(bsp_priv->clk_macphy))
> + clk_prepare_enable(bsp_priv->clk_macphy);
> +
> if (!IS_ERR(bsp_priv->aclk_mac))
> clk_prepare_enable(bsp_priv->aclk_mac);
>
> @@ -858,6 +916,9 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
> bsp_priv->clk_mac_refout);
> }
>
> + if (!IS_ERR(bsp_priv->clk_macphy))
> + clk_disable_unprepare(bsp_priv->clk_macphy);
> +
> if (!IS_ERR(bsp_priv->aclk_mac))
> clk_disable_unprepare(bsp_priv->aclk_mac);
>
> @@ -940,6 +1001,21 @@ static struct rk_priv_data *rk_gmac_setup(struct platform_device *pdev,
> bsp_priv->clock_input = false;
> }
>
> + ret = of_property_read_string(dev->of_node, "phy-type", &strings);
> + if (!ret && !strcmp(strings, "internal")) {
> + bsp_priv->internal_phy = true;
> + bsp_priv->macphy_reset = devm_reset_control_get(dev,
> + "mac-phy");
> + if (IS_ERR(bsp_priv->macphy_reset)) {
> + dev_info(dev, "no macphy_reset control found\n");
> + bsp_priv->macphy_reset = NULL;
> + }
> + } else {
> + bsp_priv->internal_phy = false;
> + }
> + dev_info(dev, "internal PHY? (%s).\n",
> + bsp_priv->internal_phy ? "yes" : "no");
> +
> ret = of_property_read_u32(dev->of_node, "tx_delay", &value);
> if (ret) {
> bsp_priv->tx_delay = 0x30;
> @@ -1014,6 +1090,9 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv)
> pm_runtime_enable(dev);
> pm_runtime_get_sync(dev);
>
> + if (bsp_priv->internal_phy)
> + rk_gmac_internal_phy_powerup(bsp_priv);
> +
> return 0;
> }
>
> @@ -1021,6 +1100,9 @@ static void rk_gmac_powerdown(struct rk_priv_data *gmac)
> {
> struct device *dev = &gmac->pdev->dev;
>
> + if (gmac->internal_phy)
> + rk_gmac_internal_phy_powerdown(gmac);
> +
> pm_runtime_put_sync(dev);
> pm_runtime_disable(dev);
>
>
--
Florian
next prev parent reply other threads:[~2017-06-23 16:22 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-23 4:41 [PATCH 00/11] Add the mac internal ephy support David Wu
2017-06-23 4:41 ` [PATCH 01/11] net: phy: Add rockchip phy driver support David Wu
2017-06-23 13:55 ` Andrew Lunn
2017-06-23 16:18 ` Florian Fainelli
2017-06-24 2:10 ` Andrew Lunn
2017-06-24 2:19 ` Andrew Lunn
2017-06-24 8:38 ` Heiko Stuebner
2017-06-24 14:04 ` Andrew Lunn
2017-06-24 16:05 ` Heiko Stuebner
2017-06-27 14:44 ` David.Wu
2017-06-27 14:46 ` Andrew Lunn
2017-06-27 15:07 ` David.Wu
2017-06-23 4:42 ` [PATCH 02/11] multi_v7_defconfig: Make rockchip mac phy built-in David Wu
2017-06-23 4:42 ` [PATCH 03/11] arm64: defconfig: Enable CONFIG_ROCKCHIP_MAC_PHY David Wu
2017-06-23 4:42 ` [PATCH 04/11] net: stmmac: dwmac-rk: Remove unwanted code for rk3328_set_to_rmii() David Wu
2017-06-24 2:22 ` Andrew Lunn
2017-06-23 4:59 ` [PATCH 05/11] net: stmmac: dwmac-rk: Add internal phy support David Wu
2017-06-23 16:22 ` Florian Fainelli [this message]
2017-06-27 14:21 ` David.Wu
2017-06-27 14:52 ` Andrew Lunn
2017-06-23 17:19 ` Heiko Stuebner
2017-06-27 14:33 ` David.Wu
2017-06-27 15:40 ` Heiko Stuebner
2017-06-24 2:29 ` Andrew Lunn
2017-07-27 12:44 ` David.Wu
2017-06-23 4:59 ` [PATCH 06/11] net: stmmac: dwmac-rk: Add internal phy support for rk3228 David Wu
2017-06-23 5:01 ` [PATCH 07/11] net: stmmac: dwmac-rk: Add internal phy supprot for rk3328 David Wu
2017-06-23 5:02 ` [PATCH 08/11] ARM: dts: rk322x: Add support internal phy for gmac David Wu
2017-06-23 5:02 ` [PATCH 09/11] ARM: dts: rk3228-evb: Enable the " David Wu
2017-06-23 5:03 ` [PATCH 10/11] ARM64: dts: rockchip: Add gmac2phy node support for rk3328 David Wu
2017-06-23 5:04 ` [PATCH 11/11] ARM64: dts: rockchip: Enable gmac2phy for rk3328-evb David Wu
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3788bbae-c99c-b63e-8910-f98567124cac@gmail.com \
--to=f.fainelli@gmail.com \
--cc=alexandre.torgue@st.com \
--cc=andrew@lunn.ch \
--cc=arnd@arndb.de \
--cc=catalin.marinas@arm.com \
--cc=davem@davemloft.net \
--cc=david.wu@rock-chips.com \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=huangtao@rock-chips.com \
--cc=hwg@rock-chips.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=linux@armlinux.org.uk \
--cc=mark.rutland@arm.com \
--cc=netdev@vger.kernel.org \
--cc=olof@lixom.net \
--cc=peppe.cavallaro@st.com \
--cc=robh+dt@kernel.org \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).