From: "Liang, Kan" <kan.liang@intel.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: "mingo@redhat.com" <mingo@redhat.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"eranian@google.com" <eranian@google.com>,
"alexander.shishkin@linux.intel.com"
<alexander.shishkin@linux.intel.com>,
"ak@linux.intel.com" <ak@linux.intel.com>,
"Odzioba, Lukasz" <lukasz.odzioba@intel.com>
Subject: RE: [PATCH] perf/x86: fix event counter update issue
Date: Tue, 29 Nov 2016 17:06:36 +0000 [thread overview]
Message-ID: <37D7C6CF3E00A74B8858931C1DB2F07750CA4190@SHSMSX103.ccr.corp.intel.com> (raw)
In-Reply-To: <20161129165830.GM3092@twins.programming.kicks-ass.net>
> On Tue, Nov 29, 2016 at 02:46:14PM +0000, Liang, Kan wrote:
> > > And note that we _ALWAYS_ set the IN bits, even for !sampling events.
> > > Also note we set max_period to (1<<31) - 1, so we should never
> > > exceed 31 bits.
> > >
> >
> > The max_period is 0xfffffffff.
> >
> > The limit is breaked by this patch.
> > 069e0c3c4058 ("perf/x86/intel: Support full width counting")
> > https://patchwork.kernel.org/patch/2784191/
> >
> > /* Support full width counters using alternative MSR range */
> > if (x86_pmu.intel_cap.full_width_write) {
> > x86_pmu.max_period = x86_pmu.cntval_mask;
> > x86_pmu.perfctr = MSR_IA32_PMC0;
> > pr_cont("full-width counters, ");
> > }
> >
>
> Wth do KNL/SLM have full_width_write set if they have short counters?
Yes, the full_width_write is set on KNL/SLM.
> I should the whole point of the full_wdith thing was that in that case the
> counters were actually 64bit wide.
Even for big core, the counter width is 48 bit.
AFAIK, no Intel platform has 64bit wide counter.
Thanks,
Kan
next prev parent reply other threads:[~2016-11-29 17:06 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-28 19:26 [PATCH] perf/x86: fix event counter update issue kan.liang
2016-11-28 19:41 ` Stephane Eranian
2016-11-28 19:59 ` Liang, Kan
2016-11-28 20:18 ` Stephane Eranian
2016-11-28 20:23 ` Liang, Kan
2016-11-29 9:25 ` Peter Zijlstra
2016-11-29 14:46 ` Liang, Kan
2016-11-29 16:58 ` Peter Zijlstra
2016-11-29 17:06 ` Liang, Kan [this message]
2016-11-29 17:17 ` Peter Zijlstra
2016-11-29 17:20 ` Stephane Eranian
2016-11-29 17:30 ` Peter Zijlstra
2016-11-29 18:11 ` Stephane Eranian
2016-11-29 18:37 ` Andi Kleen
2016-11-29 19:07 ` Liang, Kan
2016-11-29 19:32 ` Peter Zijlstra
2016-11-29 20:33 ` Liang, Kan
2016-11-29 20:37 ` Stephane Eranian
2016-12-02 12:58 ` Odzioba, Lukasz
2016-12-05 10:25 ` Peter Zijlstra
2016-12-05 11:21 ` Odzioba, Lukasz
2017-02-22 14:49 ` Vince Weaver
2017-02-22 15:28 ` Liang, Kan
2017-02-22 19:18 ` Andi Kleen
2017-02-23 15:07 ` Vince Weaver
2017-02-23 16:14 ` Liang, Kan
2016-11-29 19:08 ` Odzioba, Lukasz
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